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/kvm-unit-tests/s390x/
H A Dunittests.cfg19 # https://lore.kernel.org/qemu-devel/20240219061731.232570-1-npiggin@gmail.com/
82 qemu_params=-name kvm-unit-test --uuid 0fb84a86-727c-11ea-bc55-0242ac130003 -smp 1,maxcpus=8
88 [sclp-1g]
90 qemu_params = -m 1G
129 qemu_params = -smp 1,maxcpus=3 -device host-s390x-cpu,core-id=1 -device host-s390x-cpu,core-id=2
135 qemu_params = -smp 1,maxcpus=3 -device host-s390x-cpu,core-id=2 -device host-s390x-cpu,core-id=1
141 qemu_params = -smp 1,maxcpus=3 -cpu qemu -device qemu-s390x-cpu,core-id=1 -device qemu-s390x-cpu,co…
147 qemu_params = -smp 1,maxcpus=3 -cpu qemu -device qemu-s390x-cpu,core-id=2 -device qemu-s390x-cpu,co…
261 qemu_params = """-cpu max,ctop=on -smp cpus=1,drawers=2,books=2,sockets=2,cores=16,maxcpus=128 \
277 -device max-s390x-cpu,core-id=16,drawer-id=0,book-id=0,socket-id=1,entitlement=high,dedicated=true \
[all …]
H A Dsmp.c77 cc = smp_sigp(1, c->order, 0, &status); in test_invalid()
78 report(cc == 1, "%s", c->message); in test_invalid()
99 set_flag(1); in test_func()
105 smp_cpu_start(1, PSW_WITH_CUR_MASK(test_func)); in test_start()
112 struct cpu *cpu = smp_cpu_from_idx(1); in test_restart()
122 smp_cpu_stop(1); in test_restart()
124 rc = smp_cpu_restart_nowait(1); in test_restart()
126 report(!smp_cpu_stopped(1), "cpu started"); in test_restart()
134 * Wait until cpu 1 has set the flag because it executed the in test_restart()
138 rc = smp_cpu_restart_nowait(1); in test_restart()
[all …]
H A Dadtl-status.c68 set_flag(1); in test_func()
78 uint32_t status = -1; in test_store_adtl_status()
91 smp_cpu_restart(1); in test_store_adtl_status()
93 cc = smp_sigp(1, SIGP_STORE_ADDITIONAL_STATUS, in test_store_adtl_status()
96 report(cc == 1, "CC = 1"); in test_store_adtl_status()
114 smp_cpu_stop(1); in test_store_adtl_status()
116 cc = smp_sigp(1, SIGP_STORE_ADDITIONAL_STATUS, in test_store_adtl_status()
118 report(cc == 1, "CC = 1"); in test_store_adtl_status()
142 smp_cpu_stop(1); in test_store_adtl_status_unavail()
146 cc = smp_sigp(1, SIGP_STORE_ADDITIONAL_STATUS, in test_store_adtl_status_unavail()
[all …]
H A Dpv-attest.c22 #define ARCB_MEAS_HMAC_SHA512 1
24 #define PAF_PHKH_ATT (1ULL << 61)
65 report_skip("Attestation version 1 not supported"); in test_attest_v1()
79 arcb->nks = 1; in test_attest_v1()
91 report(cc == 1 && uvcb.header.rc == 0x101, "invalid continuation token"); in test_attest_v1()
94 uvcb.user_data_length = sizeof(uvcb.user_data) + 1; in test_attest_v1()
96 report(cc == 1 && uvcb.header.rc == 0x102, "invalid user data size"); in test_attest_v1()
101 report(cc == 1 && uvcb.header.rc == 0x103, "invalid address arcb"); in test_attest_v1()
108 report(cc == 1 && uvcb.header.rc == 0x106, "unsupported version"); in test_attest_v1()
111 arcb->req_len += 1; in test_attest_v1()
[all …]
/kvm-unit-tests/x86/
H A Dvmx.h40 #define TEST_ASSERT_EQ(a, b) __TEST_EQ(a, b, #a, #b, 1, __abort_test, "")
42 __TEST_EQ(a, b, #a, #b, 1, __abort_test, fmt, ## args)
46 u32 shadow_vmcs:1;
84 u32 reserved16 : 1;
85 u32 reserved17 : 1;
86 u32 reserved18 : 1;
87 u32 reserved19 : 1;
88 u32 reserved20 : 1;
89 u32 reserved21 : 1;
90 u32 reserved22 : 1;
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H A Ddebug.c69 "rclq $1, n(%rip)\n"
82 got_ud = 1; in handle_ud()
138 is_single_step_db(dr6[1]) && db_addr[1] == start + 1 && in report_singlestep_basic()
139 is_single_step_db(dr6[2]) && db_addr[2] == start + 1 + 1, in report_singlestep_basic()
154 "or $(1<<8),%%rax\n\t" in singlestep_basic()
157 "and $~(1<<8),%%rax\n\t" in singlestep_basic()
158 "1:push %%rax\n\t" in singlestep_basic()
160 "lea 1b(%%rip), %0\n\t" in singlestep_basic()
171 is_single_step_db(dr6[1]) && db_addr[1] == start + 1 && in report_singlestep_emulated_instructions()
172 is_single_step_db(dr6[2]) && db_addr[2] == start + 1 + 3 && in report_singlestep_emulated_instructions()
[all …]
H A Demulator.c29 "S"(st1), "c"(sizeof(st1) - 1)); in test_stringio()
30 asm volatile("inb %1, %0\n\t" : "=a"(r) : "i"((short)TESTDEV_IO_PORT)); in test_stringio()
37 "S"(st1 + sizeof(st1) - 2), "c"(sizeof(st1) - 1)); in test_stringio()
39 asm volatile("in %1, %0\n\t" : "=a"(r) : "i"((short)TESTDEV_IO_PORT)); in test_stringio()
53 report(rcx == 0 && rsi == m1 + 30 && rdi == m3 + 30, "repe/cmpsb (1)"); in test_cmps_one()
56 asm volatile("or $1, %[tmp]\n\t" // clear ZF in test_cmps_one()
61 "repe cmpsb (1.zf)"); in test_cmps_one()
68 report(rcx == 0 && rsi == m1 + 30 && rdi == m3 + 30, "repe cmpsw (1)"); in test_cmps_one()
75 report(rcx == 0 && rsi == m1 + 28 && rdi == m3 + 28, "repe cmpll (1)"); in test_cmps_one()
83 report(rcx == 0 && rsi == m1 + 32 && rdi == m3 + 32, "repe cmpsq (1)"); in test_cmps_one()
[all …]
H A Dsvm.h55 VMCB_CLEAN_INTERCEPTS = 1, /* Intercept vectors, TSC offset, pause filter count */
112 #define TLB_CONTROL_FLUSH_ALL_ASID 1
117 #define V_IRQ_MASK (1 << V_IRQ_SHIFT)
120 #define V_GIF_ENABLED_MASK (1 << V_GIF_ENABLED_SHIFT)
123 #define V_GIF_MASK (1 << V_GIF_SHIFT)
129 #define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)
132 #define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT)
135 #define V_NMI_PENDING_MASK (1 << V_NMI_PENDING_SHIFT)
137 #define V_NMI_BLOCKING_MASK (1 << V_NMI_BLOCKING_SHIFT)
139 #define V_NMI_ENABLE_MASK (1 << V_NMI_ENABLE_SHIFT)
[all …]
H A Dioapic.c17 set_irq_line(line, 1); in toggle_irq_line()
82 report(g_isr_76 == 1, "edge triggered intr"); in test_ioapic_edge_intr()
98 set_irq_line(0x0e, 1); in test_ioapic_level_intr()
100 report(g_isr_77 == 1, "level triggered intr"); in test_ioapic_level_intr()
136 static volatile int g_tmr_79 = -1;
166 set_irq_line(0x0e, 1); in test_ioapic_level_tmr()
186 g_tmr_79 = -1; in test_ioapic_edge_tmr_smp()
190 on_cpu_async(1, toggle_irq_line_0x0e, 0); in test_ioapic_edge_tmr_smp()
192 while(g_tmr_79 == -1) i++; in test_ioapic_edge_tmr_smp()
203 set_irq_line(0x0e, 1); in set_irq_line_0x0e()
[all …]
H A Dhyperv.h9 #define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE (1 << 1)
10 #define HV_X64_MSR_SYNIC_AVAILABLE (1 << 2)
11 #define HV_X64_MSR_SYNTIMER_AVAILABLE (1 << 3)
13 #define HV_STIMER_DIRECT_MODE_AVAILABLE (1 << 19)
57 #define HV_SYNIC_CONTROL_ENABLE (1ULL << 0)
58 #define HV_SYNIC_SIMP_ENABLE (1ULL << 0)
59 #define HV_SYNIC_SIEFP_ENABLE (1ULL << 0)
60 #define HV_SYNIC_SINT_MASKED (1ULL << 16)
61 #define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17)
71 u64 enable:1;
[all …]
/kvm-unit-tests/lib/arm/asm/
H A Dpgtable-hwdef.h14 #define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
15 #define PGDIR_MASK (~((1 << PGDIR_SHIFT) - 1))
17 #define PGD_VALID (_AT(pgdval_t, 1) << 0)
27 #define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
28 #define PMD_MASK (~((1 << PMD_SHIFT) - 1))
30 #define L_PMD_SECT_VALID (_AT(pmdval_t, 1) << 0)
32 #define L_PTE_VALID (_AT(pteval_t, 1) << 0) /* Valid */
34 #define L_PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */
35 #define L_PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */
36 #define L_PTE_YOUNG (_AT(pteval_t, 1) << 10) /* AF */
[all …]
H A Dsysreg.h12 #define CR_M (1 << 0) /* MMU enable */
13 #define CR_A (1 << 1) /* Alignment abort enable */
14 #define CR_C (1 << 2) /* Dcache enable */
15 #define CR_W (1 << 3) /* Write buffer enable */
16 #define CR_P (1 << 4) /* 32-bit exception handler */
17 #define CR_D (1 << 5) /* 32-bit data address range */
18 #define CR_L (1 << 6) /* Implementation defined */
19 #define CR_B (1 << 7) /* Big endian */
20 #define CR_S (1 << 8) /* System MMU protection */
21 #define CR_R (1 << 9) /* ROM MMU protection */
[all …]
/kvm-unit-tests/lib/arm64/asm/
H A Dpgtable-hwdef.h18 * maps is ((max_n - n) - 1) * nr_bits_per_level + PAGE_SHIFT. Since a page
23 (((4 - (n)) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT)
24 #define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3))
29 #define PMD_SIZE (UL(1) << PMD_SHIFT)
30 #define PMD_MASK (~(PMD_SIZE-1))
37 #define PUD_SHIFT PGTABLE_LEVEL_SHIFT(1)
39 #define PUD_SIZE (UL(1) << PUD_SHIFT)
40 #define PUD_MASK (~(PUD_SIZE-1))
46 #define PUD_VALID (_AT(pudval_t, 1) << 0)
50 * (depending on the configuration, this level can be 0, 1 or 2).
[all …]
/kvm-unit-tests/lib/x86/
H A Dmsr.h26 #define EFER_SCE (1<<_EFER_SCE)
27 #define EFER_LME (1<<_EFER_LME)
28 #define EFER_LMA (1<<_EFER_LMA)
29 #define EFER_NX (1<<_EFER_NX)
30 #define EFER_SVME (1<<_EFER_SVME)
31 #define EFER_LMSLE (1<<_EFER_LMSLE)
32 #define EFER_FFXSR (1<<_EFER_FFXSR)
37 #define SPEC_CTRL_STIBP BIT(1)
100 #define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */
101 #define DEBUGCTLMSR_BTF (1UL << 1) /* single-step on branches */
[all …]
H A Dintel-iommu.c29 /* Quad 1 */
30 uint64_t present:1;
39 /* Quad 1 */
40 uint64_t present:1;
41 uint64_t disable_fault_report:1;
48 uint64_t __reserved_2:1;
55 uint32_t present:1;
56 uint32_t fault_disable:1; /* Fault Processing Disable */
57 uint32_t dest_mode:1; /* Destination Mode */
58 uint32_t redir_hint:1; /* Redirection Hint */
[all …]
/kvm-unit-tests/powerpc/
H A Datomics.c28 asm volatile ("1:" in spin_lock()
31 "bne 1b;" in spin_lock()
32 "stwcx. %1,0,%2;" in spin_lock()
33 "bne- 1b;" in spin_lock()
35 : "=&r"(old) : "r"(1), "r"(lock) : "cr0", "memory"); in spin_lock()
41 "stw %1,%0;" in spin_unlock()
63 asm volatile ("1:" in test_lwarx_stwcx()
65 "stwcx. %1,0,%2;" in test_lwarx_stwcx()
66 "bne- 1b;" in test_lwarx_stwcx()
67 : "=&r"(old) : "r"(1), "r"(var) : "cr0", "memory"); in test_lwarx_stwcx()
[all …]
H A Dmmu.c46 asm volatile (".rept 256 ; lbz %0,0(%1) ; tdnei %0,0 ; .endr" : "=&r"(tmp) : "r"(m)); in tlbie_fn()
73 m[1] = alloc_page(); in test_tlbie()
74 p[1] = virt_to_phys(m[1]); in test_tlbie()
75 memset(m[1], 0, PAGE_SIZE); in test_tlbie()
77 memory = alloc_vpages(1); in test_tlbie()
80 assert(ptep == install_page(NULL, p[1], memory)); in test_tlbie()
81 pteval[1] = *ptep; in test_tlbie()
89 while (tlbie_fn_started < nr_cpus_present - 1) { in test_tlbie()
94 *ptep = pteval[1]; in test_tlbie()
96 *(long *)m[0] = -1; in test_tlbie()
[all …]
H A Drtas.c23 year -= 1; in mktime()
26 /* compute epoch: substract DAYS(since_March(1-1-1970)) */ in mktime()
28 epoch = DAYS(year, month, day) - DAYS(1969, 11, 1); in mktime()
37 #define DELAY 1
58 report(now[2] >= 1 && now[2] <= 31, "day"); in check_get_time_of_day()
59 report(now[1] >= 1 && now[1] <= 12, "month"); in check_get_time_of_day()
61 report(mktime(now[0], now[1], now[2], now[3], now[4], now[5]) - start < 3, in check_get_time_of_day()
65 t1 = mktime(now[0], now[1], now[2], now[3], now[4], now[5]); in check_get_time_of_day()
69 t2 = mktime(now[0], now[1], now[2], now[3], now[4], now[5]); in check_get_time_of_day()
89 ret = rtas_call(stod_token, 7, 1, NULL, 2000, 2, 28, 23, 59, 59); in check_set_time_of_day()
[all …]
/kvm-unit-tests/lib/s390x/asm/
H A Dmem.h24 uint8_t fp : 1;
25 uint8_t rf : 1;
26 uint8_t ch : 1;
27 uint8_t pad : 1;
35 asm volatile(".insn rrf,0xb22b0000,%0,%1,8,0" in set_storage_key()
38 asm volatile("sske %0,%1" : : "d" (skey), "a" (addr)); in set_storage_key()
45 asm volatile(".insn rrf,0xb22b0000,%[skey],%[addr],1,0" in set_storage_key_mb()
54 asm volatile("iske %0,%1" : "=d" (skey) : "a" (addr)); in get_storage_key()
63 "rrbe 0,%1\n" in reset_reference_bit()
71 #define PFMF_FSC_1M 1
[all …]
/kvm-unit-tests/arm/
H A Dpmu.c24 #define PMU_PMCR_E (1 << 0)
25 #define PMU_PMCR_P (1 << 1)
26 #define PMU_PMCR_C (1 << 2)
27 #define PMU_PMCR_D (1 << 3)
28 #define PMU_PMCR_X (1 << 4)
29 #define PMU_PMCR_DP (1 << 5)
30 #define PMU_PMCR_LC (1 << 6)
31 #define PMU_PMCR_LP (1 << 7)
71 * PRE_OVERFLOW2 is set so that 1st @COUNT iterations do not
116 #define PMXEVTYPER __ACCESS_CP15(c9, 0, c13, 1)
[all …]
/kvm-unit-tests/lib/ppc64/asm/
H A Dmmu.h18 " tlbie %0,%1,%2,%3,%4 \n" in tlbie()
32 " tlbiel %0,%1,%2,%3,%4 \n" in tlbiel()
41 unsigned long rs = (1ULL << 32); /* pid */ in flush_tlb_page()
50 ap = 1; in flush_tlb_page()
56 rb = vaddr & ~((1UL << 12) - 1); in flush_tlb_page()
59 tlbie(rb, rs, 0, 1, 1); in flush_tlb_page()
65 unsigned long rs = (1ULL << 32); /* pid */ in flush_tlb_page_local()
74 ap = 1; in flush_tlb_page_local()
80 rb = vaddr & ~((1UL << 12) - 1); in flush_tlb_page_local()
83 tlbiel(rb, rs, 0, 1, 1); in flush_tlb_page_local()
/kvm-unit-tests/lib/riscv/asm/
H A Dpgtable.h32 #define _PAGE_PRESENT (1 << 0)
33 #define _PAGE_READ (1 << 1)
34 #define _PAGE_WRITE (1 << 2)
35 #define _PAGE_EXEC (1 << 3)
36 #define _PAGE_USER (1 << 4)
37 #define _PAGE_GLOBAL (1 << 5)
38 #define _PAGE_ACCESSED (1 << 6)
39 #define _PAGE_DIRTY (1 << 7)
/kvm-unit-tests/lib/x86/asm/
H A Dpage.h34 #define PT_PRESENT_MASK (1ull << 0)
35 #define PT_WRITABLE_MASK (1ull << 1)
36 #define PT_USER_MASK (1ull << 2)
37 #define PT_ACCESSED_MASK (1ull << 5)
38 #define PT_DIRTY_MASK (1ull << 6)
39 #define PT_PAGE_SIZE_MASK (1ull << 7)
40 #define PT_GLOBAL_MASK (1ull << 8)
41 #define PT64_NX_MASK (1ull << 63)
59 #define PDPTE64_PAGE_SIZE_MASK (1ull << 7)
65 GENMASK_ULL(8, 5) | GENMASK_ULL(2, 1))
[all …]
/kvm-unit-tests/riscv/
H A Dsbi-tests.h5 #define SBI_HSM_TEST_DONE (1 << 0)
6 #define SBI_HSM_TEST_MAGIC_A1 (1 << 1)
7 #define SBI_HSM_TEST_HARTID_A0 (1 << 2)
8 #define SBI_HSM_TEST_SATP (1 << 3)
9 #define SBI_HSM_TEST_SIE (1 << 4)
14 #define SBI_HSM_HARTID_IDX 1
18 #define SBI_SUSP_CSRS_IDX 1
25 #define SBI_CSR_SIE_IDX 1
33 #define SBI_SUSP_TEST_SATP (1 << 0)
34 #define SBI_SUSP_TEST_SIE (1 << 1)
[all …]
/kvm-unit-tests/scripts/
H A Dcommon.bash6 local unittests="$1"
29 rematch=${BASH_REMATCH[1]}
34 smp="$(vmm_optname_nr_cpus) 1"
50 kernel=$TEST_DIR/${BASH_REMATCH[1]}
52 smp="$(vmm_optname_nr_cpus) ${BASH_REMATCH[1]}"
54 test_args="$(vmm_optname_args) ${BASH_REMATCH[1]}"
60 if (( ${#BASH_REMATCH[1]} % 2 == 1 )); then
65 opts+=${BASH_REMATCH[1]}
74 groups=${BASH_REMATCH[1]}
76 arch=${BASH_REMATCH[1]}
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