Merge tag 'kvm-x86-2023.09.01' of https://github.com/kvm-x86/kvm-unit-tests into HEAD

x86 fixes, cleanups, and new testcases, and a few generic changes

- Fix a bug in runtime.bash that caused it t

Merge tag 'kvm-x86-2023.09.01' of https://github.com/kvm-x86/kvm-unit-tests into HEAD

x86 fixes, cleanups, and new testcases, and a few generic changes

- Fix a bug in runtime.bash that caused it to mishandle "check" strings with
multiple entries, e.g. a test that depends on multiple module params
- Make the PMU tests depend on vPMU support being enabled in KVM
- Fix PMU's forced emulation test on CPUs with full-width writes
- Add a PMU testcase for measuring TSX transactional cycles
- Nested SVM testcase for virtual NMIs
- Move a pile of code to ASM_TRY() and "safe" helpers
- Set up the guest stack in the LBRV tests so that the tests don't fail if the
compiler decides to generate function calls in guest code
- Ignore the "mispredict" flag in nSVM's LBRV tests to fix false failures
- Clean up usage of helpers that disable interrupts, e.g. stop inserting
unnecessary nops
- Add helpers to dedup code for programming the APIC timer
- Fix a variety of bugs in nVMX testcases related to being a 64-bit host

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x86: introduce sti_nop() and sti_nop_cli()

Add functions that shorten the common usage of sti

Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito <eesposit@r

x86: introduce sti_nop() and sti_nop_cli()

Add functions that shorten the common usage of sti

Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Link: https://lore.kernel.org/r/20221122161152.293072-3-mlevitsk@redhat.com
[sean: massage comments]
Signed-off-by: Sean Christopherson <seanjc@google.com>

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x86: replace irq_{enable|disable}() with sti()/cli()

This removes a layer of indirection which is strictly
speaking not needed since its x86 code anyway.

Signed-off-by: Maxim Levitsky <mlevitsk@red

x86: replace irq_{enable|disable}() with sti()/cli()

This removes a layer of indirection which is strictly
speaking not needed since its x86 code anyway.

Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Link: https://lore.kernel.org/r/20221122161152.293072-2-mlevitsk@redhat.com
[sean: move and reword IRQ shadow to be above and about safe_halt()]
Signed-off-by: Sean Christopherson <seanjc@google.com>

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ioapic: poll for completion of other CPUs in level-triggered SMP tests

The IOAPIC does not do anything if a level-triggered interrupt is asserted
while its REMOTE_IRR bit is set in the redirection t

ioapic: poll for completion of other CPUs in level-triggered SMP tests

The IOAPIC does not do anything if a level-triggered interrupt is asserted
while its REMOTE_IRR bit is set in the redirection table, and this can
cause a race condition between test_ioapic_physical_destination_mode
and test_ioapic_logical_destination_mode. If CPU 1 is still running in
ioapic_isr_85 and has not sent the EOI, while CPU 0 has already reached
the set_irq_line(0x0e, 1) line of test_ioapic_logical_destination_mode,
the interrupt is dropped and the test hangs.

For some reason, this has started to occur about 20-30% of the time with
a 5.20-rc0 debug kernel. With this patch, the ioapic test has survived
100 iterations without failing.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: vmx: Add test for SIPI signal processing

The test verifies the following functionality:
A SIPI signal received when CPU is in VMX non-root mode:
if ACTIVITY_STATE == WAIT_SIPI
VMExi

x86: vmx: Add test for SIPI signal processing

The test verifies the following functionality:
A SIPI signal received when CPU is in VMX non-root mode:
if ACTIVITY_STATE == WAIT_SIPI
VMExit with (reason == 4)
else
SIPI signal is ignored

The test cases depends on IA32_VMX_MISC:bit(8), if this bit is 1
then the test cases would be executed, otherwise the test cases
would be skiped.

Signed-off-by: Yadong Qi <yadong.qi@intel.com>
Message-Id: <20201013052845.249113-1-yadong.qi@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: always set up SMP

Currently setup_vm cannot assume that it can invoke IPIs, and therefore
only initializes CR0/CR3/CR4 on the CPU it runs on. In order to keep the
initialization code clean, le

x86: always set up SMP

Currently setup_vm cannot assume that it can invoke IPIs, and therefore
only initializes CR0/CR3/CR4 on the CPU it runs on. In order to keep the
initialization code clean, let's just call smp_init (and therefore
setup_idt) unconditionally.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: ioapic: Run physical destination mode test iff cpu_count() > 1

Make test_ioapic_physical_destination_mode() depending on having at
least two CPUs as it sets ->dest_id to '1', i.e. expects CPU0

x86: ioapic: Run physical destination mode test iff cpu_count() > 1

Make test_ioapic_physical_destination_mode() depending on having at
least two CPUs as it sets ->dest_id to '1', i.e. expects CPU0 and CPU1
to exist. This analysis is backed up by the fact that the test was
originally gated by cpu_count() > 1.

Fixes: dcf27dc5b5499 ("x86: Fix the logical destination mode test")
Cc: Nitesh Narayan Lal <nitesh@redhat.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Message-Id: <20200423195050.26310-1-sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Fix the logical destination mode test

There are following issues with the ioapic logical destination mode test:

- A race condition that is triggered when the interrupt handler
  ioapic_isr_86(

x86: Fix the logical destination mode test

There are following issues with the ioapic logical destination mode test:

- A race condition that is triggered when the interrupt handler
  ioapic_isr_86() is called at the same time by multiple vCPUs. Due to this
the g_isr_86 is not correctly incremented. To prevent this a spinlock is
added around ‘g_isr_86++’.

- On older QEMU versions initial x2APIC ID is not set, that is why
  the local APIC IDs of each vCPUs are not configured. Hence the logical
  destination mode test fails/hangs. Adding ‘+x2apic’ to the qemu -cpu params
  ensures that the local APICs are configured every time, irrespective of the
  QEMU version.

- With ‘-machine kernel_irqchip=split’ included in the ioapic test
  test_ioapic_self_reconfigure() always fails and somehow leads to a state where
  after submitting IOAPIC fixed delivery - logical destination mode request we
  never receive an interrupt back. For now, the physical and logical destination
  mode tests are moved above test_ioapic_self_reconfigure().

Fixes: b2a1ee7e ("kvm-unit-test: x86: ioapic: Test physical and logical destination mode")
Signed-off-by: Nitesh Narayan Lal <nitesh@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Switch the order of the parameters in report() and report_xfail()

Commit c09c54c66b1df ("lib: use an argument which doesn't require
default argument promotion") fixed a warning that occurs with Clan

Switch the order of the parameters in report() and report_xfail()

Commit c09c54c66b1df ("lib: use an argument which doesn't require
default argument promotion") fixed a warning that occurs with Clang,
but introduced a regression: If the "pass" parameter is a value
which has only set the condition bits in the upper 32 bits of a
64 bit value, the condition is now false since the value is truncated
to "unsigned int" so that the upper bits are simply discarded.

We fixed it by reverting the commit, but that of course also means
trouble with Clang again. We can not use "bool" if it is the last
parameter before the variable argument list. The proper fix is to
swap the parameters around and make the format string the last
parameter.

This patch (except the changes in lib/libcflat.h and lib/report.c
and some rebase conflicts along the way) has basically been created
with following coccinelle script (with some additional manual tweaking
of long and disabled lines afterwards):

@@
expression fmt;
expression pass;
expression list args;
@@
report(
-fmt, pass
+pass, fmt
, args);

@@
expression fmt;
expression pass;
expression list args;
@@
report_xfail(
-fmt, xfail, pass
+xfail, pass, fmt
, args);

Tested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20191206113102.14914-1-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: ioapic: Test physical and logical destination mode

This patch tests the physical destination mode by sending an
interrupt to one of the vcpus and logical destination mode by
sending an interrup

x86: ioapic: Test physical and logical destination mode

This patch tests the physical destination mode by sending an
interrupt to one of the vcpus and logical destination mode by
sending an interrupt to more than one vcpus.

Signed-off-by: Nitesh Narayan Lal <nitesh@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Incorporate timestamp in delay(), call it in io_delay()

There is no guarantee that a self-IPI would be delivered immediately.
In eventinj, io_delay() is called after self-IPI is generated but d

x86: Incorporate timestamp in delay(), call it in io_delay()

There is no guarantee that a self-IPI would be delivered immediately.
In eventinj, io_delay() is called after self-IPI is generated but does
nothing.

In general, there is mess in regard to delay() and io_delay(). There are
two definitions of delay() and they do not really look on the timestamp
counter and instead count invocations of "pause" (or even "nop"), which
might be different on different CPUs/setups, for example due to
different pause-loop-exiting configurations.

To address these issues change io_delay() to really do a delay, based on
timestamp counter, and move common functions into delay.[hc].

Cc: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
[Drop the taskswitch2.c io_delay too - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: lib: Rename set_ioapic_redir() to ioapic_set_redir()

This is consistent with the naming scheme of rest of ioapic utils.

Signed-off-by: Liran Alon <liran.alon@oracle.com>
Reviewed-by: Krish Sad

x86: lib: Rename set_ioapic_redir() to ioapic_set_redir()

This is consistent with the naming scheme of rest of ioapic utils.

Signed-off-by: Liran Alon <liran.alon@oracle.com>
Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Message-Id: <1521674594-12085-4-git-send-email-liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: lib: Expose IOAPIC/APIC globals and utils to lib

Signed-off-by: Arbel Moshe <arbel.moshe@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Reviewed-by: Krish Sadhukhan <krish.sadhuk

x86: lib: Expose IOAPIC/APIC globals and utils to lib

Signed-off-by: Arbel Moshe <arbel.moshe@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Message-Id: <1521674594-12085-3-git-send-email-liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: ioapic: Test self-reconfiguration from interrupt handler

Make sure that we can reconfigure the destination of an irq from the
interrupt handler. Make sure that the EOI is correctly delivered to

x86: ioapic: Test self-reconfiguration from interrupt handler

Make sure that we can reconfigure the destination of an irq from the
interrupt handler. Make sure that the EOI is correctly delivered to
the IOAPIC and that remote_irr is reset to 0.

This tests the fix introduced by commit "KVM: x86: ioapic: Fix
level-triggered EOI and IOAPIC reconfigure race".

Signed-off-by: Nikita Leshenko <nikita.leshchenko@oracle.com>
Reviewed-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Message-Id: <20171107080933.20924-1-nikita.leshchenko@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: ioapic: generalize trigger mode

Move it out of x86/ioapic.c since it can be further re-used. Also,
renaming into TRIGGER_*.

Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Paolo Bon

x86: ioapic: generalize trigger mode

Move it out of x86/ioapic.c since it can be further re-used. Also,
renaming into TRIGGER_*.

Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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tests: don't call setup_idt() if with smp_init()

smp_init() will setup idt as default. No need to call it twice.

Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@r

tests: don't call setup_idt() if with smp_init()

smp_init() will setup idt as default. No need to call it twice.

Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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ioapic: more TMR tests

Test that TMR works right even if the virtual-APIC page is modified
by another processor. Either x2apic or xapic accesses are tested,
depending on whether x2apic is available

ioapic: more TMR tests

Test that TMR works right even if the virtual-APIC page is modified
by another processor. Either x2apic or xapic accesses are tested,
depending on whether x2apic is available.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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ioapic: test TMR behavior

Test that TMR works right even if the virtual-APIC page is modified
by another processor. Either x2apic or xapic accesses are tested,
depending on whether x2apic is availa

ioapic: test TMR behavior

Test that TMR works right even if the virtual-APIC page is modified
by another processor. Either x2apic or xapic accesses are tested,
depending on whether x2apic is available.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: ioapic: add tests around retriggering of level interrupts

Test resampling of level interrupts after EOI, by leaving the IRQ
line set in the ISR. One tests does reset the IRQ line after a while

x86: ioapic: add tests around retriggering of level interrupts

Test resampling of level interrupts after EOI, by leaving the IRQ
line set in the ISR. One tests does reset the IRQ line after a while,
the other uses masking instead in the ISR.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: extend IOAPIC tests

Add tests for fundamental behaviors of the IOAPIC:
Edge & level triggered interrupts
Level triggered interrupt coalescing
Level triggered EOIs
Interrupt

x86: extend IOAPIC tests

Add tests for fundamental behaviors of the IOAPIC:
Edge & level triggered interrupts
Level triggered interrupt coalescing
Level triggered EOIs
Interrupt masking

Passes with most recent version of KVM on Intel x86.

Signed-off-by: Steve Rutherford <srutherford@google.com>
Message-Id: <1431482143-28018-2-git-send-email-srutherford@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Split APIC tests into IOAPIC/APIC tests

Split apart the APIC tests into constituent parts (IOAPIC and APIC tests).

Signed-off-by: Steve Rutherford <srutherford@google.com>
Message-Id: <1431482

x86: Split APIC tests into IOAPIC/APIC tests

Split apart the APIC tests into constituent parts (IOAPIC and APIC tests).

Signed-off-by: Steve Rutherford <srutherford@google.com>
Message-Id: <1431482143-28018-1-git-send-email-srutherford@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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