1c865f654SCornelia Huck #ifndef _ASMX86_PAGE_H_ 2c865f654SCornelia Huck #define _ASMX86_PAGE_H_ 33e394a58SAlexander Gordeev /* 43e394a58SAlexander Gordeev * Copyright (C) 2016, Red Hat Inc, Alexander Gordeev <agordeev@redhat.com> 53e394a58SAlexander Gordeev * 63e394a58SAlexander Gordeev * This work is licensed under the terms of the GNU LGPL, version 2. 73e394a58SAlexander Gordeev */ 83e394a58SAlexander Gordeev 93e394a58SAlexander Gordeev 101ad15f10SAlexander Gordeev #include <linux/const.h> 11d10d16e1SAlexander Gordeev #include <bitops.h> 121ad15f10SAlexander Gordeev 134363f1d9SPaolo Bonzini typedef unsigned long pteval_t; 144363f1d9SPaolo Bonzini typedef unsigned long pgd_t; 154363f1d9SPaolo Bonzini 16ea71612bSClaudio Imbrenda #include <asm-generic/page.h> 171ad15f10SAlexander Gordeev 18*f372d35fSSean Christopherson #ifndef __ASSEMBLER__ 191ad15f10SAlexander Gordeev 205b70cbdbSClaudio Imbrenda #define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE) 215b70cbdbSClaudio Imbrenda 223e394a58SAlexander Gordeev #ifdef __x86_64__ 233e394a58SAlexander Gordeev #define LARGE_PAGE_SIZE (512 * PAGE_SIZE) 243e394a58SAlexander Gordeev #else 253e394a58SAlexander Gordeev #define LARGE_PAGE_SIZE (1024 * PAGE_SIZE) 263e394a58SAlexander Gordeev #endif 273e394a58SAlexander Gordeev 28c98ce6e0SAlexandru Elisei #ifdef CONFIG_EFI 2930203ea5SZixuan Wang /* lib/x86/amd_sev.c */ 3030203ea5SZixuan Wang extern unsigned long long get_amd_sev_c_bit_mask(void); 3130203ea5SZixuan Wang extern unsigned long long get_amd_sev_addr_upperbound(void); 32c98ce6e0SAlexandru Elisei #endif /* CONFIG_EFI */ 3330203ea5SZixuan Wang 34d10d16e1SAlexander Gordeev #define PT_PRESENT_MASK (1ull << 0) 35d10d16e1SAlexander Gordeev #define PT_WRITABLE_MASK (1ull << 1) 36d10d16e1SAlexander Gordeev #define PT_USER_MASK (1ull << 2) 37d10d16e1SAlexander Gordeev #define PT_ACCESSED_MASK (1ull << 5) 38d10d16e1SAlexander Gordeev #define PT_DIRTY_MASK (1ull << 6) 39d10d16e1SAlexander Gordeev #define PT_PAGE_SIZE_MASK (1ull << 7) 40e6f65fa4SZixuan Wang #define PT_GLOBAL_MASK (1ull << 8) 41d10d16e1SAlexander Gordeev #define PT64_NX_MASK (1ull << 63) 4230203ea5SZixuan Wang 4330203ea5SZixuan Wang /* 4430203ea5SZixuan Wang * Without AMD SEV, the default address upper bound is 51 (i.e., pte bit 51 and 4530203ea5SZixuan Wang * lower bits are addresses). But with AMD SEV enabled, the upper bound is one 4630203ea5SZixuan Wang * bit lower than the c-bit position. 4730203ea5SZixuan Wang */ 4830203ea5SZixuan Wang #define PT_ADDR_UPPER_BOUND_DEFAULT (51) 4930203ea5SZixuan Wang 50c98ce6e0SAlexandru Elisei #ifdef CONFIG_EFI 5130203ea5SZixuan Wang #define PT_ADDR_UPPER_BOUND (get_amd_sev_addr_upperbound()) 5230203ea5SZixuan Wang #else 5330203ea5SZixuan Wang #define PT_ADDR_UPPER_BOUND (PT_ADDR_UPPER_BOUND_DEFAULT) 54c98ce6e0SAlexandru Elisei #endif /* CONFIG_EFI */ 5530203ea5SZixuan Wang 5630203ea5SZixuan Wang #define PT_ADDR_LOWER_BOUND (PAGE_SHIFT) 5730203ea5SZixuan Wang #define PT_ADDR_MASK GENMASK_ULL(PT_ADDR_UPPER_BOUND, PT_ADDR_LOWER_BOUND) 583e394a58SAlexander Gordeev 59be704affSPeter Shier #define PDPTE64_PAGE_SIZE_MASK (1ull << 7) 6030203ea5SZixuan Wang #define PDPTE64_RSVD_MASK GENMASK_ULL(PT_ADDR_UPPER_BOUND, cpuid_maxphyaddr()) 61be704affSPeter Shier 62359575f6SPeter Feiner #define PT_AD_MASK (PT_ACCESSED_MASK | PT_DIRTY_MASK) 63359575f6SPeter Feiner 64be704affSPeter Shier #define PAE_PDPTE_RSVD_MASK (GENMASK_ULL(63, cpuid_maxphyaddr()) | \ 65be704affSPeter Shier GENMASK_ULL(8, 5) | GENMASK_ULL(2, 1)) 66be704affSPeter Shier 67be704affSPeter Shier 683e394a58SAlexander Gordeev #ifdef __x86_64__ 693e394a58SAlexander Gordeev #define PAGE_LEVEL 4 70be704affSPeter Shier #define PDPT_LEVEL 3 713e394a58SAlexander Gordeev #define PGDIR_WIDTH 9 723e394a58SAlexander Gordeev #define PGDIR_MASK 511 733e394a58SAlexander Gordeev #else 743e394a58SAlexander Gordeev #define PAGE_LEVEL 2 753e394a58SAlexander Gordeev #define PGDIR_WIDTH 10 763e394a58SAlexander Gordeev #define PGDIR_MASK 1023 773e394a58SAlexander Gordeev #endif 783e394a58SAlexander Gordeev 799d7e08c0SPeter Xu #define PGDIR_BITS(lvl) (((lvl) - 1) * PGDIR_WIDTH + PAGE_SHIFT) 809d7e08c0SPeter Xu #define PGDIR_OFFSET(va, lvl) (((va) >> PGDIR_BITS(lvl)) & PGDIR_MASK) 819d7e08c0SPeter Xu 82*f372d35fSSean Christopherson #endif /* !__ASSEMBLER__ */ 833e394a58SAlexander Gordeev #endif 84