arm64/asm/pgtable-hwdef.h

18  * maps is ((max_n - n) - 1) * nr_bits_per_level + PAGE_SHIFT. Since a page
23 	(((4 - (n)) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT)
24 #define PTRS_PER_PTE		(1 << (PAGE_SHIFT - 3))
29 #define PMD_SIZE		(UL(1) << PMD_SHIFT)
30 #define PMD_MASK		(~(PMD_SIZE-1))
37 #define PUD_SHIFT		PGTABLE_LEVEL_SHIFT(1)
39 #define PUD_SIZE		(UL(1) << PUD_SHIFT)
40 #define PUD_MASK		(~(PUD_SIZE-1))
46 #define PUD_VALID		(_AT(pudval_t, 1) << 0)
50  * (depending on the configuration, this level can be 0, 1 or 2).
53 #define PGDIR_SIZE		(_AC(1, UL) << PGDIR_SHIFT)
54 #define PGDIR_MASK		(~(PGDIR_SIZE-1))
55 #define PTRS_PER_PGD		(1 << (VA_BITS - PGDIR_SHIFT))
57 #define PGD_VALID		(_AT(pgdval_t, 1) << 0)
63 #define SECTION_SIZE		(_AC(1, UL) << SECTION_SHIFT)
64 #define SECTION_MASK		(~(SECTION_SIZE-1))
69  * Level 0,1,2 descriptor (PGD, PUD and PMD).
74 #define PMD_TYPE_SECT		(_AT(pmdval_t, 1) << 0)
75 #define PMD_TABLE_BIT		(_AT(pmdval_t, 1) << 1)
80 #define PMD_SECT_VALID		(_AT(pmdval_t, 1) << 0)
81 #define PMD_SECT_PROT_NONE	(_AT(pmdval_t, 1) << 58)
82 #define PMD_SECT_USER		(_AT(pmdval_t, 1) << 6)		/* AP[1] */
83 #define PMD_SECT_RDONLY		(_AT(pmdval_t, 1) << 7)		/* AP[2] */
85 #define PMD_SECT_AF		(_AT(pmdval_t, 1) << 10)
86 #define PMD_SECT_NG		(_AT(pmdval_t, 1) << 11)
87 #define PMD_SECT_PXN		(_AT(pmdval_t, 1) << 53)
88 #define PMD_SECT_UXN		(_AT(pmdval_t, 1) << 54)
102 #define PTE_VALID		(_AT(pteval_t, 1) << 0)
103 #define PTE_TABLE_BIT		(_AT(pteval_t, 1) << 1)
104 #define PTE_USER		(_AT(pteval_t, 1) << 6)		/* AP[1] */
105 #define PTE_RDONLY		(_AT(pteval_t, 1) << 7)		/* AP[2] */
106 #define PTE_SHARED		(_AT(pteval_t, 3) << 8)		/* SH[1:0], inner shareable */
107 #define PTE_AF			(_AT(pteval_t, 1) << 10)	/* Access Flag */
108 #define PTE_NG			(_AT(pteval_t, 1) << 11)	/* nG */
109 #define PTE_PXN			(_AT(pteval_t, 1) << 53)	/* Privileged XN */
110 #define PTE_UXN			(_AT(pteval_t, 1) << 54)	/* User XN */
122 #define PHYS_MASK		((UL(1) << PHYS_MASK_SHIFT) - 1)
129 #define TCR_IRGN_WBWA		((UL(1) << 8) | (UL(1) << 24))
134 #define TCR_ORGN_WBWA		((UL(1) << 10) | (UL(1) << 26))
139 #define TCR_EPD1		(UL(1) << 23)
141 #define TCR_TG0_64K		(UL(1) << 14)
143 #define TCR_TG1_16K		(UL(1) << 30)
146 #define TCR_ASID16		(UL(1) << 36)
147 #define TCR_TBI0		(UL(1) << 37)
148 #define TCR_TBI1		(UL(1) << 38)
149 #define TCR_TCMA0		(UL(1) << 57)
155 #define MT_DEVICE_nGnRE		1	/* device */