/kvm-unit-tests/x86/ |
H A D | svm_tests.c | 46 return vmcb->control.exit_code == SVM_EXIT_VMMCALL; in null_check() 51 vmcb->control.intercept &= ~(1ULL << INTERCEPT_VMRUN); in prepare_no_vmrun_int() 56 return vmcb->control.exit_code == SVM_EXIT_ERR; in check_no_vmrun_int() 66 return vmcb->control.exit_code == SVM_EXIT_VMRUN; in check_vmrun() 72 vmcb->control.intercept |= 1 << INTERCEPT_RSM; in prepare_rsm_intercept() 73 vmcb->control.intercept_exceptions |= (1ULL << UD_VECTOR); in prepare_rsm_intercept() 90 if (vmcb->control.exit_code != SVM_EXIT_RSM) { in finished_rsm_intercept() 92 vmcb->control.exit_code); in finished_rsm_intercept() 95 vmcb->control.intercept &= ~(1 << INTERCEPT_RSM); in finished_rsm_intercept() 100 if (vmcb->control.exit_code != SVM_EXIT_EXCP_BASE + UD_VECTOR) { in finished_rsm_intercept() [all …]
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H A D | svm_npt.c | 33 return (vmcb->control.exit_code == SVM_EXIT_NPF) in npt_np_check() 34 && (vmcb->control.exit_info_1 == 0x100000004ULL); in npt_np_check() 60 return (vmcb->control.exit_code == SVM_EXIT_NPF) in npt_nx_check() 61 && (vmcb->control.exit_info_1 == 0x100000015ULL); in npt_nx_check() 85 return (vmcb->control.exit_code == SVM_EXIT_NPF) in npt_us_check() 86 && (vmcb->control.exit_info_1 == 0x100000005ULL); in npt_us_check() 112 return (vmcb->control.exit_code == SVM_EXIT_NPF) in npt_rw_check() 113 && (vmcb->control.exit_info_1 == 0x100000007ULL); in npt_rw_check() 132 return (vmcb->control.exit_code == SVM_EXIT_NPF) in npt_rw_pfwalk_check() 133 && (vmcb->control.exit_info_1 == 0x200000007ULL) in npt_rw_pfwalk_check() [all …]
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H A D | vmx_tests.c | 881 * name/control flag/insn function/type/exit reason/exit qulification/ 2483 * following 511 entries are also under our control (and not touched by in ept_access_paddr() 2918 * control is 0. in ept_access_test_ignored_bits() 3439 * Test a particular value of a VM-execution control bit, if the value 3454 * We can't arbitrarily turn on a control bit, because it may in test_rsvd_ctl_bit_value() 3481 * Test reserved values of a VM-execution control bit, based on the 3527 * VM-execution control is 1, reserved bits in the secondary 3532 * VM-execution control is 0 (or if the processor does not support the 3533 * 1-setting of that control), no checks are performed on the 3556 * When the "activate secondary controls" VM-execution control in test_secondary_processor_based_ctls() [all …]
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H A D | lam.c | 243 * Note, LAM doesn't have a global control bit to turn on/off LAM in test_lam_user() 246 * doesn't expose LAM to guest, the guest can still set LAM control bits in test_lam_user()
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H A D | svm.c | 163 struct vmcb_control_area *ctrl = &vmcb->control; in vmcb_ident() 238 return (vmcb->control.exit_code); in __svm_vmrun()
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H A D | cet.c | 111 /* Enable CET master control bit in CR4. */ in main()
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/kvm-unit-tests/lib/linux/ |
H A D | pci_regs.h | 182 #define PCI_CB_BRIDGE_CTL_PARITY 0x01 /* Similar to standard bridge control register */ 210 #define PCI_CAP_ID_CCRC 0x0B /* CompactPCI Central Resource Control */ 243 #define PCI_PM_CTRL 4 /* PM control and status register */ 252 #define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (??) */ 268 #define PCI_AGP_COMMAND 8 /* Control register */ 296 #define PCI_MSI_FLAGS 2 /* Message Control */ 313 #define PCI_MSIX_FLAGS 2 /* Message Control */ 336 #define PCI_CHSWP_CSR 2 /* Control and Status Register */ 432 #define PCI_X_ECC_CSR 8 /* ECC control and status */ 484 #define PCI_EXP_DEVCTL 8 /* Device Control */ [all …]
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/kvm-unit-tests/s390x/ |
H A D | mvpg.c | 102 * Key Function Control values 4 and 5 are allowed only in supervisor in test_exceptions() 113 report(clear_pgm_int() == expected, "Key Function Control value %d", i); in test_exceptions() 116 report_skip("Key Function Control value %d", 4); in test_exceptions() 117 report_skip("Key Function Control value %d", 5); in test_exceptions() 123 * Invalid values of the Key Function Control, or setting the in test_exceptions() 130 report(clear_pgm_int() == expected, "Key Function Control value 3"); in test_exceptions() 134 report(clear_pgm_int() == expected, "Key Function Control value %d", i); in test_exceptions()
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H A D | cstart64.S | 42 /* setup initial PSW mask + control registers*/ 76 /* setup cr0, enabling e.g. AFP-register control */ 126 /* enable AFP-register control, so FP regs (+BFP instr) can be used */
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H A D | cpu-sie.S | 14 * %r2 pointer to sie control block 30 stg %r2,__SF_SIE_CONTROL(%r15) # save control block pointer
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H A D | cpu.S | 41 /* load a cr0 that has the AFP control bit which enables all FPRs */
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H A D | gs.c | 101 /* Enable control bit for gs */ in init()
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/kvm-unit-tests/lib/x86/ |
H A D | intel-iommu.h | 45 #define DMAR_FECTL_REG 0x38 /* Fault control */ 49 #define DMAR_AFLOG_REG 0x58 /* Advanced fault control */ 67 #define DMAR_IECTL_REG 0xa0 /* Invalidation event control */ 78 #define DMAR_PECTL_REG 0xe0 /* Page request event control */
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/kvm-unit-tests/lib/ |
H A D | acpi.h | 90 u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ 91 u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ 92 u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ 124 …struct acpi_generic_address xpm1a_control_block; /* 64-bit Extended Power Mgt 1a Control Reg Blk a… 125 …struct acpi_generic_address xpm1b_control_block; /* 64-bit Extended Power Mgt 1b Control Reg Blk a… 126 …struct acpi_generic_address xpm2_control_block; /* 64-bit Extended Power Mgt 2 Control Reg Blk add… 130 struct acpi_generic_address sleep_control; /* 64-bit Sleep Control register (ACPI 5.0) */
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H A D | chr-testdev.h | 5 * The chr-testdev backend exposes a simple control interface to
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H A D | pci.c | 293 uint16_t control = pci_config_readw(dev->bdf, cap_offset + PCI_MSI_FLAGS); in pci_cap_print() local 294 printf("\tMSI,%s-bit capability ", control & PCI_MSI_FLAGS_64BIT ? "64" : "32"); in pci_cap_print()
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/kvm-unit-tests/lib/s390x/ |
H A D | sie.h | 37 struct esca_block *sca; /* System Control Area */ 38 uint8_t *crycb; /* Crypto Control Block */
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H A D | css_dump.c | 14 * - CCW : Channel Command Word, describes the command, data and flow control 19 * - PMCW: Path Management Control Word
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H A D | sclp.h | 67 /* SCLP control mask bits */ 78 /* Service Call Control Block (SCCB) and its elements */
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H A D | css.h | 122 uint16_t cu_type; /* control unit type */ 123 uint8_t cu_model; /* control unit model */
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/kvm-unit-tests/s390x/snippets/asm/ |
H A D | icpt-loop.S | 4 * control block intercepts. E.g. when manipulating the PV handles.
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/kvm-unit-tests/s390x/snippets/c/ |
H A D | cstart.S | 42 /* enable AFP-register control, so FP regs (+BFP instr) can be used */
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/kvm-unit-tests/lib/arm/ |
H A D | processor.c | 2 * processor control and status functions 63 printf("Control: %08x Table: %08x DAC: %08x\n", in show_regs()
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/kvm-unit-tests/lib/arm64/asm/ |
H A D | ptrace.h | 49 #define PSR_c 0x000000ff /* Control */
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/kvm-unit-tests/lib/arm/asm/ |
H A D | ptrace.h | 45 #define PSR_c 0x000000ff /* Control */
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