xref: /kvm-unit-tests/lib/arm/asm/ptrace.h (revision 0cc3a351b925928827baa4b69cf0e46ff5837083)
1d3aacb4fSAndrew Jones #ifndef _ASMARM_PTRACE_H_
2d3aacb4fSAndrew Jones #define _ASMARM_PTRACE_H_
3d3aacb4fSAndrew Jones /*
4d3aacb4fSAndrew Jones  * Adapted from Linux kernel headers
5d3aacb4fSAndrew Jones  *   arch/arm/include/asm/ptrace.h
6d3aacb4fSAndrew Jones  *   arch/arm/include/uapi/asm/ptrace.h
749f758b8SAndrew Jones  *
849f758b8SAndrew Jones  * Copyright (C) 2017, Red Hat Inc, Andrew Jones <drjones@redhat.com>
949f758b8SAndrew Jones  *
1049f758b8SAndrew Jones  * This work is licensed under the terms of the GNU GPL, version 2.
11d3aacb4fSAndrew Jones  */
12d3aacb4fSAndrew Jones 
13d3aacb4fSAndrew Jones /*
14d3aacb4fSAndrew Jones  * PSR bits
15d3aacb4fSAndrew Jones  */
16d3aacb4fSAndrew Jones #define USR_MODE	0x00000010
17d3aacb4fSAndrew Jones #define SVC_MODE	0x00000013
18d3aacb4fSAndrew Jones #define FIQ_MODE	0x00000011
19d3aacb4fSAndrew Jones #define IRQ_MODE	0x00000012
20d3aacb4fSAndrew Jones #define ABT_MODE	0x00000017
21d3aacb4fSAndrew Jones #define HYP_MODE	0x0000001a
22d3aacb4fSAndrew Jones #define UND_MODE	0x0000001b
23d3aacb4fSAndrew Jones #define SYSTEM_MODE	0x0000001f
24d3aacb4fSAndrew Jones #define MODE32_BIT	0x00000010
25d3aacb4fSAndrew Jones #define MODE_MASK	0x0000001f
26d3aacb4fSAndrew Jones 
27d3aacb4fSAndrew Jones #define PSR_T_BIT	0x00000020	/* >= V4T, but not V7M */
28d3aacb4fSAndrew Jones #define PSR_F_BIT	0x00000040	/* >= V4, but not V7M */
29d3aacb4fSAndrew Jones #define PSR_I_BIT	0x00000080	/* >= V4, but not V7M */
30d3aacb4fSAndrew Jones #define PSR_A_BIT	0x00000100	/* >= V6, but not V7M */
31d3aacb4fSAndrew Jones #define PSR_E_BIT	0x00000200	/* >= V6, but not V7M */
32d3aacb4fSAndrew Jones #define PSR_J_BIT	0x01000000	/* >= V5J, but not V7M */
33d3aacb4fSAndrew Jones #define PSR_Q_BIT	0x08000000	/* >= V5E, including V7M */
34d3aacb4fSAndrew Jones #define PSR_V_BIT	0x10000000
35d3aacb4fSAndrew Jones #define PSR_C_BIT	0x20000000
36d3aacb4fSAndrew Jones #define PSR_Z_BIT	0x40000000
37d3aacb4fSAndrew Jones #define PSR_N_BIT	0x80000000
38d3aacb4fSAndrew Jones 
39d3aacb4fSAndrew Jones /*
40d3aacb4fSAndrew Jones  * Groups of PSR bits
41d3aacb4fSAndrew Jones  */
42d3aacb4fSAndrew Jones #define PSR_f		0xff000000	/* Flags                */
43d3aacb4fSAndrew Jones #define PSR_s		0x00ff0000	/* Status               */
44d3aacb4fSAndrew Jones #define PSR_x		0x0000ff00	/* Extension            */
45d3aacb4fSAndrew Jones #define PSR_c		0x000000ff	/* Control              */
46d3aacb4fSAndrew Jones 
47d3aacb4fSAndrew Jones /*
48d3aacb4fSAndrew Jones  * ARMv7 groups of PSR bits
49d3aacb4fSAndrew Jones  */
50d3aacb4fSAndrew Jones #define APSR_MASK	0xf80f0000	/* N, Z, C, V, Q and GE flags */
51d3aacb4fSAndrew Jones #define PSR_ISET_MASK	0x01000010	/* ISA state (J, T) mask */
52d3aacb4fSAndrew Jones #define PSR_IT_MASK	0x0600fc00	/* If-Then execution state mask */
53d3aacb4fSAndrew Jones #define PSR_ENDIAN_MASK	0x00000200	/* Endianness state mask */
54d3aacb4fSAndrew Jones 
55*0cc3a351SSean Christopherson #ifndef __ASSEMBLER__
568cca5668SAndrew Jones #include <libcflat.h>
57d3aacb4fSAndrew Jones 
58d3aacb4fSAndrew Jones struct pt_regs {
59d3aacb4fSAndrew Jones 	unsigned long uregs[18];
60d3aacb4fSAndrew Jones };
61d3aacb4fSAndrew Jones 
62d3aacb4fSAndrew Jones #define ARM_cpsr	uregs[16]
63d3aacb4fSAndrew Jones #define ARM_pc		uregs[15]
64d3aacb4fSAndrew Jones #define ARM_lr		uregs[14]
65d3aacb4fSAndrew Jones #define ARM_sp		uregs[13]
66d3aacb4fSAndrew Jones #define ARM_ip		uregs[12]
67d3aacb4fSAndrew Jones #define ARM_fp		uregs[11]
68d3aacb4fSAndrew Jones #define ARM_r10		uregs[10]
69d3aacb4fSAndrew Jones #define ARM_r9		uregs[9]
70d3aacb4fSAndrew Jones #define ARM_r8		uregs[8]
71d3aacb4fSAndrew Jones #define ARM_r7		uregs[7]
72d3aacb4fSAndrew Jones #define ARM_r6		uregs[6]
73d3aacb4fSAndrew Jones #define ARM_r5		uregs[5]
74d3aacb4fSAndrew Jones #define ARM_r4		uregs[4]
75d3aacb4fSAndrew Jones #define ARM_r3		uregs[3]
76d3aacb4fSAndrew Jones #define ARM_r2		uregs[2]
77d3aacb4fSAndrew Jones #define ARM_r1		uregs[1]
78d3aacb4fSAndrew Jones #define ARM_r0		uregs[0]
79d3aacb4fSAndrew Jones #define ARM_ORIG_r0	uregs[17]
80d3aacb4fSAndrew Jones 
81d3aacb4fSAndrew Jones #define user_mode(regs) \
82d3aacb4fSAndrew Jones 	(((regs)->ARM_cpsr & 0xf) == 0)
83d3aacb4fSAndrew Jones 
84d3aacb4fSAndrew Jones #define processor_mode(regs) \
85d3aacb4fSAndrew Jones 	((regs)->ARM_cpsr & MODE_MASK)
86d3aacb4fSAndrew Jones 
87d3aacb4fSAndrew Jones #define interrupts_enabled(regs) \
88d3aacb4fSAndrew Jones 	(!((regs)->ARM_cpsr & PSR_I_BIT))
89d3aacb4fSAndrew Jones 
90d3aacb4fSAndrew Jones #define fast_interrupts_enabled(regs) \
91d3aacb4fSAndrew Jones 	(!((regs)->ARM_cpsr & PSR_F_BIT))
92d3aacb4fSAndrew Jones 
93d3aacb4fSAndrew Jones #define MAX_REG_OFFSET (offsetof(struct pt_regs, ARM_ORIG_r0))
94d3aacb4fSAndrew Jones 
regs_get_register(struct pt_regs * regs,unsigned int offset)95d3aacb4fSAndrew Jones static inline unsigned long regs_get_register(struct pt_regs *regs,
96d3aacb4fSAndrew Jones 					      unsigned int offset)
97d3aacb4fSAndrew Jones {
98d3aacb4fSAndrew Jones 	if (offset > MAX_REG_OFFSET)
99d3aacb4fSAndrew Jones 		return 0;
100d3aacb4fSAndrew Jones 	return *(unsigned long *)((unsigned long)regs + offset);
101d3aacb4fSAndrew Jones }
102d3aacb4fSAndrew Jones 
103*0cc3a351SSean Christopherson #endif /* !__ASSEMBLER__ */
104d3aacb4fSAndrew Jones #endif /* _ASMARM_PTRACE_H_ */
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