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/kvm-unit-tests/lib/x86/
H A Dvm.c195 setup_mmu_range(cr3, 0, (2ul << 30)); in setup_mmu()
196 setup_mmu_range(cr3, 3ul << 30, (1ul << 30)); in setup_mmu()
197 init_alloc_vpage((void*)(3ul << 30)); in setup_mmu()
H A Dprocessor.h59 #define SX_VECTOR 30 /* AMD only */
79 #define X86_CR0_CD_BIT (30)
260 #define X86_FEATURE_RDRAND (CPUID(0x1, 0, ECX, 30))
/kvm-unit-tests/lib/ppc64/
H A Dmmu.c180 if (phys_end > (31ul << 30)) { in setup_mmu()
182 phys_end = 31ul << 30; in setup_mmu()
185 init_alloc_vpage((void *)(32ul << 30)); in setup_mmu()
H A Dasm-offsets.c46 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30])); in main()
/kvm-unit-tests/lib/arm/
H A Dmmu.c210 if (phys_end > (3ul << 30)) in setup_mmu()
211 phys_end = 3ul << 30; in setup_mmu()
214 init_alloc_vpage((void*)(4ul << 30)); in setup_mmu()
H A Dsetup.c133 memregions_add(&(struct mem_region){ 0, (1ul << 30), MR_F_IO }); in arm_memregions_add_assumed()
249 assert(sizeof(long) == 8 || freemem_start < (3ul << 30)); in setup()
339 assert(sizeof(long) == 8 || freemem_start < (3ul << 30)); in efi_mem_init()
/kvm-unit-tests/lib/arm64/asm/
H A Dpgtable-hwdef.h143 #define TCR_TG1_16K (UL(1) << 30)
144 #define TCR_TG1_4K (UL(2) << 30)
145 #define TCR_TG1_64K (UL(3) << 30)
H A Dsysreg.h17 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
62 " .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n"
/kvm-unit-tests/lib/arm64/
H A Dasm-offsets.c22 OFFSET(S_LR, pt_regs, regs[30]); in main()
H A Dprocessor.c71 regs->pc, regs->regs[30], regs->pstate); in show_regs()
/kvm-unit-tests/lib/ppc64/asm/
H A Dpgtable-hwdef.h18 #define PUD_SHIFT 30
/kvm-unit-tests/x86/
H A Demulator.c48 rsi = m1; rdi = m3; rcx = 30; in test_cmps_one()
53 report(rcx == 0 && rsi == m1 + 30 && rdi == m3 + 30, "repe/cmpsb (1)"); in test_cmps_one()
55 rsi = m1; rdi = m3; rcx = 30; in test_cmps_one()
60 report(rcx == 0 && rsi == m1 + 30 && rdi == m3 + 30, in test_cmps_one()
68 report(rcx == 0 && rsi == m1 + 30 && rdi == m3 + 30, "repe cmpsw (1)"); in test_cmps_one()
310 report(eax == 30, "bsfl r/m, reg"); in test_bsfbsr()
H A Dunittests.cfg28 timeout = 30
352 timeout = 30
479 timeout = 30
H A Dpmu.c118 {"ref cycles", 0x013c, 1*N, 30*N},
130 {"fixed 1", MSR_CORE_PERF_FIXED_CTR0 + 1, 1*N, 30*N},
131 {"fixed 2", MSR_CORE_PERF_FIXED_CTR0 + 2, 0.1*N, 30*N}
591 idx |= 1 << 30; in do_rdpmc_fast()
641 report(rdpmc(i | (1 << 30)) == x, "fixed cntr-%d", i); in check_rdpmc()
H A Dhyperv.h88 #define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30)
/kvm-unit-tests/lib/linux/
H A Dpsci.h67 #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30
/kvm-unit-tests/powerpc/
H A Dcstart64.S233 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
285 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
H A Dinterrupts.c173 report(mfspr(SPR_DSISR) & (1ULL << 30), "DSISR set correctly"); in test_mmu()
194 report(recorded_regs.msr & (1ULL << 30), "SRR1 set correctly"); in test_mmu()
/kvm-unit-tests/lib/arm/asm/
H A Dsysreg.h39 #define CR_TE (1 << 30) /* Thumb exception enable */
H A Dpgtable-hwdef.h13 #define PGDIR_SHIFT 30
/kvm-unit-tests/arm/
H A Dmicro-bench.c372 printf("%-30s%15" PRId64 ".%-15" PRId64 "%15" PRId64 ".%-15" PRId64 "\n", in loop_test()
402 printf("\n%-30s%18s%13s%18s%13s\n", "name", "total ns", "", "avg ns", ""); in main()
H A Dselftest.c353 expected_regs.regs[30] = expected_regs.pc + 4; in pabt_handler()
358 regs->pc = regs->regs[30]; in pabt_handler()
H A Dfpu.c141 "str z30, [%0, #30, MUL VL]\n" \
191 "ldr z30, [%0, #30, MUL VL]\n" \
/kvm-unit-tests/lib/riscv/asm/
H A Dsbi.h123 #define SBI_FWFT_PLATFORM_FEATURE_BIT BIT(30)
/kvm-unit-tests/lib/
H A Dlibcflat.h168 #define SZ_1G (1 << 30)

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