Merge branch 'riscv/sbi' into 'master'

riscv: SBI SSE tests and baremetal boot support

See merge request kvm-unit-tests/kvm-unit-tests!75

lib/riscv: Also provide sbiret impl functions

We almost always return sbiret from sbi wrapper functions so
do that for sbi_get_imp_version() and sbi_get_imp_id(), but
asserting no error and returnin

lib/riscv: Also provide sbiret impl functions

We almost always return sbiret from sbi wrapper functions so
do that for sbi_get_imp_version() and sbi_get_imp_id(), but
asserting no error and returning the value is also useful,
so continue to provide those functions too, just with a slightly
different name.

Reviewed-by: Clément Léger <cleger@rivosinc.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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lib: riscv: Add SBI SSE support

Add support for registering and handling SSE events. This will be used
for sbi tests as well as upcoming double trap tests.

Signed-off-by: Clément Léger <cleger@rivo

lib: riscv: Add SBI SSE support

Add support for registering and handling SSE events. This will be used
for sbi tests as well as upcoming double trap tests.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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riscv: lib: Add SBI SSE extension definitions

Add SBI SSE extension definitions in sbi.h

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed

riscv: lib: Add SBI SSE extension definitions

Add SBI SSE extension definitions in sbi.h

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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lib: riscv: Add functions to get implementer ID and version

These functions will be used by SSE tests to check for a specific OpenSBI
version.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Sig

lib: riscv: Add functions to get implementer ID and version

These functions will be used by SSE tests to check for a specific OpenSBI
version.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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lib: riscv: Add functions for version checking

Version checking was done using some custom hardcoded values, backport a
few SBI function and defines from Linux to do that cleanly.

Signed-off-by: Cl

lib: riscv: Add functions for version checking

Version checking was done using some custom hardcoded values, backport a
few SBI function and defines from Linux to do that cleanly.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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lib: Use __ASSEMBLER__ instead of __ASSEMBLY__

Convert all non-x86 #ifdefs from __ASSEMBLY__ to __ASSEMBLER__, and remove
all manual __ASSEMBLY__ #defines. __ASSEMBLY_ was inherited blindly from
th

lib: Use __ASSEMBLER__ instead of __ASSEMBLY__

Convert all non-x86 #ifdefs from __ASSEMBLY__ to __ASSEMBLER__, and remove
all manual __ASSEMBLY__ #defines. __ASSEMBLY_ was inherited blindly from
the Linux kernel, and must be manually defined, e.g. through build rules
or with the aforementioned explicit #defines in assembly code.

__ASSEMBLER__ on the other hand is automatically defined by the compiler
when preprocessing assembly, i.e. doesn't require manually #defines for
the code to function correctly.

Ignore x86, as x86 doesn't actually rely on __ASSEMBLY__ at the moment,
and is undergoing a parallel cleanup.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Message-ID: <20250222014526.2302653-1-seanjc@google.com>
[thuth: Fix three more occurances in libfdt.h and sbi-tests.h]
Signed-off-by: Thomas Huth <thuth@redhat.com>

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Merge branch 'riscv/sbi' into 'master'

riscv: Improve existing SBI tests and add some FWFT tests

See merge request kvm-unit-tests/kvm-unit-tests!74

riscv: Add tests for SBI FWFT extension

Add tests for the FWFT SBI extension. Currently, only the reserved range
as well as the misaligned exception delegation are used.

Signed-off-by: Clément Lége

riscv: Add tests for SBI FWFT extension

Add tests for the FWFT SBI extension. Currently, only the reserved range
as well as the misaligned exception delegation are used.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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Merge branch 'riscv/sbi' into 'master'

riscv: Added SBI tests for IPI, SUSP, and HSM

See merge request kvm-unit-tests/kvm-unit-tests!70

riscv: sbi: Add SUSP tests

Introduce tests for SBI system suspend. The basic test makes
sure it works and other tests make sure it fails as expected
with invalid entry criteria.

To test on QEMU or

riscv: sbi: Add SUSP tests

Introduce tests for SBI system suspend. The basic test makes
sure it works and other tests make sure it fails as expected
with invalid entry criteria.

To test on QEMU or hardware the firmware needs to support system
suspend. For QEMU, OpenSBI can be told to enable its system
suspend test mode by creating a new DTB which has

opensbi-config {
compatible = "opensbi,config";
system-suspend-test;
};

added to the 'chosen' node. Then, run with '-dtb susp.dtb'.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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riscv: Add sbi_send_ipi_broadcast

Coming SBI IPI tests will use this, but as it could be useful for
other tests too, add it to the library.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

Merge branch 'riscv/sbi' into 'master'

riscv: Collect some patches supporting SBI tests

See merge request kvm-unit-tests/kvm-unit-tests!68

riscv: sbi: Add HSM extension functions

Add helper functions to perform hart-related operations to prepare for
the HSM tests. Also add the HSM state IDs and default suspend type
constants.

Reviewed

riscv: sbi: Add HSM extension functions

Add helper functions to perform hart-related operations to prepare for
the HSM tests. Also add the HSM state IDs and default suspend type
constants.

Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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Merge branch 'riscv/sbi' into 'master'

riscv: Add support for SBI tests

See merge request kvm-unit-tests/kvm-unit-tests!67

riscv: Introduce SBI IPI convenience functions

The SBI IPI function interface is a bit painful to use since it
operates on hartids as opposed to cpuids and requires determining a
mask base and a mas

riscv: Introduce SBI IPI convenience functions

The SBI IPI function interface is a bit painful to use since it
operates on hartids as opposed to cpuids and requires determining a
mask base and a mask. Provide functions allowing IPIs to be sent to
single cpus and to all cpus set in a cpumask in order to simplify
things for unit tests.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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riscv: Share sbi_time_ecall with framework

Setting timers is a useful thing to do for all types of tests. Not
every platform will have Sstc so make the SBI TIME extension
available as well.

Signed-

riscv: Share sbi_time_ecall with framework

Setting timers is a useful thing to do for all types of tests. Not
every platform will have Sstc so make the SBI TIME extension
available as well.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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riscv: sbi: Add IPI extension support

Add IPI EID and FID constants and a helper function to perform the IPI
SBI ecall.

Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by:

riscv: sbi: Add IPI extension support

Add IPI EID and FID constants and a helper function to perform the IPI
SBI ecall.

Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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Merge branch 'riscv/sbi' into 'master'

Mainly riscv stuff, but also limits.h and pseudo random numbers

See merge request kvm-unit-tests/kvm-unit-tests!65

riscv: sbi: Add dbcn write test

Added a unit test for the RISC-V SBI debug console write() and
write_byte() functions. The output of the tests must be inspected
manually to verify that the correct b

riscv: sbi: Add dbcn write test

Added a unit test for the RISC-V SBI debug console write() and
write_byte() functions. The output of the tests must be inspected
manually to verify that the correct bytes are written. For write(),
the expected output is 'DBCN_WRITE_TEST_STRING'. For write_byte(),
the expected output is 'a'.

Signed-off-by: Cade Richard <cade.richard@berkeley.edu>
[Applied all my suggested changes from the v4 review.]
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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Merge branch 'riscv/sbi' into 'master'

riscv: Add TIME SBI extension tests

See merge request kvm-unit-tests/kvm-unit-tests!62

riscv: sbi: Add test for timer extension

Add a test for the set_timer function of the time extension. The test
checks that:
- The time extension is available
- The installed timer interrupt handler

riscv: sbi: Add test for timer extension

Add a test for the set_timer function of the time extension. The test
checks that:
- The time extension is available
- The installed timer interrupt handler is called
- The timer interrupt is received within a reasonable time interval
- The timer interrupt pending bit is cleared after the set_timer SBI
call is made when a time in the future is passed

The timer interrupt delay can be set using the TIMER_DELAY environment
variable in microseconds. The default delay value is 200 milliseconds.
Since the interrupt can arrive a little later than the specified delay,
allow some margin of error. This margin of error can be specified via
the TIMER_MARGIN environment variable in microseconds. The default
margin of error is 200 milliseconds.

Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
[Modified masked timer test and made a few cleanups.]
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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riscv: Add method to probe for SBI extensions

Add a `sbi_probe` helper method that can be used by SBI extension tests
to check if a given extension is available.

Suggested-by: Andrew Jones <andrew.

riscv: Add method to probe for SBI extensions

Add a `sbi_probe` helper method that can be used by SBI extension tests
to check if a given extension is available.

Suggested-by: Andrew Jones <andrew.jones@linux.dev>
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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Merge branch 'riscv/initial-port-v3' into 'master'

riscv: Initial port

See merge request kvm-unit-tests/kvm-unit-tests!50

riscv: Add SMP support

Implement the same SMP API that Arm has but using an SBI HSM
call instead of PSCI. Unlike Arm, riscv needs to always set
cpu0_calls_idle, because the boot hart doesn't have to

riscv: Add SMP support

Implement the same SMP API that Arm has but using an SBI HSM
call instead of PSCI. Unlike Arm, riscv needs to always set
cpu0_calls_idle, because the boot hart doesn't have to be the
first hart described in the DT, which means cpu0 may well be
a secondary. As usual, add a couple tests to selftest.c to
make sure everything works.

(The secondary boot process is also improved over Arm's a bit
by keeping boot data percpu, dropping the need for a lock. We
could create percpu data for Arm too, but that's left as future
work.)

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Acked-by: Thomas Huth <thuth@redhat.com>

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