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/kvm-unit-tests/s390x/
H A Dsthyi.h16 CODE_UNSUPP = 0x04, /* with cc = 3 */
17 CODE_SUCCES = 0x00, /* with cc = 0 */
21 HDR_PERF_UNAV = 0x80,
22 HDR_STSI_UNAV = 0x40,
23 HDR_STACK_INCM = 0x20,
24 HDR_NOT_LPAR = 0x10,
28 MACH_CNT_VLD = 0x80,
29 MACH_ID_VLD = 0x40,
30 MACH_NAME_VLD = 0x20,
34 PART_MT_EN = 0x80,
[all …]
H A Dcss.c21 #define DEFAULT_CU_TYPE 0x3832 /* virtio-ccw */
34 report_pass("Schid of first I/O device: 0x%08x", test_device_sid); in test_enumerate()
51 report(cc == 0, "Enable subchannel %08x", test_device_sid); in test_enable()
77 lowcore.io_int_param = 0; in test_sense()
79 senseid = alloc_io_mem(sizeof(*senseid), 0); in test_sense()
97 if (wait_and_check_io_completion(test_device_sid) < 0) in test_sense()
105 if (ret < 0) { in test_sense()
107 } else if (ret != 0) { in test_sense()
116 if (senseid->reserved != 0xff) { in test_sense()
117 report_fail("transferred garbage: 0x%02x", senseid->reserved); in test_sense()
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/kvm-unit-tests/lib/
H A Dpci-edu.h21 #define PCI_VENDOR_ID_QEMU 0x1234
22 #define PCI_DEVICE_ID_EDU 0x11e8
25 #define EDU_BAR 0
26 #define EDU_MAGIC 0xed
27 #define EDU_VERSION 0x100
31 #define EDU_REG_ID 0x0
32 #define EDU_REG_ALIVE 0x4
33 #define EDU_REG_FACTORIAL 0x8
34 #define EDU_REG_STATUS 0x20
35 #define EDU_REG_INTR_STATUS 0x24
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H A Dprintf.c40 if (npad > 0) { in print_str()
42 while (npad > 0) { in print_str()
51 if (npad < 0) { in print_str()
52 props.pad = ' '; /* ignore '0' flag with '-' flag */ in print_str()
54 while (npad < 0) { in print_str()
70 if ((c0 & 0xf800) != 0xd800) in utf16_to_utf32()
73 if (c0 & 0x0400) in utf16_to_utf32()
74 return 0xfffd; in utf16_to_utf32()
77 if ((c1 & 0xfc00) != 0xdc00) in utf16_to_utf32()
78 return 0xfffd; in utf16_to_utf32()
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H A Defi.c32 …e RISCV_EFI_BOOT_PROTOCOL_GUID EFI_GUID(0xccd15fec, 0x6f73, 0x4eec, 0x83, 0x95, 0x3e, 0x69, 0xe4,…
65 unsigned long key = 0, map_size = 0, desc_size = 0; in efi_get_memory_map()
70 if (status != EFI_BUFFER_TOO_SMALL || map_size == 0) in efi_get_memory_map()
112 for (i = 0; i < efi_system_table->nr_tables; i++) { in efi_get_system_config_table()
129 efi_rs_call(reset_system, EFI_RESET_SHUTDOWN, code, 0, NULL); in efi_exit()
136 unsigned long cmdline_addr = 0; in efi_convert_cmdline()
139 int options_bytes = 0, safe_options_bytes = 0; /* UTF-8 bytes */ in efi_convert_cmdline()
149 if (c < 0x80) { in efi_convert_cmdline()
150 if (c == L'\0' || c == L'\n') in efi_convert_cmdline()
166 options_bytes += 2 + (c >= 0x800); in efi_convert_cmdline()
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H A Dalloc_page.c21 #define ORDER_MASK 0x3f
22 #define STATUS_MASK 0xc0
24 #define STATUS_FRESH 0x00
25 #define STATUS_FREE 0x40
26 #define STATUS_ALLOCATED 0x80
27 #define STATUS_SPECIAL 0xc0
60 return areas_mask != 0; in page_alloc_initialized()
94 * - the block size must be greater than 0
116 for (i = 0; i < BIT(order); i++) { in split()
199 for (i = 0; i < MAX_AREAS; i++) in get_area()
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/kvm-unit-tests/lib/x86/
H A Dio.c12 static int serial_iobase = 0x3f8;
13 static int serial_inited = 0;
20 lsr = inb(serial_iobase + 0x05); in serial_outb()
21 } while (!(lsr & 0x20)); in serial_outb()
23 outb(ch, serial_iobase + 0x00); in serial_outb()
39 lcr = inb(serial_iobase + 0x03); in serial_init()
40 lcr |= 0x80; in serial_init()
41 outb(lcr, serial_iobase + 0x03); in serial_init()
44 outb(0x01, serial_iobase + 0x00); in serial_init()
45 outb(0x00, serial_iobase + 0x01); in serial_init()
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H A Ddesc.h6 * 0x00 NULL descriptor NULL descriptor
7 * 0x08 ring-0 code segment (32-bit) ring-0 code segment (64-bit)
8 * 0x10 ring-0 data segment (32-bit) ring-0 data segment (32/64-bit)
9 * 0x18 ring-0 code segment (P=0) ring-0 code segment (64-bit, P=0)
10 * 0x20 intr_alt_stack TSS ring-0 code segment (32-bit)
11 * 0x28 ring-0 code segment (16-bit) same
12 * 0x30 ring-0 data segment (16-bit) same
13 * 0x38 (0x3b) ring-3 code segment (32-bit) same
14 * 0x40 (0x43) ring-3 data segment (32-bit) ring-3 data segment (32/64-bit)
15 * 0x48 (0x4b) **unused** ring-3 code segment (64-bit)
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H A Dapic-defs.h10 #define IO_APIC_DEFAULT_PHYS_BASE 0xfec00000
11 #define APIC_DEFAULT_PHYS_BASE 0xfee00000
17 #define APIC_ID 0x20
19 #define APIC_LVR 0x30
20 #define APIC_LVR_MASK 0xFF00FF
21 #define GET_APIC_VERSION(x) ((x) & 0xFFu)
22 #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu)
24 # define APIC_INTEGRATED(x) ((x) & 0xF0u)
28 #define APIC_XAPIC(x) ((x) >= 0x14)
29 #define APIC_TASKPRI 0x80
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H A Dintel-iommu.h26 #define Q35_HOST_BRIDGE_IOMMU_ADDR 0xfed90000ULL
33 #define DMAR_VER_REG 0x0 /* Arch version supported by this IOMMU */
34 #define DMAR_CAP_REG 0x8 /* Hardware supported capabilities */
35 #define DMAR_CAP_REG_HI 0xc /* High 32-bit of DMAR_CAP_REG */
36 #define DMAR_ECAP_REG 0x10 /* Extended capabilities supported */
37 #define DMAR_ECAP_REG_HI 0X14
38 #define DMAR_GCMD_REG 0x18 /* Global command */
39 #define DMAR_GSTS_REG 0x1c /* Global status */
40 #define DMAR_RTADDR_REG 0x20 /* Root entry table */
41 #define DMAR_RTADDR_REG_HI 0X24
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/kvm-unit-tests/lib/s390x/
H A Dsclp.h16 #define SCLP_CMD_CODE_MASK 0xffff00ff
19 #define SCLP_READ_CPU_INFO 0x00010001
20 #define SCLP_CMDW_READ_SCP_INFO 0x00020001
21 #define SCLP_CMDW_READ_SCP_INFO_FORCED 0x00120001
22 #define SCLP_READ_STORAGE_ELEMENT_INFO 0x00040001
23 #define SCLP_ATTACH_STORAGE_ELEMENT 0x00080001
24 #define SCLP_ASSIGN_STORAGE 0x000D0001
25 #define SCLP_CMD_READ_EVENT_DATA 0x00770005
26 #define SCLP_CMD_WRITE_EVENT_DATA 0x00760005
27 #define SCLP_CMD_WRITE_EVENT_MASK 0x00780005
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H A Dcss.h13 #define SCHID_ONE 0x00010000
15 #define CCW_F_CD 0x80
16 #define CCW_F_CC 0x40
17 #define CCW_F_SLI 0x20
18 #define CCW_F_SKP 0x10
19 #define CCW_F_PCI 0x08
20 #define CCW_F_IDA 0x04
21 #define CCW_F_S 0x02
22 #define CCW_F_MIDA 0x01
24 #define CCW_C_NOP 0x03
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H A Dsclp.c52 ctl_set_bit(0, CTL0_SERVICE_SIGNAL); in sclp_setup_int()
58 ctl_clear_bit(0, CTL0_SERVICE_SIGNAL); in sclp_handle_ext()
99 for (i = 0; i < ARRAY_SIZE(commands); i++) { in sclp_read_scp_info()
101 memset(&ri->h, 0, sizeof(ri->h)); in sclp_read_scp_info()
145 return !!(rib[byte] & (0x80 >> bit)); in sclp_feat_check()
169 for (i = 0; i < read_info->entries_cpu; i++, cpu++) { in sclp_facilities_setup()
189 /* Perform service call. Return 0 on success, non-zero otherwise. */
201 return 0; in sclp_service_call()
231 permission = tprot(ram_size + storage_increment_size - 1, 0); in sclp_memory_setup()
H A Dsclp-console.c27 0x00, 0x01, 0x02, 0x03, 0x37, 0x2D, 0x2E, 0x2F,
30 0x16, 0x05, 0x15, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
32 0x10, 0x11, 0x12, 0x13, 0x3C, 0x3D, 0x32, 0x26,
35 0x18, 0x19, 0x3F, 0x27, 0x22, 0x1D, 0x1E, 0x1F,
37 0x40, 0x5A, 0x7F, 0x7B, 0x5B, 0x6C, 0x50, 0x7D,
39 0x4D, 0x5D, 0x5C, 0x4E, 0x6B, 0x60, 0x4B, 0x61,
40 /*30 0 1 2 3 4 5 6 7 */
41 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7,
43 0xF8, 0xF9, 0x7A, 0x5E, 0x4C, 0x7E, 0x6E, 0x6F,
45 0x7C, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7,
[all …]
/kvm-unit-tests/x86/
H A Ds3.c8 #define RTC_ALARM_DONT_CARE 0xC0
14 #define REG_A_UIP 0x80
15 #define REG_B_AIE 0x20
19 outb(reg, 0x70); in rtc_in()
20 return inb(0x71); in rtc_in()
25 outb(reg, 0x70); in rtc_out()
26 outb(val, 0x71); in rtc_out()
35 char *addr, *resume_vec = (void*)0x1000; in main()
47 outw(0x400, fadt->pm1a_evt_blk + 2); in main()
50 while ((rtc_in(RTC_REG_A) & REG_A_UIP) == 0); in main()
[all …]
H A Dsvm.h111 #define TLB_CONTROL_DO_NOTHING 0
114 #define V_TPR_MASK 0x0f
126 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
154 #define SVM_VM_CR_VALID_MASK 0x001fULL
155 #define SVM_VM_CR_SVM_LOCK_MASK 0x0008ULL
156 #define SVM_VM_CR_SVM_DIS_MASK 0x0010ULL
158 #define TSC_RATIO_DEFAULT 0x0100000000ULL
218 #define SVM_CPUID_FUNC 0x8000000a
230 #define SVM_SELECTOR_TYPE_MASK (0xf)
257 #define SVM_EVTINJ_VEC_MASK 0xff
[all …]
H A Drealmode.c7 #define ARRAY_SIZE(_a) (sizeof(_a)/sizeof((_a)[0]))
17 #define NULL ((void*)0)
25 "mov $0x1234, %eax \n\t"
33 for (n = 0; *str; ++str) in strlen()
40 asm volatile("out %0, %1" : : "a"(data), "d"(port)); in outb()
44 static int serial_iobase = 0x3f8;
45 static int serial_inited = 0;
50 asm volatile("in %1, %0" : "=a"(data) : "d"(port)); in inb()
59 lsr = inb(serial_iobase + 0x05); in serial_outb()
60 } while (!(lsr & 0x20)); in serial_outb()
[all …]
H A Dvmx_tests.c53 __asm__ __volatile__("bsf %1, %%eax; cmovnz %%eax, %0" in ffs()
93 "mov %%rsp, %0\n\t" in vmenter_main()
99 : "g"(0xABCD)); in vmenter_main()
100 report((rax == 0xFFFF) && (rsp == resume_rsp), "test vmresume"); in vmenter_main()
109 if (regs.rax != 0xABCD) { in vmenter_exit_handler()
113 regs.rax = 0xFFFF; in vmenter_exit_handler()
137 preempt_scale = rdmsr(MSR_IA32_VMX_MISC) & 0x1F; in preemption_timer_init()
149 vmx_set_test_stage(0); in preemption_timer_main()
203 "preemption timer with 0 value"); in preemption_timer_exit_handler()
214 case 0: in preemption_timer_exit_handler()
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/kvm-unit-tests/lib/linux/
H A Dpci_regs.h30 #define PCI_VENDOR_ID 0x00 /* 16 bits */
31 #define PCI_DEVICE_ID 0x02 /* 16 bits */
32 #define PCI_COMMAND 0x04 /* 16 bits */
33 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
34 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
35 #define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
36 #define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
37 #define PCI_COMMAND_INVALIDATE 0x10 /* Use memory write and invalidate */
38 #define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */
39 #define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */
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H A Defi.h15 #define EFI_ERROR(a) (((int64_t) a) < 0)
16 #define EFI_SUCCESS 0
62 (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
63 (b) & 0xff, ((b) >> 8) & 0xff, \
64 (c) & 0xff, ((c) >> 8) & 0xff, d } }
66 #define ACPI_TABLE_GUID EFI_GUID(0xeb9d2d30, 0x2d88, 0x11d3, 0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0x…
67 #define ACPI_20_TABLE_GUID EFI_GUID(0x8868e871, 0xe4f1, 0x11d3, 0xbc, 0x22, 0x00, 0x80, 0xc7, 0x3c…
69 #define DEVICE_TREE_GUID EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, …
71 …ine LOADED_IMAGE_PROTOCOL_GUID EFI_GUID(0x5b1b31a1, 0x9562, 0x11d2, 0x8e, 0x3f, 0x00, 0xa0, 0xc9,…
73 …e EFI_LOAD_FILE2_PROTOCOL_GUID EFI_GUID(0x4006c0c1, 0xfcb3, 0x403e, 0x99, 0x6d, 0x4a, 0x6c, 0x87,…
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/kvm-unit-tests/powerpc/
H A Dtm.c27 assert(plen >= 8 && prop->data[1] == 0 && prop->data[0] <= plen - 2); in cpu_has_tm()
31 * offset 22 and 23 of the attribute type 0, so when adding the in cpu_has_tm()
35 if (prop->data[0] >= 24 && (prop->data[24] & 0x80) != 0) in cpu_has_tm()
43 int available = 0; in count_cpus_with_tm()
46 if (ret < 0) in count_cpus_with_tm()
59 uint64_t msr = 0; in enable_tm()
102 asm volatile ("1: .long 0x7c00051d\n\t" /* tbegin. */ in test_h_cede_tm()
104 ".long 0x7c0005dd\n\t" /* tsuspend. */ in test_h_cede_tm()
105 "2: .long 0x7c00059c\n\t" /* tcheck cr0 */ in test_h_cede_tm()
108 for (i = 0; i < 500; i++) { in test_h_cede_tm()
[all …]
/kvm-unit-tests/lib/s390x/asm/
H A Dsie-arch.h8 #define CPUSTAT_STOPPED 0x80000000
9 #define CPUSTAT_WAIT 0x10000000
10 #define CPUSTAT_ECALL_PEND 0x08000000
11 #define CPUSTAT_STOP_INT 0x04000000
12 #define CPUSTAT_IO_INT 0x02000000
13 #define CPUSTAT_EXT_INT 0x01000000
14 #define CPUSTAT_RUNNING 0x00800000
15 #define CPUSTAT_RETAINED 0x00400000
16 #define CPUSTAT_TIMING_SUB 0x00020000
17 #define CPUSTAT_SIE_SUB 0x00010000
[all …]
H A Dcpacf.h20 #define CPACF_KMAC 0xb91e /* MSA */
21 #define CPACF_KM 0xb92e /* MSA */
22 #define CPACF_KMC 0xb92f /* MSA */
23 #define CPACF_KIMD 0xb93e /* MSA */
24 #define CPACF_KLMD 0xb93f /* MSA */
25 #define CPACF_PCKMO 0xb928 /* MSA3 */
26 #define CPACF_KMF 0xb92a /* MSA4 */
27 #define CPACF_KMO 0xb92b /* MSA4 */
28 #define CPACF_PCC 0xb92c /* MSA4 */
29 #define CPACF_KMCTR 0xb92d /* MSA4 */
[all …]
H A Darch_def.h18 /* FPRs 0, 2, 4, 6 */
31 /* GRs 0 and 1 */
88 AS_PRIM = 0,
94 #define PSW_MASK_DAT 0x0400000000000000UL
95 #define PSW_MASK_HOME 0x0000C00000000000UL
96 #define PSW_MASK_IO 0x0200000000000000UL
97 #define PSW_MASK_EXT 0x0100000000000000UL
98 #define PSW_MASK_KEY 0x00F0000000000000UL
99 #define PSW_MASK_WAIT 0x0002000000000000UL
100 #define PSW_MASK_PSTATE 0x0001000000000000UL
[all …]
/kvm-unit-tests/scripts/
H A Dcheckpatch.pl22 my $P = $0;
29 my $quiet = 0;
30 my $verbose = 0;
38 my $emacs = 0;
39 my $terse = 0;
40 my $showfile = 0;
41 my $file = 0;
42 my $git = 0;
44 my $check = 0;
45 my $check_orig = 0;
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