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/qemu/tests/unit/
H A Dcheck-qjson.c44 g_string_erase(json, 0, 1); in to_json_str()
87 for (i = 0; test_cases[i].json_in; i++) { in escaped_string()
88 for (j = 0; j < 2; j++) { in escaped_string()
118 for (i = 0; test_cases[i]; i++) { in string_with_quotes()
144 /* 0 Control characters */ in utf8_string()
186 * case under 0. Test the first 1 byte non-control character in utf8_string()
195 "\xC2\x80", in utf8_string()
196 "\xC2\x80", in utf8_string()
201 "\xE0\xA0\x80", in utf8_string()
202 "\xE0\xA0\x80", in utf8_string()
[all …]
/qemu/util/
H A Dunicode.c18 if (codepoint > 0x10FFFFu) { in is_valid_codepoint()
21 if ((codepoint >= 0xFDD0 && codepoint <= 0xFDEF) in is_valid_codepoint()
22 || (codepoint & 0xFFFE) == 0xFFFE) { in is_valid_codepoint()
25 if (codepoint >= 0xD800 && codepoint <= 0xDFFF) { in is_valid_codepoint()
39 * "\xC0\x80".
44 * If @s points to an impossible byte (0xFE or 0xFF) or a continuation
56 * overlong sequence "\xC0\x80" is valid.
64 static int min_cp[5] = { 0x80, 0x800, 0x10000, 0x200000, 0x4000000 }; in mod_utf8_codepoint()
69 if (n == 0 || *s == 0) { in mod_utf8_codepoint()
77 if (byte < 0x80) { in mod_utf8_codepoint()
[all …]
/qemu/hw/rtc/
H A Dm48t59.c73 .size = 0x800,
77 .size = 0x2000,
81 .size = 0x2000,
96 if ((NVRAM->buffer[0x1FF5] & 0x80) == 0 && in alarm_cb()
97 (NVRAM->buffer[0x1FF4] & 0x80) == 0 && in alarm_cb()
98 (NVRAM->buffer[0x1FF3] & 0x80) == 0 && in alarm_cb()
99 (NVRAM->buffer[0x1FF2] & 0x80) == 0) { in alarm_cb()
108 } else if ((NVRAM->buffer[0x1FF5] & 0x80) != 0 && in alarm_cb()
109 (NVRAM->buffer[0x1FF4] & 0x80) == 0 && in alarm_cb()
110 (NVRAM->buffer[0x1FF3] & 0x80) == 0 && in alarm_cb()
[all …]
/qemu/linux-user/i386/
H A Dvdso.S25 int $0x80
40 int $0x80
52 .cfi_rel_offset %ebx, 0
57 int $0x80
68 int $0x80
121 int $0x80
129 int $0x80
138 * ELFNOTE_START(Linux, 0, "a")
/qemu/tests/qtest/migration/aarch64/
H A Da-b-kernel.h7 0x00, 0x10, 0x38, 0xd5, 0x00, 0xf8, 0x7f, 0x92, 0x00, 0x10, 0x18, 0xd5,
8 0xdf, 0x3f, 0x03, 0xd5, 0x00, 0x02, 0xa8, 0xd2, 0x01, 0xc8, 0xa8, 0xd2,
9 0x23, 0x08, 0x80, 0x52, 0x02, 0x20, 0xa1, 0xd2, 0x43, 0x00, 0x00, 0x39,
10 0x03, 0x00, 0x80, 0x52, 0xe4, 0x03, 0x00, 0xaa, 0x83, 0x00, 0x00, 0x39,
11 0x84, 0x04, 0x40, 0x91, 0x9f, 0x00, 0x01, 0xeb, 0xad, 0xff, 0xff, 0x54,
12 0x05, 0x00, 0x80, 0x52, 0xe4, 0x03, 0x00, 0xaa, 0x83, 0x00, 0x40, 0x39,
13 0x63, 0x04, 0x00, 0x11, 0x83, 0x00, 0x00, 0x39, 0x24, 0x7e, 0x0b, 0xd5,
14 0x84, 0x04, 0x40, 0x91, 0x9f, 0x00, 0x01, 0xeb, 0x4b, 0xff, 0xff, 0x54,
15 0xa5, 0x04, 0x00, 0x11, 0xa5, 0x10, 0x00, 0x12, 0xbf, 0x00, 0x00, 0x71,
16 0xa1, 0xfe, 0xff, 0x54, 0x43, 0x08, 0x80, 0x52, 0x43, 0x00, 0x00, 0x39,
[all …]
/qemu/tests/qemu-iotests/
H A D06025 seq="$(basename $0)"
34 trap "_cleanup; exit \$status" 0 1 2 3 15
60 rt_offset=65536 # 0x10000 (XXX: just an assumption)
61 rb_offset=131072 # 0x20000 (XXX: just an assumption)
62 l1_offset=196608 # 0x30000 (XXX: just an assumption)
63 l2_offset=262144 # 0x40000 (XXX: just an assumption)
64 l2_offset_after_snapshot=524288 # 0x80000 (XXX: just an assumption)
79 poke_file "$TEST_IMG" "$l1_offset" "\x80\x00\x00\x00\x00\x03\x00\x00"
86 $QEMU_IO -c "$OPEN_RW" -c "write -P 0x2a 0 512" | _filter_qemu_io
95 $QEMU_IO -c "$OPEN_RW" -c "read 0 512" 2>&1 | _filter_qemu_io \
[all …]
/qemu/tests/tcg/i386/
H A Dtest-i386-fbstp.c13 volatile union u ld_invalid_2 = { .s = { 0, 1234 } };
14 volatile union u ld_invalid_3 = { .s = { 0, 0x7fff } };
15 volatile union u ld_invalid_4 = { .s = { (UINT64_C(1) << 63) - 1, 0x7fff } };
19 int ret = 0; in main()
21 memset(out, 0xfe, sizeof out); in main()
22 __asm__ volatile ("fbstp %0" : "=m" (out) : "t" (-0.0L) : "st"); in main()
23 out[9] &= 0x80; in main()
24 if (memcmp(out, "\0\0\0\0\0\0\0\0\0\x80", sizeof out) != 0) { in main()
25 printf("FAIL: fbstp -0\n"); in main()
28 memset(out, 0x12, sizeof out); in main()
[all …]
H A Dhello-i386.c7 "int $0x80" \ in exit()
8 : "=a" (__res) : "0" (__NR_exit),"c" ((long)(status))); in exit()
16 "int $0x80\n" \ in write()
19 : "0" (__NR_write),"S" ((long)(fd)),"c" ((long)(buf)),"d" ((long)(len))); in write()
27 exit(0); in _start()
/qemu/target/arm/tcg/
H A Darith_helper.c29 if (((res ^ a) & 0x8000) && !((a ^ b) & 0x8000)) { in add16_sat()
30 if (a & 0x8000) { in add16_sat()
31 res = 0x8000; in add16_sat()
33 res = 0x7fff; in add16_sat()
45 if (((res ^ a) & 0x80) && !((a ^ b) & 0x80)) { in add8_sat()
46 if (a & 0x80) { in add8_sat()
47 res = 0x80; in add8_sat()
49 res = 0x7f; in add8_sat()
61 if (((res ^ a) & 0x8000) && ((a ^ b) & 0x8000)) { in sub16_sat()
62 if (a & 0x8000) { in sub16_sat()
[all …]
/qemu/include/hw/s390x/
H A Dioinst.h31 #define SCSW_FLAGS_MASK_KEY 0xf000
32 #define SCSW_FLAGS_MASK_SCTL 0x0800
33 #define SCSW_FLAGS_MASK_ESWF 0x0400
34 #define SCSW_FLAGS_MASK_CC 0x0300
35 #define SCSW_FLAGS_MASK_FMT 0x0080
36 #define SCSW_FLAGS_MASK_PFCH 0x0040
37 #define SCSW_FLAGS_MASK_ISIC 0x0020
38 #define SCSW_FLAGS_MASK_ALCC 0x0010
39 #define SCSW_FLAGS_MASK_SSI 0x0008
40 #define SCSW_FLAGS_MASK_ZCC 0x0004
[all …]
/qemu/tests/tcg/s390x/
H A Dfloat.h13 #define CLASS_MINUS_INF 0
39 /* -inf */ {1, {{0xff, 0x80, 0x00, 0x00}}},
40 /* -Fn */ {2, {{0xc2, 0x28, 0x00, 0x00},
41 {0xc2, 0x29, 0x00, 0x00}}},
42 /* -0 */ {1, {{0x80, 0x00, 0x00, 0x00}}},
43 /* +0 */ {1, {{0x00, 0x00, 0x00, 0x00}}},
44 /* +Fn */ {2, {{0x42, 0x28, 0x00, 0x00},
45 {0x42, 0x2a, 0x00, 0x00}}},
46 /* +inf */ {1, {{0x7f, 0x80, 0x00, 0x00}}},
47 /* QNaN */ {2, {{0x7f, 0xff, 0xff, 0xff},
[all …]
/qemu/include/hw/rtc/
H A Dmc146818rtc_regs.h31 #define RTC_SECONDS 0
37 #define RTC_ALARM_DONT_CARE 0xC0
50 #define RTC_CENTURY 0x32
51 #define RTC_IBM_PS2_CENTURY_BYTE 0x37
53 #define REG_A_UIP 0x80
55 #define REG_B_SET 0x80
56 #define REG_B_PIE 0x40
57 #define REG_B_AIE 0x20
58 #define REG_B_UIE 0x10
59 #define REG_B_SQWE 0x08
[all …]
/qemu/hw/misc/
H A Dedu.c41 #define FACT_IRQ 0x00000001
42 #define DMA_IRQ 0x00000100
44 #define DMA_START 0x40000
58 #define EDU_STATUS_COMPUTING 0x01
59 #define EDU_STATUS_IRQFACT 0x80
64 #define EDU_DMA_RUN 0x1
65 #define EDU_DMA_DIR(cmd) (((cmd) & 0x2) >> 1)
66 # define EDU_DMA_FROM_PCI 0
68 #define EDU_DMA_IRQ 0x4
90 msi_notify(&edu->pdev, 0); in edu_raise_irq()
[all …]
/qemu/hw/ppc/
H A Dpnv.c66 #define FW_LOAD_ADDR 0x0
71 #define KERNEL_LOAD_ADDR 0x20000000
73 #define INITRD_LOAD_ADDR 0x28000000
104 mem_reg_property[0] = cpu_to_be64(start); in pnv_dt_memory()
108 off = fdt_add_subnode(fdt, 0, mem_name); in pnv_dt_memory()
121 if (cpus_offset < 0) { in get_cpus_node()
122 cpus_offset = fdt_add_subnode(fdt, 0, "cpus"); in get_cpus_node()
124 _FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1))); in get_cpus_node()
125 _FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0))); in get_cpus_node()
141 PowerPCCPU *cpu = pc->threads[0]; in pnv_dt_core()
[all …]
/qemu/ui/
H A Dcursor.c13 unsigned int line = 0, i, r, g, b, x, y, pixel; in cursor_parse_xpm()
31 for (i = 0; i < colors; i++, line++) { in cursor_parse_xpm()
34 ctab[idx] = (0xff << 24) | (b << 16) | (g << 8) | r; in cursor_parse_xpm()
37 if (strcmp(name, "None") == 0) { in cursor_parse_xpm()
38 ctab[idx] = 0x00000000; in cursor_parse_xpm()
51 for (pixel = 0, y = 0; y < height; y++, line++) { in cursor_parse_xpm()
52 for (x = 0; x < height; x++, pixel++) { in cursor_parse_xpm()
66 for (y = 0; y < c->height; y++) { in cursor_print_ascii_art()
68 for (x = 0; x < c->width; x++, data++) { in cursor_print_ascii_art()
69 if ((*data & 0xff000000) != 0xff000000) { in cursor_print_ascii_art()
[all …]
/qemu/hw/audio/
H A Dgusemu_hal.c40 int value_read = 0; in gus_read()
46 switch (port & 0xff0f) in gus_read()
49 /* case 0x200: return GUSregb(MixerCtrlReg2x0); */ in gus_read()
50 case 0x206: /* IRQstatReg / SB2x6IRQ */ in gus_read()
56 /* case 0x308: */ /* AdLib388 */ in gus_read()
57 case 0x208: in gus_read()
61 case 0x309: /* AdLib389 */ in gus_read()
62 case 0x209: in gus_read()
64 case 0x20A: in gus_read()
67 #if 0 in gus_read()
[all …]
/qemu/include/hw/scsi/
H A Desp.h83 #define ESP_TCLO 0x0
84 #define ESP_TCMID 0x1
85 #define ESP_FIFO 0x2
86 #define ESP_CMD 0x3
87 #define ESP_RSTAT 0x4
88 #define ESP_WBUSID 0x4
89 #define ESP_RINTR 0x5
90 #define ESP_WSEL 0x5
91 #define ESP_RSEQ 0x6
92 #define ESP_WSYNTP 0x6
[all …]
/qemu/tests/tcg/multiarch/
H A Dnop_func.h11 0xc0, 0x03, 0x5f, 0xd6, /* ret */
13 0x01, 0x80, 0xFA, 0x6B, /* ret */
15 0x1e, 0xff, 0x2f, 0xe1, /* bx lr */
17 0x67, 0x80, 0x00, 0x00, /* ret */
19 0x07, 0xfe, /* br %r14 */
21 0xc3, /* ret */
/qemu/tests/tcg/openrisc/
H A Dtest_sfeqi.c12 "l.addi %0, %0, 0x1\n\t" in main()
13 "l.sfeqi %0, 0x80\n\t" in main()
23 a = 0x7f; in main()
24 result = 0x81; in main()
27 "l.addi %0, %0, 0x1\n\t" in main()
28 "l.sfeqi %0, 0x80\n\t" in main()
38 return 0; in main()
H A Dtest_sfeq.c8 a = 0x1; in main()
9 b = 0x80; in main()
10 result = 0x2; in main()
13 "l.addi %0, %0, 0x1\n\t" in main()
14 "l.sfeq %0, %1\n\t" in main()
25 a = 0x7f; in main()
26 b = 0x80; in main()
27 result = 0x81; in main()
30 "l.addi %0, %0, 0x1\n\t" in main()
31 "l.sfeq %0, %1\n\t" in main()
[all …]
/qemu/ebpf/
H A Drss.bpf.skeleton.h146 s->maps[0].name = "tap_rss_map_configurations"; in rss_bpf__create_skeleton()
147 s->maps[0].map = &obj->maps.tap_rss_map_configurations; in rss_bpf__create_skeleton()
164 s->progs[0].name = "tun_rss_steering_prog"; in rss_bpf__create_skeleton()
165 s->progs[0].prog = &obj->progs.tun_rss_steering_prog; in rss_bpf__create_skeleton()
166 s->progs[0].link = &obj->links.tun_rss_steering_prog; in rss_bpf__create_skeleton()
171 return 0; in rss_bpf__create_skeleton()
180 \x7f\x45\x4c\x46\x02\x01\x01\0\0\0\0\0\0\0\0\0\x01\0\xf7\0\x01\0\0\0\0\0\0\0\0\ in rss_bpf__elf_bytes()
181 \0\0\0\0\0\0\0\0\0\0\0\xb0\x4b\0\0\0\0\0\0\0\0\0\0\x40\0\0\0\0\0\x40\0\x0d\0\ in rss_bpf__elf_bytes()
182 \x01\0\x7b\x1a\x48\xff\0\0\0\0\xb7\x09\0\0\0\0\0\0\x63\x9a\x54\xff\0\0\0\0\xbf\ in rss_bpf__elf_bytes()
183 \xa7\0\0\0\0\0\0\x07\x07\0\0\x54\xff\xff\xff\x18\x01\0\0\0\0\0\0\0\0\0\0\0\0\0\ in rss_bpf__elf_bytes()
[all …]
/qemu/tests/qtest/
H A Dboot-serial-test.c21 0x88, 0xe0, /* ldi r24, 0x08 */
22 0x80, 0x93, 0xc1, 0x00, /* sts 0x00C1, r24 ; Enable tx */
23 0x86, 0xe0, /* ldi r24, 0x06 */
24 0x80, 0x93, 0xc2, 0x00, /* sts 0x00C2, r24 ; Set the data bits to 8 */
25 0x84, 0xe5, /* ldi r24, 0x54 */
26 0x80, 0x93, 0xc6, 0x00, /* sts 0x00C6, r24 ; Output 'T' */
30 0x0c, 0xc0, 0x3f, 0x14, /* lu12i.w $t0, 0x1fe00 */
31 0x8c, 0x81, 0x87, 0x03, /* ori $t0, $t0, 0x1e0 */
32 0x0d, 0x50, 0x81, 0x03, /* li.w $t1, 'T' */
33 0x8d, 0x01, 0x00, 0x29, /* st.b $t1, $t0, 0 */
[all …]
H A Dtpm-util.c39 if ((start & 1) == 0) { in tpm_util_crb_transfer()
47 g_assert_cmpint(start & 1, ==, 0); in tpm_util_crb_transfer()
49 g_assert_cmpint(sts & 1, ==, 0); in tpm_util_crb_transfer()
58 "\x80\x01\x00\x00\x00\x0c\x00\x00\x01\x44\x00\x00"; in tpm_util_startup()
60 "\x80\x01\x00\x00\x00\x0a\x00\x00\x00\x00"; in tpm_util_startup()
72 "\x80\x02\x00\x00\x00\x41\x00\x00\x01\x82\x00\x00\x00\x0a\x00\x00" in tpm_util_pcrextend()
79 "\x80\x02\x00\x00\x00\x13\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00" in tpm_util_pcrextend()
93 "\x80\x01\x00\x00\x00\x14\x00\x00\x01\x7e\x00\x00\x00\x01\x00\x0b" in tpm_util_pcrread()
157 for (i = 0; swtpm_argv[i]; i++) { in tpm_util_swtpm_start()
174 n = kill(pid, 0); in tpm_util_swtpm_kill()
[all …]
/qemu/hw/riscv/
H A Dopentitan.c42 [IBEX_DEV_ROM] = { 0x00008000, 0x8000 },
43 [IBEX_DEV_RAM] = { 0x10000000, 0x20000 },
44 [IBEX_DEV_FLASH] = { 0x20000000, 0x100000 },
45 [IBEX_DEV_UART] = { 0x40000000, 0x40 },
46 [IBEX_DEV_GPIO] = { 0x40040000, 0x40 },
47 [IBEX_DEV_SPI_DEVICE] = { 0x40050000, 0x2000 },
48 [IBEX_DEV_I2C] = { 0x40080000, 0x80 },
49 [IBEX_DEV_PATTGEN] = { 0x400e0000, 0x40 },
50 [IBEX_DEV_TIMER] = { 0x40100000, 0x200 },
51 [IBEX_DEV_OTP_CTRL] = { 0x40130000, 0x2000 },
[all …]
/qemu/docs/specs/
H A Dedu.rst34 PCI Region 0:
41 Only ``size == 4`` accesses are allowed for addresses ``< 0x80``.
44 0x00 (RO) : identification
45 Value is in the form ``0xRRrr00edu`` where:
49 0x04 (RW) : card liveness check
52 0x08 (RW) : factorial computation
54 This happens only after factorial bit in the status register (0x20
57 0x20 (RW) : status register
60 0x01
62 0x80
[all …]

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