13 #define SCHID_ONE	0x00010000
15 #define CCW_F_CD	0x80
16 #define CCW_F_CC	0x40
17 #define CCW_F_SLI	0x20
18 #define CCW_F_SKP	0x10
19 #define CCW_F_PCI	0x08
20 #define CCW_F_IDA	0x04
21 #define CCW_F_S		0x02
22 #define CCW_F_MIDA	0x01
24 #define CCW_C_NOP	0x03
25 #define CCW_C_TIC	0x08
34 #define ORB_CTRL_KEY	0xf0000000
35 #define ORB_CTRL_SPND	0x08000000
36 #define ORB_CTRL_STR	0x04000000
37 #define ORB_CTRL_MOD	0x02000000
38 #define ORB_CTRL_SYNC	0x01000000
39 #define ORB_CTRL_FMT	0x00800000
40 #define ORB_CTRL_PFCH	0x00400000
41 #define ORB_CTRL_ISIC	0x00200000
42 #define ORB_CTRL_ALCC	0x00100000
43 #define ORB_CTRL_SSIC	0x00080000
44 #define ORB_CTRL_CPTC	0x00040000
45 #define ORB_CTRL_C64	0x00020000
46 #define ORB_CTRL_I2K	0x00010000
47 #define ORB_CTRL_LPM	0x0000ff00
48 #define ORB_CTRL_ILS	0x00000080
49 #define ORB_CTRL_MIDAW	0x00000040
50 #define ORB_CTRL_ORBX	0x00000001
52 #define ORB_LPM_DFLT	0x00008000
63 #define SCSW_SC_PENDING		0x00000001
64 #define SCSW_SC_SECONDARY	0x00000002
65 #define SCSW_SC_PRIMARY		0x00000004
66 #define SCSW_SC_INTERMEDIATE	0x00000008
67 #define SCSW_SC_ALERT		0x00000010
70 #define SCSW_DEVS_DEV_END	0x04
71 #define SCSW_DEVS_SCH_END	0x08
73 #define SCSW_SCHS_PCI	0x80
74 #define SCSW_SCHS_IL	0x40
81 #define PMCW_DNV	0x0001
82 #define PMCW_ENABLE	0x0080
83 #define PMCW_MBUE	0x0010
84 #define PMCW_DCTME	0x0008
85 #define PMCW_ISC_MASK	0x3800
97 #define PMCW_MBF1	0x0004
117 #define CCW_CMD_SENSE_ID	0xe4
121 	uint8_t reserved;        /* always 0x'FF' */
138 		"	ssch	0(%2)\n"  in ssch()
139 		"	ipm	%0\n"  in ssch()
140 		"	srl	%0,28\n"  in ssch()
155 		"	stsch	0(%3)\n"  in stsch()
156 		"	ipm	%0\n"  in stsch()
157 		"	srl	%0,28"  in stsch()
170 		"	msch	0(%3)\n"  in msch()
171 		"	ipm	%0\n"  in msch()
172 		"	srl	%0,28"  in msch()
187 		"	tsch	0(%3)\n"  in tsch()
188 		"	ipm	%0\n"  in tsch()
189 		"	srl	%0,28"  in tsch()
203 		"	ipm	%0\n"  in hsch()
204 		"	srl	%0,28"  in hsch()
218 		"	ipm	%0\n"  in xsch()
219 		"	srl	%0,28"  in xsch()
233 		"	ipm	%0\n"  in csch()
234 		"	srl	%0,28"  in csch()
248 		"	ipm	%0\n"  in rsch()
249 		"	srl	%0,28"  in rsch()
265 		"	ipm	%0\n"  in rchp()
266 		"	srl	%0,28"  in rchp()
342 #define CHSC_SCSC	0x0010
343 #define CHSC_SCSC_LEN	0x0010
350 #define CHSC_SCSC	0x0010
351 #define CHSC_SCSC_LEN	0x0010
353 #define CHSC_ERROR	0x0000
354 #define CHSC_RSP_OK	0x0001
355 #define CHSC_RSP_INVAL	0x0002
356 #define CHSC_RSP_REQERR	0x0003
357 #define CHSC_RSP_ENOCMD	0x0004
358 #define CHSC_RSP_NODATA	0x0005
359 #define CHSC_RSP_SUP31B	0x0006
360 #define CHSC_RSP_EFRMT	0x0007
361 #define CHSC_RSP_ECSSID	0x0008
362 #define CHSC_RSP_ERFRMT	0x0009
363 #define CHSC_RSP_ESSID	0x000A
364 #define CHSC_RSP_EBUSY	0x000B
365 #define CHSC_RSP_MAX	0x000B
371 	asm volatile(" .insn   rre,0xb25f0000,%2,0\n"  in _chsc()
372 		     " ipm     %0\n"  in _chsc()
373 		     " srl     %0,28\n"  in _chsc()