17f2a26cdSPeter Xu /*
27f2a26cdSPeter Xu * Edu PCI device header.
37f2a26cdSPeter Xu *
47f2a26cdSPeter Xu * Copyright (C) 2016 Red Hat, Inc.
57f2a26cdSPeter Xu *
67f2a26cdSPeter Xu * Authors:
77f2a26cdSPeter Xu * Peter Xu <peterx@redhat.com>,
87f2a26cdSPeter Xu *
97f2a26cdSPeter Xu * This work is licensed under the terms of the GNU LGPL, version 2 or
107f2a26cdSPeter Xu * later.
117f2a26cdSPeter Xu *
127f2a26cdSPeter Xu * Edu device is a virtualized device in QEMU. Please refer to
137f2a26cdSPeter Xu * docs/specs/edu.txt in QEMU repository for EDU device manual.
147f2a26cdSPeter Xu */
15*9f0ae301SCornelia Huck #ifndef _PCI_EDU_H_
16*9f0ae301SCornelia Huck #define _PCI_EDU_H_
177f2a26cdSPeter Xu
187f2a26cdSPeter Xu #include "pci.h"
197f2a26cdSPeter Xu #include "asm/io.h"
207f2a26cdSPeter Xu
217f2a26cdSPeter Xu #define PCI_VENDOR_ID_QEMU 0x1234
227f2a26cdSPeter Xu #define PCI_DEVICE_ID_EDU 0x11e8
237f2a26cdSPeter Xu
247f2a26cdSPeter Xu /* The only bar used by EDU device */
257f2a26cdSPeter Xu #define EDU_BAR 0
267f2a26cdSPeter Xu #define EDU_MAGIC 0xed
277f2a26cdSPeter Xu #define EDU_VERSION 0x100
287f2a26cdSPeter Xu #define EDU_DMA_BUF_SIZE (1 << 20)
297f2a26cdSPeter Xu #define EDU_INPUT_BUF_SIZE 256
307f2a26cdSPeter Xu
317f2a26cdSPeter Xu #define EDU_REG_ID 0x0
327f2a26cdSPeter Xu #define EDU_REG_ALIVE 0x4
337f2a26cdSPeter Xu #define EDU_REG_FACTORIAL 0x8
347f2a26cdSPeter Xu #define EDU_REG_STATUS 0x20
358446858dSAndrew Jones #define EDU_REG_INTR_STATUS 0x24
367f2477c2SPeter Xu #define EDU_REG_INTR_RAISE 0x60
378446858dSAndrew Jones #define EDU_REG_INTR_ACK 0x64
387f2a26cdSPeter Xu #define EDU_REG_DMA_SRC 0x80
397f2a26cdSPeter Xu #define EDU_REG_DMA_DST 0x88
407f2a26cdSPeter Xu #define EDU_REG_DMA_COUNT 0x90
417f2a26cdSPeter Xu #define EDU_REG_DMA_CMD 0x98
427f2a26cdSPeter Xu
437f2a26cdSPeter Xu #define EDU_CMD_DMA_START 0x01
447f2a26cdSPeter Xu #define EDU_CMD_DMA_FROM 0x02
457f2a26cdSPeter Xu #define EDU_CMD_DMA_TO 0x00
467f2a26cdSPeter Xu
477f2a26cdSPeter Xu #define EDU_STATUS_FACTORIAL 0x1
487f2a26cdSPeter Xu #define EDU_STATUS_INT_ENABLE 0x80
497f2a26cdSPeter Xu
507f2a26cdSPeter Xu #define EDU_DMA_START 0x40000
517f2a26cdSPeter Xu #define EDU_DMA_SIZE_MAX 4096
527f2a26cdSPeter Xu
537f2a26cdSPeter Xu struct pci_edu_dev {
547f2a26cdSPeter Xu struct pci_dev pci_dev;
557f2a26cdSPeter Xu volatile void *reg_base;
567f2a26cdSPeter Xu };
577f2a26cdSPeter Xu
587f2a26cdSPeter Xu #define edu_reg(d, r) (volatile void *)((d)->reg_base + (r))
597f2a26cdSPeter Xu
edu_reg_readq(struct pci_edu_dev * dev,int reg)607f2a26cdSPeter Xu static inline uint64_t edu_reg_readq(struct pci_edu_dev *dev, int reg)
617f2a26cdSPeter Xu {
627f2a26cdSPeter Xu return __raw_readq(edu_reg(dev, reg));
637f2a26cdSPeter Xu }
647f2a26cdSPeter Xu
edu_reg_readl(struct pci_edu_dev * dev,int reg)657f2a26cdSPeter Xu static inline uint32_t edu_reg_readl(struct pci_edu_dev *dev, int reg)
667f2a26cdSPeter Xu {
677f2a26cdSPeter Xu return __raw_readl(edu_reg(dev, reg));
687f2a26cdSPeter Xu }
697f2a26cdSPeter Xu
edu_reg_writeq(struct pci_edu_dev * dev,int reg,uint64_t val)707f2a26cdSPeter Xu static inline void edu_reg_writeq(struct pci_edu_dev *dev, int reg,
717f2a26cdSPeter Xu uint64_t val)
727f2a26cdSPeter Xu {
737f2a26cdSPeter Xu __raw_writeq(val, edu_reg(dev, reg));
747f2a26cdSPeter Xu }
757f2a26cdSPeter Xu
edu_reg_writel(struct pci_edu_dev * dev,int reg,uint32_t val)767f2a26cdSPeter Xu static inline void edu_reg_writel(struct pci_edu_dev *dev, int reg,
777f2a26cdSPeter Xu uint32_t val)
787f2a26cdSPeter Xu {
797f2a26cdSPeter Xu __raw_writel(val, edu_reg(dev, reg));
807f2a26cdSPeter Xu }
817f2a26cdSPeter Xu
827f2a26cdSPeter Xu bool edu_init(struct pci_edu_dev *dev);
837f2a26cdSPeter Xu void edu_dma(struct pci_edu_dev *dev, iova_t iova,
847f2a26cdSPeter Xu size_t size, unsigned int dev_offset, bool from_device);
857f2a26cdSPeter Xu
867f2a26cdSPeter Xu #endif
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