x86: fix build with GCC10

kvm-unit-tests fail to build with GCC10:

/usr/bin/ld: lib/libcflat.a(usermode.o):
./kvm-unit-tests/lib/x86/usermode.c:17: multiple definition of `jmpbuf';
lib/libcflat

x86: fix build with GCC10

kvm-unit-tests fail to build with GCC10:

/usr/bin/ld: lib/libcflat.a(usermode.o):
./kvm-unit-tests/lib/x86/usermode.c:17: multiple definition of `jmpbuf';
lib/libcflat.a(fault_test.o):
./kvm-unit-tests/lib/x86/fault_test.c:3: first defined here

It seems that 'jmpbuf' doesn't need to be global in either of these files,
make it static in both.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20200617152124.402765-1-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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remove unused file

Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

x86: pmu: Test full-width counter writes support

When the full-width writes capability is set, use the alternative MSR
range to write larger sign counter values (up to GP counter width).

Signed-off

x86: pmu: Test full-width counter writes support

When the full-width writes capability is set, use the alternative MSR
range to write larger sign counter values (up to GP counter width).

Signed-off-by: Like Xu <like.xu@linux.intel.com>
Message-Id: <20200529074347.124619-4-like.xu@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: VMX: Add a VMX-preemption timer expiration test

When the VMX-preemption timer is activated, code executing in VMX
non-root operation should never be able to record a TSC value beyond
the deadli

x86: VMX: Add a VMX-preemption timer expiration test

When the VMX-preemption timer is activated, code executing in VMX
non-root operation should never be able to record a TSC value beyond
the deadline imposed by adding the scaled VMX-preemption timer value
to the first TSC value observed by the guest after VM-entry.

Signed-off-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Peter Shier <pshier@google.com>
Message-Id: <20200508203938.88508-1-jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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VMX: use xAPIC mode on all processors

Results are undefined if xAPIC/x2APIC mode is not homogeneous on all processors.
So far things seemed to have mostly worked, but if you end up calling xapic_icr

VMX: use xAPIC mode on all processors

Results are undefined if xAPIC/x2APIC mode is not homogeneous on all processors.
So far things seemed to have mostly worked, but if you end up calling xapic_icr_write
from an x2APIC-mode processor the write is eaten and the IPI is not delivered.

Reported-by: Cathy Avery <cavery@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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kvm-unit-tests: SVM: Add #defines for CR0.CD and CR0.NW

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Message-Id: <20200409205035.16830-3-krish.sadhukhan@oracle.com>
Signed-off-by: Pao

kvm-unit-tests: SVM: Add #defines for CR0.CD and CR0.NW

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Message-Id: <20200409205035.16830-3-krish.sadhukhan@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Move definition of some exception vectors into processor.h

Both processor.h and desc.h hold some definitions of exception vector.
put them together in processor.h

Signed-off-by: Xiaoyao Li <xi

x86: Move definition of some exception vectors into processor.h

Both processor.h and desc.h hold some definitions of exception vector.
put them together in processor.h

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Fix the name for the SMEP CPUID bit

Fix the X86_FEATURE_* name for SMEP, which is incorrectly named
X86_FEATURE_INVPCID_SINGLE and is a wee bit confusing when looking at
the SMEP unit tests.

N

x86: Fix the name for the SMEP CPUID bit

Fix the X86_FEATURE_* name for SMEP, which is incorrectly named
X86_FEATURE_INVPCID_SINGLE and is a wee bit confusing when looking at
the SMEP unit tests.

Note, there is no INVPCID_SINGLE CPUID bit, the bogus name likely came
from the Linux kernel, which has a synthetic feature flag for
INVPCID_SINGLE in word 7, bit 7 (CPUID 0x7.EBX is stored in word 9).

Fixes: 6ddcc29 ("kvm-unit-test: x86: Implement a generic wrapper for cpuid/cpuid_indexed functions")
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: allow using memory above 4 GiB

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Switch the order of the parameters in report() and report_xfail()

Commit c09c54c66b1df ("lib: use an argument which doesn't require
default argument promotion") fixed a warning that occurs with Clan

Switch the order of the parameters in report() and report_xfail()

Commit c09c54c66b1df ("lib: use an argument which doesn't require
default argument promotion") fixed a warning that occurs with Clang,
but introduced a regression: If the "pass" parameter is a value
which has only set the condition bits in the upper 32 bits of a
64 bit value, the condition is now false since the value is truncated
to "unsigned int" so that the upper bits are simply discarded.

We fixed it by reverting the commit, but that of course also means
trouble with Clang again. We can not use "bool" if it is the last
parameter before the variable argument list. The proper fix is to
swap the parameters around and make the format string the last
parameter.

This patch (except the changes in lib/libcflat.h and lib/report.c
and some rebase conflicts along the way) has basically been created
with following coccinelle script (with some additional manual tweaking
of long and disabled lines afterwards):

@@
expression fmt;
expression pass;
expression list args;
@@
report(
-fmt, pass
+pass, fmt
, args);

@@
expression fmt;
expression pass;
expression list args;
@@
report_xfail(
-fmt, xfail, pass
+xfail, pass, fmt
, args);

Tested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20191206113102.14914-1-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: vmx: Fix the check whether CMCI is supported

The logic of figuring out whether CMCI is supported is broken, causing
the CMCI accessing tests to fail on Skylake bare-metal.

Determine whether CM

x86: vmx: Fix the check whether CMCI is supported

The logic of figuring out whether CMCI is supported is broken, causing
the CMCI accessing tests to fail on Skylake bare-metal.

Determine whether CMCI is supported according to the maximum entries in
the LVT as encoded in the APIC version register.

Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Nadav Amit <namit@vmware.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: add tests for MSR_IA32_TSX_CTRL

Tested-by: Jim Mattson <jmattson@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

kvm-unit-test: x86: Add RDPRU test

Ensure that support for RDPRU is not enumerated in the guest's CPUID
and that the RDPRU instruction raises #UD.

Signed-off-by: Jim Mattson <jmattson@google.com>
R

kvm-unit-test: x86: Add RDPRU test

Ensure that support for RDPRU is not enumerated in the guest's CPUID
and that the RDPRU instruction raises #UD.

Signed-off-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Peter Shier <pshier@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: remove memory constraint from "mov" instruction

Remove a bogus memory contraint as x86 does not have a generic
memory-to-memory "mov" instruction.

Signed-off-by: Bill Wendling <morbo@google.co

x86: remove memory constraint from "mov" instruction

Remove a bogus memory contraint as x86 does not have a generic
memory-to-memory "mov" instruction.

Signed-off-by: Bill Wendling <morbo@google.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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kvm-unit-test: nVMX: Fix 95d6d2c32288 ("nVMX: Test Host Segment Registers and Descriptor Tables on vmentry of nested guests")

Commit 95d6d2c32288 added a test for the Segment Selector VMCS field. Th

kvm-unit-test: nVMX: Fix 95d6d2c32288 ("nVMX: Test Host Segment Registers and Descriptor Tables on vmentry of nested guests")

Commit 95d6d2c32288 added a test for the Segment Selector VMCS field. That test
sets the "host address-space size" VM-exit control to zero and as a result, on
VM-exit the guest exits as 32-bit. Since vmx tests are 64-bit, this results in
a hardware error.
This patch also cleans up a few other areas in commit 95d6d2c32288, including
replacing make_non_canonical() with NONCANONICAL.

Reported-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Krish Sadhukhan <kris.sadhukhan@oracle.com>
Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Bump max number of test CPUs to 255

The max number of CPUs is not actually enforced anywhere, e.g. manually
setting '-smp 240' when running a unit test will cause random corruption
and hangs du

x86: Bump max number of test CPUs to 255

The max number of CPUs is not actually enforced anywhere, e.g. manually
setting '-smp 240' when running a unit test will cause random corruption
and hangs during smp initialization. Increase the max number of test
CPUs to 255, which is the true max kvm-unit-tests can support without
significant changes, e.g. it would need to boot with x2APIC enabled,
support interrupt remapping, etc...

There is no known use case for running with more than 64 CPUs, but the
cost of supporting 255 is minimal, e.g. increases the size of each test
binary by a few kbs and burns a few extra cycles in init_apic_map().

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Declare online_cpus based on MAX_TEST_CPUS

Declare online_cpus so that it is properly sized to have MAX_TEST_CPUS
bits. Currently, online_cpus is hardcoded to a u64, i.e. changing
MAX_TEST_CPU

x86: Declare online_cpus based on MAX_TEST_CPUS

Declare online_cpus so that it is properly sized to have MAX_TEST_CPUS
bits. Currently, online_cpus is hardcoded to a u64, i.e. changing
MAX_TEST_CPUS to be greater than 64 will result in a variety of out of
bounds accesses.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Fix out of bounds access when processing online_cpus

online_cpus is misdeclared as a 64 *byte* variable instead of a 64 *bit*
variable. This causes init_apic_map() to test random bytes when it

x86: Fix out of bounds access when processing online_cpus

online_cpus is misdeclared as a 64 *byte* variable instead of a 64 *bit*
variable. This causes init_apic_map() to test random bytes when it
iterates over online_cpus, which in turn can cause it to overflow id_map
and corrupt rnadom memory, e.g. pg_base. Declare online_cpus using
MAX_TEST_CPUS, which presumably is set explicitly to match the storage
size of online_cpus (64-bit values == max of 64 CPUS).

Reported-by: Evgeny Yakovlev <wrfsh@yandex-team.ru>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Fix breakage of fw_cfg for 32-bit unit tests

Ensure the fw_cfg overrides are parsed prior consuming any of said
overrides. fwcfg_get_u() treats zero as a valid overide value, which
is slightly

x86: Fix breakage of fw_cfg for 32-bit unit tests

Ensure the fw_cfg overrides are parsed prior consuming any of said
overrides. fwcfg_get_u() treats zero as a valid overide value, which
is slightly problematic since the overrides are in the .bss and thus
initialized to zero.

Add a limit check when indexing fw_override so that future code doesn't
spontaneously explode.

Cc: Nadav Amit <nadav.amit@gmail.com>
Fixes: 03b1e4570f967 ("x86: Support environments without test-devices")
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Support environments without test-devices

Enable to run the tests when test-device is not present (e.g.,
bare-metal). Users can provide the number of CPUs and ram size through
kernel parameters

x86: Support environments without test-devices

Enable to run the tests when test-device is not present (e.g.,
bare-metal). Users can provide the number of CPUs and ram size through
kernel parameters.

On Ubuntu that uses grub, for example, the tests can be run by copying a
test to the boot directory (/boot) and adding a menu-entry to grub
(e.g., by editing /etc/grub.d/40_custom):

menuentry 'idt_test' {
set root='[ROOT]'
multiboot [BOOT_RELATIVE]/[TEST].flat [PARAMETERS]
module params.initrd
}

Replace:
* [ROOT] with `grub-probe --target=bios_hints /boot`
* [BOOT_RELATIVE] with `grub-mkrelpath /boot`
* [TEST] with the test executed
* [PARAMETERS] with the test parameters

params.initrd, which would be located on the boot directory should
describe the machine and tell the test infrastructure that a test
device is not present and boot-loader was used (the bootloader and qemu
deliver test . For example for a 4 core machines with 4GB of
memory:

NR_CPUS=4
MEMSIZE=4096
TEST_DEVICE=0
BOOTLOADER=1

Since we do not really use E820, using more than 4GB is likely to fail
due to holes.

Finally, do not forget to run update-grub. Remember that the output goes
to the serial port.

Cc: Andrew Jones <drjones@redhat.com>
Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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kvm-unit-test: x86: Replace cpuid/cpuid_indexed calls with this_cpu_has()

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com>
Signed-off-b

kvm-unit-test: x86: Replace cpuid/cpuid_indexed calls with this_cpu_has()

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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kvm-unit-test: x86: Implement a generic wrapper for cpuid/cpuid_indexed functions

Suggested-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed

kvm-unit-test: x86: Implement a generic wrapper for cpuid/cpuid_indexed functions

Suggested-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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nVMX: Test Host Segment Registers and Descriptor Tables on vmentry of nested guests

According to section "Checks on Host Segment and Descriptor-Table
Registers" in Intel SDM vol 3C, the following ch

nVMX: Test Host Segment Registers and Descriptor Tables on vmentry of nested guests

According to section "Checks on Host Segment and Descriptor-Table
Registers" in Intel SDM vol 3C, the following checks are performed on
vmentry of nested guests:

- In the selector field for each of CS, SS, DS, ES, FS, GS and TR, the
RPL (bits 1:0) and the TI flag (bit 2) must be 0.
- The selector fields for CS and TR cannot be 0000H.
- The selector field for SS cannot be 0000H if the "host address-space
size" VM-exit control is 0.
- On processors that support Intel 64 architecture, the base-address
fields for FS, GS, GDTR, IDTR, and TR must contain canonical
addresses.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Remove duplicate definitions of write_cr4_checking() and put it in library

..so that it can be re-used.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Karl Heubaum <

x86: Remove duplicate definitions of write_cr4_checking() and put it in library

..so that it can be re-used.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com>
[Add 32-bit version of ASM_TRY. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Memory barrier before setting ICR

The wrmsr that is used in x2apic ICR programming does not behave as a
memory barrier. There is a hidden assumption that it is. Add an explicit
memory barrier f

x86: Memory barrier before setting ICR

The wrmsr that is used in x2apic ICR programming does not behave as a
memory barrier. There is a hidden assumption that it is. Add an explicit
memory barrier for this reason.

Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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