1 /* 2 * s390x interrupt handling 3 * 4 * Copyright (c) 2017 Red Hat Inc 5 * 6 * Authors: 7 * David Hildenbrand <david@redhat.com> 8 * 9 * This code is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU Library General Public License version 2. 11 */ 12 #include <libcflat.h> 13 #include <asm/interrupt.h> 14 #include <asm/barrier.h> 15 #include <sclp.h> 16 17 static bool pgm_int_expected; 18 static bool ext_int_expected; 19 static struct lowcore *lc; 20 21 void expect_pgm_int(void) 22 { 23 pgm_int_expected = true; 24 lc->pgm_int_code = 0; 25 mb(); 26 } 27 28 void expect_ext_int(void) 29 { 30 ext_int_expected = true; 31 lc->ext_int_code = 0; 32 mb(); 33 } 34 35 uint16_t clear_pgm_int(void) 36 { 37 uint16_t code; 38 39 mb(); 40 code = lc->pgm_int_code; 41 lc->pgm_int_code = 0; 42 pgm_int_expected = false; 43 return code; 44 } 45 46 void check_pgm_int_code(uint16_t code) 47 { 48 mb(); 49 report(code == lc->pgm_int_code, 50 "Program interrupt: expected(%d) == received(%d)", code, 51 lc->pgm_int_code); 52 } 53 54 static void fixup_pgm_int(void) 55 { 56 switch (lc->pgm_int_code) { 57 case PGM_INT_CODE_PRIVILEGED_OPERATION: 58 /* Normal operation is in supervisor state, so this exception 59 * was produced intentionally and we should return to the 60 * supervisor state. 61 */ 62 lc->pgm_old_psw.mask &= ~PSW_MASK_PSTATE; 63 break; 64 case PGM_INT_CODE_PROTECTION: 65 /* Handling for iep.c test case. */ 66 if (lc->trans_exc_id & 0x80UL && lc->trans_exc_id & 0x04UL && 67 !(lc->trans_exc_id & 0x08UL)) 68 lc->pgm_old_psw.addr = lc->sw_int_grs[14]; 69 break; 70 case PGM_INT_CODE_SEGMENT_TRANSLATION: 71 case PGM_INT_CODE_PAGE_TRANSLATION: 72 case PGM_INT_CODE_TRACE_TABLE: 73 case PGM_INT_CODE_AFX_TRANSLATION: 74 case PGM_INT_CODE_ASX_TRANSLATION: 75 case PGM_INT_CODE_LX_TRANSLATION: 76 case PGM_INT_CODE_EX_TRANSLATION: 77 case PGM_INT_CODE_PRIMARY_AUTHORITY: 78 case PGM_INT_CODE_SECONDARY_AUTHORITY: 79 case PGM_INT_CODE_LFX_TRANSLATION: 80 case PGM_INT_CODE_LSX_TRANSLATION: 81 case PGM_INT_CODE_ALEN_TRANSLATION: 82 case PGM_INT_CODE_ALE_SEQUENCE: 83 case PGM_INT_CODE_ASTE_VALIDITY: 84 case PGM_INT_CODE_ASTE_SEQUENCE: 85 case PGM_INT_CODE_EXTENDED_AUTHORITY: 86 case PGM_INT_CODE_LSTE_SEQUENCE: 87 case PGM_INT_CODE_ASTE_INSTANCE: 88 case PGM_INT_CODE_STACK_FULL: 89 case PGM_INT_CODE_STACK_EMPTY: 90 case PGM_INT_CODE_STACK_SPECIFICATION: 91 case PGM_INT_CODE_STACK_TYPE: 92 case PGM_INT_CODE_STACK_OPERATION: 93 case PGM_INT_CODE_ASCE_TYPE: 94 case PGM_INT_CODE_REGION_FIRST_TRANS: 95 case PGM_INT_CODE_REGION_SECOND_TRANS: 96 case PGM_INT_CODE_REGION_THIRD_TRANS: 97 case PGM_INT_CODE_PER: 98 case PGM_INT_CODE_CRYPTO_OPERATION: 99 /* The interrupt was nullified, the old PSW points at the 100 * responsible instruction. Forward the PSW so we don't loop. 101 */ 102 lc->pgm_old_psw.addr += lc->pgm_int_id; 103 } 104 /* suppressed/terminated/completed point already at the next address */ 105 } 106 107 void handle_pgm_int(void) 108 { 109 if (!pgm_int_expected) 110 report_abort("Unexpected program interrupt: %d at %#lx, ilen %d\n", 111 lc->pgm_int_code, lc->pgm_old_psw.addr, 112 lc->pgm_int_id); 113 114 pgm_int_expected = false; 115 fixup_pgm_int(); 116 } 117 118 void handle_ext_int(void) 119 { 120 if (!ext_int_expected && 121 lc->ext_int_code != EXT_IRQ_SERVICE_SIG) { 122 report_abort("Unexpected external call interrupt (code %#x): at %#lx", 123 lc->ext_int_code, lc->ext_old_psw.addr); 124 return; 125 } 126 127 if (lc->ext_int_code == EXT_IRQ_SERVICE_SIG) { 128 lc->sw_int_crs[0] &= ~(1UL << 9); 129 sclp_handle_ext(); 130 } else { 131 ext_int_expected = false; 132 } 133 134 if (!(lc->sw_int_crs[0] & CR0_EXTM_MASK)) 135 lc->ext_old_psw.mask &= ~PSW_MASK_EXT; 136 } 137 138 void handle_mcck_int(void) 139 { 140 report_abort("Unexpected machine check interrupt: at %#lx", 141 lc->mcck_old_psw.addr); 142 } 143 144 void handle_io_int(void) 145 { 146 report_abort("Unexpected io interrupt: at %#lx", 147 lc->io_old_psw.addr); 148 } 149 150 void handle_svc_int(void) 151 { 152 report_abort("Unexpected supervisor call interrupt: at %#lx", 153 lc->svc_old_psw.addr); 154 } 155