1 #include "libcflat.h" 2 #include "desc.h" 3 #include "processor.h" 4 #include <setjmp.h> 5 6 #ifndef __x86_64__ 7 __attribute__((regparm(1))) 8 #endif 9 void do_handle_exception(struct ex_regs *regs); 10 11 void set_idt_entry(int vec, void *addr, int dpl) 12 { 13 idt_entry_t *e = &boot_idt[vec]; 14 memset(e, 0, sizeof *e); 15 e->offset0 = (unsigned long)addr; 16 e->selector = read_cs(); 17 e->ist = 0; 18 e->type = 14; 19 e->dpl = dpl; 20 e->p = 1; 21 e->offset1 = (unsigned long)addr >> 16; 22 #ifdef __x86_64__ 23 e->offset2 = (unsigned long)addr >> 32; 24 #endif 25 } 26 27 void set_idt_dpl(int vec, u16 dpl) 28 { 29 idt_entry_t *e = &boot_idt[vec]; 30 e->dpl = dpl; 31 } 32 33 void set_idt_sel(int vec, u16 sel) 34 { 35 idt_entry_t *e = &boot_idt[vec]; 36 e->selector = sel; 37 } 38 39 struct ex_record { 40 unsigned long rip; 41 unsigned long handler; 42 }; 43 44 extern struct ex_record exception_table_start, exception_table_end; 45 46 static const char* exception_mnemonic(int vector) 47 { 48 switch(vector) { 49 case 0: return "#DE"; 50 case 1: return "#DB"; 51 case 2: return "#NMI"; 52 case 3: return "#BP"; 53 case 4: return "#OF"; 54 case 5: return "#BR"; 55 case 6: return "#UD"; 56 case 7: return "#NM"; 57 case 8: return "#DF"; 58 case 10: return "#TS"; 59 case 11: return "#NP"; 60 case 12: return "#SS"; 61 case 13: return "#GP"; 62 case 14: return "#PF"; 63 case 16: return "#MF"; 64 case 17: return "#AC"; 65 case 18: return "#MC"; 66 case 19: return "#XM"; 67 default: return "#??"; 68 } 69 } 70 71 void unhandled_exception(struct ex_regs *regs, bool cpu) 72 { 73 printf("Unhandled %sexception %ld %s at ip %016lx\n", 74 cpu ? "cpu " : "", regs->vector, 75 exception_mnemonic(regs->vector), regs->rip); 76 if (regs->vector == 14) 77 printf("PF at %#lx addr %#lx\n", regs->rip, read_cr2()); 78 79 printf("error_code=%04lx rflags=%08lx cs=%08lx\n" 80 "rax=%016lx rcx=%016lx rdx=%016lx rbx=%016lx\n" 81 "rbp=%016lx rsi=%016lx rdi=%016lx\n" 82 #ifdef __x86_64__ 83 " r8=%016lx r9=%016lx r10=%016lx r11=%016lx\n" 84 "r12=%016lx r13=%016lx r14=%016lx r15=%016lx\n" 85 #endif 86 "cr0=%016lx cr2=%016lx cr3=%016lx cr4=%016lx\n" 87 #ifdef __x86_64__ 88 "cr8=%016lx\n" 89 #endif 90 , 91 regs->error_code, regs->rflags, regs->cs, 92 regs->rax, regs->rcx, regs->rdx, regs->rbx, 93 regs->rbp, regs->rsi, regs->rdi, 94 #ifdef __x86_64__ 95 regs->r8, regs->r9, regs->r10, regs->r11, 96 regs->r12, regs->r13, regs->r14, regs->r15, 97 #endif 98 read_cr0(), read_cr2(), read_cr3(), read_cr4() 99 #ifdef __x86_64__ 100 , read_cr8() 101 #endif 102 ); 103 dump_frame_stack((void*) regs->rip, (void*) regs->rbp); 104 abort(); 105 } 106 107 static void check_exception_table(struct ex_regs *regs) 108 { 109 struct ex_record *ex; 110 unsigned ex_val; 111 112 ex_val = regs->vector | (regs->error_code << 16) | 113 (((regs->rflags >> 16) & 1) << 8); 114 asm("mov %0, %%gs:4" : : "r"(ex_val)); 115 116 for (ex = &exception_table_start; ex != &exception_table_end; ++ex) { 117 if (ex->rip == regs->rip) { 118 regs->rip = ex->handler; 119 return; 120 } 121 } 122 unhandled_exception(regs, false); 123 } 124 125 static handler exception_handlers[32]; 126 127 handler handle_exception(u8 v, handler fn) 128 { 129 handler old; 130 131 old = exception_handlers[v]; 132 if (v < 32) 133 exception_handlers[v] = fn; 134 return old; 135 } 136 137 #ifndef __x86_64__ 138 __attribute__((regparm(1))) 139 #endif 140 void do_handle_exception(struct ex_regs *regs) 141 { 142 if (regs->vector < 32 && exception_handlers[regs->vector]) { 143 exception_handlers[regs->vector](regs); 144 return; 145 } 146 unhandled_exception(regs, true); 147 } 148 149 #define EX(NAME, N) extern char NAME##_fault; \ 150 asm (".pushsection .text \n\t" \ 151 #NAME"_fault: \n\t" \ 152 "push"W" $0 \n\t" \ 153 "push"W" $"#N" \n\t" \ 154 "jmp __handle_exception \n\t" \ 155 ".popsection") 156 157 #define EX_E(NAME, N) extern char NAME##_fault; \ 158 asm (".pushsection .text \n\t" \ 159 #NAME"_fault: \n\t" \ 160 "push"W" $"#N" \n\t" \ 161 "jmp __handle_exception \n\t" \ 162 ".popsection") 163 164 EX(de, 0); 165 EX(db, 1); 166 EX(nmi, 2); 167 EX(bp, 3); 168 EX(of, 4); 169 EX(br, 5); 170 EX(ud, 6); 171 EX(nm, 7); 172 EX_E(df, 8); 173 EX_E(ts, 10); 174 EX_E(np, 11); 175 EX_E(ss, 12); 176 EX_E(gp, 13); 177 EX_E(pf, 14); 178 EX(mf, 16); 179 EX_E(ac, 17); 180 EX(mc, 18); 181 EX(xm, 19); 182 183 asm (".pushsection .text \n\t" 184 "__handle_exception: \n\t" 185 #ifdef __x86_64__ 186 "push %r15; push %r14; push %r13; push %r12 \n\t" 187 "push %r11; push %r10; push %r9; push %r8 \n\t" 188 #endif 189 "push %"R "di; push %"R "si; push %"R "bp; sub $"S", %"R "sp \n\t" 190 "push %"R "bx; push %"R "dx; push %"R "cx; push %"R "ax \n\t" 191 #ifdef __x86_64__ 192 "mov %"R "sp, %"R "di \n\t" 193 #else 194 "mov %"R "sp, %"R "ax \n\t" 195 #endif 196 "call do_handle_exception \n\t" 197 "pop %"R "ax; pop %"R "cx; pop %"R "dx; pop %"R "bx \n\t" 198 "add $"S", %"R "sp; pop %"R "bp; pop %"R "si; pop %"R "di \n\t" 199 #ifdef __x86_64__ 200 "pop %r8; pop %r9; pop %r10; pop %r11 \n\t" 201 "pop %r12; pop %r13; pop %r14; pop %r15 \n\t" 202 #endif 203 "add $"S", %"R "sp \n\t" 204 "add $"S", %"R "sp \n\t" 205 "iret"W" \n\t" 206 ".popsection"); 207 208 static void *idt_handlers[32] = { 209 [0] = &de_fault, 210 [1] = &db_fault, 211 [2] = &nmi_fault, 212 [3] = &bp_fault, 213 [4] = &of_fault, 214 [5] = &br_fault, 215 [6] = &ud_fault, 216 [7] = &nm_fault, 217 [8] = &df_fault, 218 [10] = &ts_fault, 219 [11] = &np_fault, 220 [12] = &ss_fault, 221 [13] = &gp_fault, 222 [14] = &pf_fault, 223 [16] = &mf_fault, 224 [17] = &ac_fault, 225 [18] = &mc_fault, 226 [19] = &xm_fault, 227 }; 228 229 void setup_idt(void) 230 { 231 int i; 232 static bool idt_initialized = false; 233 234 if (idt_initialized) { 235 return; 236 } 237 idt_initialized = true; 238 for (i = 0; i < 32; i++) 239 if (idt_handlers[i]) 240 set_idt_entry(i, idt_handlers[i], 0); 241 handle_exception(0, check_exception_table); 242 handle_exception(6, check_exception_table); 243 handle_exception(13, check_exception_table); 244 } 245 246 unsigned exception_vector(void) 247 { 248 unsigned char vector; 249 250 asm("movb %%gs:4, %0" : "=q"(vector)); 251 return vector; 252 } 253 254 int write_cr4_checking(unsigned long val) 255 { 256 asm volatile(ASM_TRY("1f") 257 "mov %0,%%cr4\n\t" 258 "1:": : "r" (val)); 259 return exception_vector(); 260 } 261 262 unsigned exception_error_code(void) 263 { 264 unsigned short error_code; 265 266 asm("mov %%gs:6, %0" : "=rm"(error_code)); 267 return error_code; 268 } 269 270 bool exception_rflags_rf(void) 271 { 272 unsigned char rf_flag; 273 274 asm("movb %%gs:5, %b0" : "=q"(rf_flag)); 275 return rf_flag & 1; 276 } 277 278 static char intr_alt_stack[4096]; 279 280 #ifndef __x86_64__ 281 void set_gdt_entry(int sel, u32 base, u32 limit, u8 access, u8 gran) 282 { 283 int num = sel >> 3; 284 285 /* Setup the descriptor base address */ 286 gdt32[num].base_low = (base & 0xFFFF); 287 gdt32[num].base_middle = (base >> 16) & 0xFF; 288 gdt32[num].base_high = (base >> 24) & 0xFF; 289 290 /* Setup the descriptor limits */ 291 gdt32[num].limit_low = (limit & 0xFFFF); 292 gdt32[num].granularity = ((limit >> 16) & 0x0F); 293 294 /* Finally, set up the granularity and access flags */ 295 gdt32[num].granularity |= (gran & 0xF0); 296 gdt32[num].access = access; 297 } 298 299 void set_gdt_task_gate(u16 sel, u16 tss_sel) 300 { 301 set_gdt_entry(sel, tss_sel, 0, 0x85, 0); // task, present 302 } 303 304 void set_idt_task_gate(int vec, u16 sel) 305 { 306 idt_entry_t *e = &boot_idt[vec]; 307 308 memset(e, 0, sizeof *e); 309 310 e->selector = sel; 311 e->ist = 0; 312 e->type = 5; 313 e->dpl = 0; 314 e->p = 1; 315 } 316 317 /* 318 * 0 - main task 319 * 1 - interrupt task 320 */ 321 322 tss32_t tss_intr; 323 324 void setup_tss32(void) 325 { 326 u16 desc_size = sizeof(tss32_t); 327 328 tss.cr3 = read_cr3(); 329 tss_intr.cr3 = read_cr3(); 330 tss_intr.ss0 = tss_intr.ss1 = tss_intr.ss2 = 0x10; 331 tss_intr.esp = tss_intr.esp0 = tss_intr.esp1 = tss_intr.esp2 = 332 (u32)intr_alt_stack + 4096; 333 tss_intr.cs = 0x08; 334 tss_intr.ds = tss_intr.es = tss_intr.fs = tss_intr.gs = tss_intr.ss = 0x10; 335 tss_intr.iomap_base = (u16)desc_size; 336 set_gdt_entry(TSS_INTR, (u32)&tss_intr, desc_size - 1, 0x89, 0x0f); 337 } 338 339 void set_intr_task_gate(int e, void *fn) 340 { 341 tss_intr.eip = (u32)fn; 342 set_idt_task_gate(e, TSS_INTR); 343 } 344 345 void setup_alt_stack(void) 346 { 347 setup_tss32(); 348 } 349 350 void set_intr_alt_stack(int e, void *fn) 351 { 352 set_intr_task_gate(e, fn); 353 } 354 355 void print_current_tss_info(void) 356 { 357 u16 tr = str(); 358 359 if (tr != TSS_MAIN && tr != TSS_INTR) 360 printf("Unknown TSS %x\n", tr); 361 else 362 printf("TR=%x (%s) Main TSS back link %x. Intr TSS back link %x\n", 363 tr, tr ? "interrupt" : "main", tss.prev, tss_intr.prev); 364 } 365 #else 366 void set_intr_alt_stack(int e, void *addr) 367 { 368 set_idt_entry(e, addr, 0); 369 boot_idt[e].ist = 1; 370 } 371 372 void setup_alt_stack(void) 373 { 374 tss.ist1 = (u64)intr_alt_stack + 4096; 375 } 376 #endif 377 378 static bool exception; 379 static jmp_buf *exception_jmpbuf; 380 381 static void exception_handler_longjmp(void) 382 { 383 longjmp(*exception_jmpbuf, 1); 384 } 385 386 static void exception_handler(struct ex_regs *regs) 387 { 388 /* longjmp must happen after iret, so do not do it now. */ 389 exception = true; 390 regs->rip = (unsigned long)&exception_handler_longjmp; 391 regs->cs = read_cs(); 392 } 393 394 bool test_for_exception(unsigned int ex, void (*trigger_func)(void *data), 395 void *data) 396 { 397 handler old; 398 jmp_buf jmpbuf; 399 int ret; 400 401 old = handle_exception(ex, exception_handler); 402 ret = set_exception_jmpbuf(jmpbuf); 403 if (ret == 0) 404 trigger_func(data); 405 handle_exception(ex, old); 406 return ret; 407 } 408 409 void __set_exception_jmpbuf(jmp_buf *addr) 410 { 411 exception_jmpbuf = addr; 412 } 413