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/kvm-unit-tests/x86/
H A Dtsc_adjust.c20 "MSR_IA32_TSC_ADJUST msr read / write"); in main()
26 "MSR_IA32_TSC_ADJUST msr read / write"); in main()
32 report(t1 <= t4 - t5, "Internal TSC advances across write to IA32_TSC"); in main()
33 report(t2 >= t4, "IA32_TSC advances after write to IA32_TSC"); in main()
H A Dpku.c101 "write to supervisor page when pkru is ad and wp == 1"); in main()
108 "write to supervisor page when pkru is ad and wp == 0"); in main()
115 "write to supervisor page when pkru is wd and wp == 1"); in main()
122 "write to supervisor page when pkru is wd and wp == 0"); in main()
129 "write to user page when pkru is wd and wp == 0"); in main()
136 "write to user page when pkru is wd and wp == 1"); in main()
H A DREADME25 access: lots of page table related access (pte/pde) (read/write)
29 msr: write to msr (only KERNEL_GS_BASE for now)
36 tsc: write to tsc(0) and write to tsc(100000000000) and read it back
H A Dpks.c104 "write to supervisor page when pkrs is ad and wp == 1"); in main()
111 "write to supervisor page when pkrs is ad and wp == 0"); in main()
118 "write to supervisor page when pkrs is wd and wp == 1"); in main()
125 "write to supervisor page when pkrs is wd and wp == 0"); in main()
132 "write to user page when pkrs is wd and wp == 0"); in main()
139 "write to user page when pkrs is wd and wp == 1"); in main()
H A Dsmap.c75 "write from user page with SMAP=0, AC=0, WP=0, PTE.U=1 && PTE.W=0"); in check_smap_nowp()
133 "write to supervisor page"); in main()
151 "write to user page with AC=1"); in main()
174 "write to user stack with AC=1"); in main()
186 "write to user stack with AC=0"); in main()
H A Dioapic.c53 uint32_t write; in ioapic_arbitration_id() local
57 write = 0x0f000000; in ioapic_arbitration_id()
59 ioapic_write_reg(id_offset, write); in ioapic_arbitration_id()
60 report(ioapic_read_reg(arb_offset) == write, in ioapic_arbitration_id()
64 report(ioapic_read_reg(arb_offset) == write, in ioapic_arbitration_id()
H A Dla57.c141 * TODO: A successful write to the MSR_GS_BASE corrupts it, and that in test_register_write()
147 /* Write the test value*/ in test_register_write()
150 "Write to %s with value %lx did %s%s as expected", in test_register_write()
H A Daccess.c148 [AC_ACCESS_WRITE_BIT] = "write",
829 "cmp $0, %[write] \n\t" in ac_test_do_access()
854 [write]"r"(F(AC_ACCESS_WRITE)), in ac_test_do_access()
984 * If the write-fault access is from supervisor and CR0.WP is not set on the
1015 printf("%s: write on the second mapping fail.\n", __FUNCTION__); in check_large_pte_dirty_for_nowp()
1022 printf("%s: write on the first mapping fail.\n", __FUNCTION__); in check_large_pte_dirty_for_nowp()
1052 * Here we write the ro user page when in check_smep_andnot_wp()
1108 printf("%s: %ssupervisor write with CR0.WP=%d did not %s\n", in do_cr0_wp_access()
1187 printf("%s: write access at2 fail\n", __FUNCTION__); in check_effective_sp_permissions()
1199 printf("%s: write access at4 should fail\n", __FUNCTION__); in check_effective_sp_permissions()
H A Dtaskswitch2.c68 if (*error_code == 0x2) /* write access, not present */ in do_pf_tss()
228 /* Write a 'ud2' instruction somewhere below 1 MB */ in test_vm86_switch()
/kvm-unit-tests/lib/arm/asm/
H A Dpgtable-hwdef.h45 #define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 2) << 2) /* normal inner write-through */
46 #define L_PTE_MT_WRITEBACK (_AT(pteval_t, 3) << 2) /* normal inner write-back */
47 #define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 7) << 2) /* normal inner write-alloc */
51 #define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 3) << 2) /* normal inner write-back */
94 #define PMD_SECT_WT (_AT(pmdval_t, 2) << 2) /* normal inner write-through */
95 #define PMD_SECT_WB (_AT(pmdval_t, 3) << 2) /* normal inner write-back */
96 #define PMD_SECT_WBWA (_AT(pmdval_t, 7) << 2) /* normal inner write-alloc */
/kvm-unit-tests/s390x/
H A Dedat.c66 /* Write protect the page and try to write, expect a fault */ in test_dat()
86 * Segment protection should work even with EDAT off, try to write in test_dat()
104 * Protect the various region1/2/3 entries and write, expect the in test_dat()
105 * write to be successful. in test_dat()
136 * Segment protection should work normally, try to write and expect in test_edat1()
147 * to write anyway and expect a fault. in test_edat1()
H A Dsie-dat.c40 /* guest will now write to the test buffer and we verify the contents */ in test_sie_dat()
55 …/* the guest will now write to an unmapped address and we check that this causes a segment transla… in test_sie_dat()
56 report_prefix_push("guest write to unmapped"); in test_sie_dat()
/kvm-unit-tests/riscv/
H A Dsbi-sse.c216 sbiret_report_error(&ret, expected_error, "Write %s error", str); in sse_read_write_test()
267 sbiret_report_error(&ret, SBI_ERR_INVALID_PARAM, "Write invalid prio > 0xFFFFFFFF error"); in sse_test_attrs()
272 sbiret_report_error(&ret, SBI_ERR_INVALID_PARAM, "Write invalid config value error"); in sse_test_attrs()
361 struct alias_test_params *write, *read; in test_alias() local
375 write = &params[w]; in test_alias()
378 ret = sbi_sse_write_attrs(write->event_id, write->attr_id, write->attr_count, &write_value); in test_alias()
380 sbiret_report_error(&ret, SBI_SUCCESS, "Write %s, event 0x%lx attr 0x%lx, attr count 0x%lx", in test_alias()
381 write->str, write->event_id, write->attr_id, write->attr_count); in test_alias()
395 report_fail("Write %s, event 0x%lx attr 0x%lx, attr count 0x%lx value %lx ==" in test_alias()
397 write->str, write->event_id, write->attr_id, in test_alias()
[all …]
H A Dsbi-fwft.c246 static bool adue_check_pte(pteval_t pte, bool write) in adue_check_pte() argument
248 return (pte & (_PAGE_ACCESSED | _PAGE_DIRTY)) == (_PAGE_ACCESSED | (write ? _PAGE_DIRTY : 0)); in adue_check_pte()
251 static void adue_check(bool hw_updating_enabled, bool write) in adue_check() argument
264 if (write) { in adue_check()
265 op = "write"; in adue_check()
275 adue_check_pte(pte_val(*ptep), write), "hw updating %s %s", in adue_check()
/kvm-unit-tests/powerpc/
H A Dtimebase.c163 report(got_interrupt, "interrupt on decrementer write MSB"); in test_dec()
172 report(got_interrupt, "interrupt on decrementer write MSB with irqs on"); in test_dec()
246 report(got_interrupt, "no interrupt on hdecrementer underflown write MSB"); in test_hdec()
266 report(got_interrupt, "interrupt on hdecrementer write MSB with irqs on"); in test_hdec()
/kvm-unit-tests/scripts/
H A Dpretty_print_stacks.py13 sys.stdout.write(string)
63 sys.stderr.write('usage: %s <kernel>\n' % sys.argv[0])
/kvm-unit-tests/lib/
H A Dacpi.h84 u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
85 u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
86 u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
117 u8 reset_value; /* Value to write to the reset_register port to reset the system */
/kvm-unit-tests/s390x/snippets/c/
H A Dsie-dat.c26 /* write some value to the page so the host can verify it */ in main()
/kvm-unit-tests/arm/
H A Dfpu.c18 * Write 8 bytes of random data in random. Returns true on success, false on
262 * Write randomly sampled data into the FPU/SIMD registers.
279 /* Write data into FPU registers */ in __fpuregs_writeall_random()
332 /* write data from CPU1 */ in fpuregs_context_switch_cpu1()
362 /* write data from CPU0 */ in fpuregs_context_switch_cpu0()
H A Dmte.c205 report((*mem == 0xffffffff) && mte_exception && (get_clear_tfsr() == 0), "write"); in mte_sync_test()
229 report((*mem == 0xaaaaaaaa) && (get_clear_tfsr() == TFSR_EL1_TF0), "write"); in mte_asymm_test()
248 report((*mem == 0xcccccccc) && (get_clear_tfsr() == TFSR_EL1_TF0), "write"); in mte_async_test()
/kvm-unit-tests/lib/linux/
H A Defi.h116 #define EFI_MEMORY_WC ((u64)0x0000000000000002ULL) /* write-coalescing */
117 #define EFI_MEMORY_WT ((u64)0x0000000000000004ULL) /* write-through */
118 #define EFI_MEMORY_WB ((u64)0x0000000000000008ULL) /* write-back */
120 #define EFI_MEMORY_WP ((u64)0x0000000000001000ULL) /* write-protect */
544 efi_file_write __efiapi *write; member
/kvm-unit-tests/lib/ppc64/asm/
H A Dpgtable-hwdef.h43 #define _PAGE_WRITE 0x00002 /* write access allowed */
/kvm-unit-tests/lib/riscv/asm/
H A Dio.h11 /* Generic IO read/write. These perform native-endian accesses. */
/kvm-unit-tests/lib/arm64/asm/
H A Dio.h5 * Generic IO read/write. These perform native-endian accesses.
/kvm-unit-tests/lib/x86/asm/
H A Ddebugreg.h55 #define DR7_DATA_IO_DRx(x) DR7_RW_TYPE_DRx(x, 3) /* Read or Write */

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