1 #ifndef _ASMARM64_IO_H_
2 #define _ASMARM64_IO_H_
3 /*
4 * From Linux arch/arm64/include/asm/io.h
5 * Generic IO read/write. These perform native-endian accesses.
6 *
7 * Copyright (C) 2017, Red Hat Inc, Andrew Jones <drjones@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2.
10 */
11 #include <libcflat.h>
12 #include <asm/barrier.h>
13 #include <asm/page.h>
14
15 #define __iomem
16 #define __force
17
18 #define __raw_writeb __raw_writeb
__raw_writeb(u8 val,volatile void __iomem * addr)19 static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
20 {
21 asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr));
22 }
23
24 #define __raw_writew __raw_writew
__raw_writew(u16 val,volatile void __iomem * addr)25 static inline void __raw_writew(u16 val, volatile void __iomem *addr)
26 {
27 asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr));
28 }
29
30 #define __raw_writel __raw_writel
__raw_writel(u32 val,volatile void __iomem * addr)31 static inline void __raw_writel(u32 val, volatile void __iomem *addr)
32 {
33 asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr));
34 }
35
36 #define __raw_writeq __raw_writeq
__raw_writeq(u64 val,volatile void __iomem * addr)37 static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
38 {
39 asm volatile("str %0, [%1]" : : "r" (val), "r" (addr));
40 }
41
42 #define __raw_readb __raw_readb
__raw_readb(const volatile void __iomem * addr)43 static inline u8 __raw_readb(const volatile void __iomem *addr)
44 {
45 u8 val;
46 asm volatile("ldrb %w0, [%1]" : "=r" (val) : "r" (addr));
47 return val;
48 }
49
50 #define __raw_readw __raw_readw
__raw_readw(const volatile void __iomem * addr)51 static inline u16 __raw_readw(const volatile void __iomem *addr)
52 {
53 u16 val;
54 asm volatile("ldrh %w0, [%1]" : "=r" (val) : "r" (addr));
55 return val;
56 }
57
58 #define __raw_readl __raw_readl
__raw_readl(const volatile void __iomem * addr)59 static inline u32 __raw_readl(const volatile void __iomem *addr)
60 {
61 u32 val;
62 asm volatile("ldr %w0, [%1]" : "=r" (val) : "r" (addr));
63 return val;
64 }
65
66 #define __raw_readq __raw_readq
__raw_readq(const volatile void __iomem * addr)67 static inline u64 __raw_readq(const volatile void __iomem *addr)
68 {
69 u64 val;
70 asm volatile("ldr %0, [%1]" : "=r" (val) : "r" (addr));
71 return val;
72 }
73
74 #define ioremap ioremap
ioremap(phys_addr_t phys_addr,size_t size)75 static inline void __iomem *ioremap(phys_addr_t phys_addr, size_t size)
76 {
77 return __ioremap(phys_addr, size);
78 }
79
80 #define virt_to_phys virt_to_phys
virt_to_phys(const volatile void * x)81 static inline phys_addr_t virt_to_phys(const volatile void *x)
82 {
83 return __virt_to_phys((unsigned long)(x));
84 }
85
86 #define phys_to_virt phys_to_virt
phys_to_virt(phys_addr_t x)87 static inline void *phys_to_virt(phys_addr_t x)
88 {
89 return (void *)__phys_to_virt(x);
90 }
91
92 #include <asm-generic/io.h>
93
94 #endif /* _ASMARM64_IO_H_ */
95