1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * From Linux arch/riscv/include/asm/mmio.h
4 */
5 #ifndef _ASMRISCV_IO_H_
6 #define _ASMRISCV_IO_H_
7 #include <libcflat.h>
8
9 #define __iomem
10
11 /* Generic IO read/write. These perform native-endian accesses. */
12 #define __raw_writeb __raw_writeb
__raw_writeb(u8 val,volatile void __iomem * addr)13 static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
14 {
15 asm volatile("sb %0, 0(%1)" : : "r" (val), "r" (addr));
16 }
17
18 #define __raw_writew __raw_writew
__raw_writew(u16 val,volatile void __iomem * addr)19 static inline void __raw_writew(u16 val, volatile void __iomem *addr)
20 {
21 asm volatile("sh %0, 0(%1)" : : "r" (val), "r" (addr));
22 }
23
24 #define __raw_writel __raw_writel
__raw_writel(u32 val,volatile void __iomem * addr)25 static inline void __raw_writel(u32 val, volatile void __iomem *addr)
26 {
27 asm volatile("sw %0, 0(%1)" : : "r" (val), "r" (addr));
28 }
29
30 #ifdef CONFIG_64BIT
31 #define __raw_writeq __raw_writeq
__raw_writeq(u64 val,volatile void __iomem * addr)32 static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
33 {
34 asm volatile("sd %0, 0(%1)" : : "r" (val), "r" (addr));
35 }
36 #endif
37
38 #define __raw_readb __raw_readb
__raw_readb(const volatile void __iomem * addr)39 static inline u8 __raw_readb(const volatile void __iomem *addr)
40 {
41 u8 val;
42
43 asm volatile("lb %0, 0(%1)" : "=r" (val) : "r" (addr));
44 return val;
45 }
46
47 #define __raw_readw __raw_readw
__raw_readw(const volatile void __iomem * addr)48 static inline u16 __raw_readw(const volatile void __iomem *addr)
49 {
50 u16 val;
51
52 asm volatile("lh %0, 0(%1)" : "=r" (val) : "r" (addr));
53 return val;
54 }
55
56 #define __raw_readl __raw_readl
__raw_readl(const volatile void __iomem * addr)57 static inline u32 __raw_readl(const volatile void __iomem *addr)
58 {
59 u32 val;
60
61 asm volatile("lw %0, 0(%1)" : "=r" (val) : "r" (addr));
62 return val;
63 }
64
65 #ifdef CONFIG_64BIT
66 #define __raw_readq __raw_readq
__raw_readq(const volatile void __iomem * addr)67 static inline u64 __raw_readq(const volatile void __iomem *addr)
68 {
69 u64 val;
70
71 asm volatile("ld %0, 0(%1)" : "=r" (val) : "r" (addr));
72 return val;
73 }
74 #endif
75
76 #define ioremap ioremap
77 void __iomem *ioremap(phys_addr_t phys_addr, size_t size);
78
79 #define virt_to_phys virt_to_phys
80 phys_addr_t virt_to_phys(volatile void *address);
81
82 #define phys_to_virt phys_to_virt
83 void *phys_to_virt(phys_addr_t address);
84
85 #include <asm-generic/io.h>
86
87 #endif /* _ASMRISCV_IO_H_ */
88