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/linux-6.15/tools/testing/selftests/drivers/net/mlxsw/
Dmirror_gre.sh2 # SPDX-License-Identifier: GPL-2.0
27 tunnel_create gt6-key ip6gretap 2001:db8:3::1 2001:db8:3::2 \
28 ttl 100 tos inherit allow-localremote \
31 tunnel_create h3-gt6-key ip6gretap 2001:db8:3::2 2001:db8:3::1 \
33 ip link set h3-gt6-key vrf v$h3
34 matchall_sink_create h3-gt6-key
36 ip address add dev $swp3 2001:db8:3::1/64
37 ip address add dev $h3 2001:db8:3::2/64
42 ip address del dev $h3 2001:db8:3::2/64
43 ip address del dev $swp3 2001:db8:3::1/64
[all …]
/linux-6.15/tools/testing/selftests/net/
Dipv6_route_update_soft_lockup.sh2 # SPDX-License-Identifier: GPL-2.0
4 # Testing for potential kernel soft lockup during IPv6 routing table
5 # refresh under heavy outgoing IPv6 traffic. If a kernel soft lockup
11 # ┌----------------┐ ┌----------------┐
17 # | ┌-----------| nexthops |---------┐ |
18 # | |veth_source|<--------------------------------------->|veth_sink|<┐ |
19 # | └-----------|2001:0DB8:1::0:1/96 2001:0DB8:1::1:1/96 |---------┘ | |
22 # | ┌---------┐ | . . | | |
24 # | | routing | | . 2001:0DB8:1::1:80/96| ┌-----┐ |
26 # | | nexthop | | . └--------┴-----┴-┘
[all …]
/linux-6.15/fs/xfs/
Dxfs_qm_syscalls.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2000-2005 Silicon Graphics, Inc.
30 * errno == -EEXIST here. in xfs_qm_scall_quotaoff()
32 if ((mp->m_qflags & flags) == 0) in xfs_qm_scall_quotaoff()
33 return -EEXIST; in xfs_qm_scall_quotaoff()
42 mutex_lock(&mp->m_quotainfo->qi_quotaofflock); in xfs_qm_scall_quotaoff()
43 mp->m_qflags &= ~(flags & XFS_ALL_QUOTA_ENFD); in xfs_qm_scall_quotaoff()
44 spin_lock(&mp->m_sb_lock); in xfs_qm_scall_quotaoff()
45 mp->m_sb.sb_qflags = mp->m_qflags; in xfs_qm_scall_quotaoff()
46 spin_unlock(&mp->m_sb_lock); in xfs_qm_scall_quotaoff()
[all …]
/linux-6.15/drivers/gpu/drm/lima/
Dlima_gp.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
17 #define gp_write(reg, data) writel(data, ip->iomem + reg)
18 #define gp_read(reg) readl(ip->iomem + reg)
22 struct lima_ip *ip = data; in lima_gp_irq_handler() local
23 struct lima_device *dev = ip->dev; in lima_gp_irq_handler()
24 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp; in lima_gp_irq_handler()
25 struct lima_sched_task *task = pipe->current_task; in lima_gp_irq_handler()
37 dev_dbg(dev->dev, "%s out of heap irq status=%x\n", in lima_gp_irq_handler()
38 lima_ip_name(ip), status); in lima_gp_irq_handler()
[all …]
/linux-6.15/drivers/gpu/drm/amd/include/
Damd_shared.h57 * DOC: IP Blocks
59 * GPUs are composed of IP (intellectual property) blocks. These
60 * IP blocks provide various functionalities: display, graphics,
61 * video decode, etc. The IP blocks that comprise a particular GPU
63 * acquires the list of IP blocks for the GPU in use on initialization.
68 * IP block implementations are named using the following convention:
73 * enum amd_ip_block_type - Used to classify IP blocks by functionality.
85 * @AMD_IP_BLOCK_TYPE_ACP: Audio Co-Processor
87 * @AMD_IP_BLOCK_TYPE_MES: Micro-Engine Scheduler
92 * @AMD_IP_BLOCK_TYPE_NUM: Total number of IP block types
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/linux-6.15/arch/arm/mm/
Dproc-fa526.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-fa526.S: MMU functions for FA526
7 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
18 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
50 * Perform a soft reset of the system. Put the CPU into the
54 * loc: location to jump to for soft reset
60 mov ip, #0
61 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
62 mcr p15, 0, ip, c7, c10, 4 @ drain WB
[all …]
Dproc-sa110.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-sa110.S
5 * Copyright (C) 1997-2002 Russell King
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
11 * functions on the StrongARM-110.
18 #include <asm/asm-offsets.h>
21 #include <asm/pgtable-hwdef.h>
24 #include "proc-macros.S"
58 * Perform a soft reset of the system. Put the CPU into the
62 * loc: location to jump to for soft reset
[all …]
Dproc-sa1100.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-sa1100.S
5 * Copyright (C) 1997-2002 Russell King
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
11 * functions on the StrongARM-1100 and StrongARM-1110.
15 * 12-jun-2000, Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
23 #include <asm/asm-offsets.h>
26 #include <asm/pgtable-hwdef.h>
28 #include "proc-macros.S"
43 mcr p15, 0, r0, c9, c0, 5 @ Allow read-buffer operations from userland
[all …]
Dproc-arm1026.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm1026.S: MMU functions for ARM1026EJ-S
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
10 * functions on the ARM1026EJ-S.
17 #include <asm/asm-offsets.h>
19 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
78 * Perform a soft reset of the system. Put the CPU into the
82 * loc: location to jump to for soft reset
87 mov ip, #0
[all …]
Dproc-arm1022.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm1022.S: MMU functions for ARM1022E
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
17 #include <asm/asm-offsets.h>
19 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
78 * Perform a soft reset of the system. Put the CPU into the
82 * loc: location to jump to for soft reset
87 mov ip, #0
88 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
[all …]
Dproc-arm922.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm922.S: MMU functions for ARM922
8 * hacked for non-paged-MM by Hyok S. Choi, 2003.
13 * CONFIG_CPU_ARM922_CPU_IDLE -> nohlt
21 #include <asm/pgtable-hwdef.h>
24 #include "proc-macros.S"
72 * Perform a soft reset of the system. Put the CPU into the
76 * loc: location to jump to for soft reset
81 mov ip, #0
82 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
[all …]
Dproc-arm1020e.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm1020e.S: MMU functions for ARM1020
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
17 #include <asm/asm-offsets.h>
19 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
78 * Perform a soft reset of the system. Put the CPU into the
82 * loc: location to jump to for soft reset
87 mov ip, #0
88 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
[all …]
Dproc-v6.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-v6.S
15 #include <asm/asm-offsets.h>
17 #include <asm/pgtable-hwdef.h>
19 #include "proc-macros.S"
53 * Perform a soft reset of the system. Put the CPU into the
57 * - loc - location to jump to for soft reset
80 mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
98 * - pgd_phys - physical address of new TTB
101 * - we are not using split page tables
[all …]
Dproc-mohawk.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-mohawk.S: MMU functions for Marvell PJ1 core
7 * Heavily based on proc-arm926.S and proc-xsc3.S
16 #include <asm/pgtable-hwdef.h>
19 #include "proc-macros.S"
53 * Perform a soft reset of the system. Put the CPU into the
57 * loc: location to jump to for soft reset
64 mov ip, #0
65 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
66 mcr p15, 0, ip, c7, c10, 4 @ drain WB
[all …]
Dproc-arm1020.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm1020.S: MMU functions for ARM1020
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
17 #include <asm/asm-offsets.h>
19 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
78 * Perform a soft reset of the system. Put the CPU into the
82 * loc: location to jump to for soft reset
87 mov ip, #0
88 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
[all …]
Dproc-arm920.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm920.S: MMU functions for ARM920
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
12 * CONFIG_CPU_ARM920_CPU_IDLE -> nohlt
20 #include <asm/pgtable-hwdef.h>
23 #include "proc-macros.S"
70 * Perform a soft reset of the system. Put the CPU into the
74 * loc: location to jump to for soft reset
79 mov ip, #0
80 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
[all …]
/linux-6.15/sound/soc/xilinx/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 I2S playback and capture using xilinx soft IP. In transmitter
7 mode, IP receives audio in AES format, extracts PCM and sends
8 PCM data. In receiver mode, IP receives PCM audio and
/linux-6.15/drivers/net/can/ifi_canfd/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 tristate "IFI CAN_FD IP"
6 This driver adds support for the I/F/I CAN_FD soft IP block
/linux-6.15/arch/x86/math-emu/
Dfpu_system.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*---------------------------------------------------------------------------+
7 | Australia. E-mail billm@suburbia.net |
9 +---------------------------------------------------------------------------*/
30 mutex_lock(&current->mm->context.lock); in FPU_get_ldt_descriptor()
31 if (current->mm->context.ldt && seg < current->mm->context.ldt->nr_entries) in FPU_get_ldt_descriptor()
32 ret = current->mm->context.ldt->entries[seg]; in FPU_get_ldt_descriptor()
33 mutex_unlock(&current->mm->context.lock); in FPU_get_ldt_descriptor()
46 unsigned long base = (unsigned long)d->base2 << 24; in seg_get_base()
48 return base | ((unsigned long)d->base1 << 16) | d->base0; in seg_get_base()
[all …]
/linux-6.15/drivers/pci/controller/mobiveil/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menu "Mobiveil-based PCIe controllers"
31 Soft IP. It has up to 8 outbound and inbound windows
32 for address translation and it is a PCIe Gen4 IP.
/linux-6.15/fs/xfs/scrub/
Dquota_repair.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2018-2023 Oracle. All Rights Reserved.
62 struct xfs_mount *mp = sc->mp; in xrep_quota_item_fill_bmap_hole()
66 xfs_trans_ijoin(sc->tp, sc->ip, 0); in xrep_quota_item_fill_bmap_hole()
69 error = xfs_trans_reserve_more(sc->tp, XFS_QM_DQALLOC_SPACE_RES(mp), in xrep_quota_item_fill_bmap_hole()
74 error = xfs_bmapi_write(sc->tp, sc->ip, dq->q_fileoffset, in xrep_quota_item_fill_bmap_hole()
80 dq->q_blkno = XFS_FSB_TO_DADDR(mp, irec->br_startblock); in xrep_quota_item_fill_bmap_hole()
82 trace_xrep_dquot_item_fill_bmap_hole(sc->mp, dq->q_type, dq->q_id); in xrep_quota_item_fill_bmap_hole()
85 error = xfs_trans_get_buf(sc->tp, mp->m_ddev_targp, dq->q_blkno, in xrep_quota_item_fill_bmap_hole()
86 mp->m_quotainfo->qi_dqchunklen, 0, &bp); in xrep_quota_item_fill_bmap_hole()
[all …]
/linux-6.15/arch/arm/mach-omap2/
Dhdq1w.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IP block integration code for the HDQ1W/1-wire IP block
8 * Based on the I2C reset code in arch/arm/mach-omap2/i2c.c by
26 * omap_hdq1w_reset - reset the OMAP HDQ1W module
29 * OCP soft reset the HDQ1W IP block. Section 20.6.1.4 "HDQ1W/1-Wire
52 oh->class->sysc->syss_offs) in omap_hdq1w_reset()
58 __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); in omap_hdq1w_reset()
61 oh->name, c); in omap_hdq1w_reset()
/linux-6.15/Documentation/devicetree/bindings/reset/
Dimg,pistachio-reset.txt5 disable individual IP blocks within the Pistachio SoC using "soft reset"
8 The actual action taken when soft reset is asserted is hardware dependent.
18 - compatible: Contains "img,pistachio-reset"
20 - #reset-cells: Contains 1
25 compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
28 clock-names = "sys";
29 #clock-cells = <1>;
31 pistachio_reset: reset-controller {
32 compatible = "img,pistachio-reset";
33 #reset-cells = <1>;
[all …]
/linux-6.15/arch/parisc/kernel/
Dprocess.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PARISC Architecture-dependent parts of process handling
6 * Copyright (C) 1999-2003 Matthew Wilcox <willy at parisc-linux.org>
8 * Copyright (C) 2000 John Marvin <jsm at parisc-linux.org>
9 * Copyright (C) 2000 David Huggins-Daines <dhd with pobox.org>
10 * Copyright (C) 2000-2003 Paul Bame <bame at parisc-linux.org>
13 * Copyright (C) 2000 Richard Hirst <rhirst with parisc-linux.org>
14 * Copyright (C) 2000 Grant Grundler <grundler with parisc-linux.org>
15 * Copyright (C) 2001 Alan Modra <amodra at parisc-linux.org>
16 * Copyright (C) 2001-2002 Ryan Bradetich <rbrad at parisc-linux.org>
[all …]
/linux-6.15/Documentation/networking/device_drivers/ethernet/altera/
Daltera_tse.rst1 .. SPDX-License-Identifier: GPL-2.0
6 Altera Triple-Speed Ethernet MAC driver
9 Copyright |copy| 2008-2014 Altera Corporation
11 This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
12 using the SGDMA and MSGDMA soft DMA IP components. The driver uses the
24 The Triple-Speed Ethernet, SGDMA, and MSGDMA components are all soft IP
31 Triple-Speed Ethernet instance is using an SGDMA or MSGDMA component. The
36 The SGDMA component is to be deprecated in the near future (over the next 1-2
39 developer wishes to support their own soft DMA logic and driver support. Any
43 therefore will not perform as well compared to the MSGDMA soft IP. Please
[all …]

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