Lines Matching +full:soft +full:- +full:ip

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm920.S: MMU functions for ARM920
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
12 * CONFIG_CPU_ARM920_CPU_IDLE -> nohlt
20 #include <asm/pgtable-hwdef.h>
23 #include "proc-macros.S"
70 * Perform a soft reset of the system. Put the CPU into the
74 * loc: location to jump to for soft reset
79 mov ip, #0
80 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
81 mcr p15, 0, ip, c7, c10, 4 @ drain WB
83 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
85 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
86 bic ip, ip, #0x000f @ ............wcam
87 bic ip, ip, #0x1100 @ ...i...s........
88 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
130 mov ip, #0
132 mov r1, #(CACHE_DSEGMENTS - 1) << 5 @ 8 segments
133 1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
140 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
141 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
151 * - start - start address (inclusive)
152 * - end - end address (exclusive)
153 * - flags - vm_flags for address space
156 mov ip, #0
168 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
176 * region described by start, end. If you have non-snooping
179 * - start - virtual start address
180 * - end - virtual end address
192 * region described by start, end. If you have non-snooping
195 * - start - virtual start address
196 * - end - virtual end address
199 bic r0, r0, #CACHE_DLINESIZE - 1
216 * - addr - kernel address
217 * - size - region size
239 * - start - virtual start address
240 * - end - virtual end address
245 tst r0, #CACHE_DLINESIZE - 1
246 bic r0, r0, #CACHE_DLINESIZE - 1
248 tst r1, #CACHE_DLINESIZE - 1
262 * - start - virtual start address
263 * - end - virtual end address
268 bic r0, r0, #CACHE_DLINESIZE - 1
281 * - start - virtual start address
282 * - end - virtual end address
285 bic r0, r0, #CACHE_DLINESIZE - 1
296 * - start - kernel virtual start address
297 * - size - size of region
298 * - dir - DMA direction
310 * - start - kernel virtual start address
311 * - size - size of region
312 * - dir - DMA direction
341 mov ip, #0
343 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
346 @ && Re-written to use Index Ops.
347 @ && Uses registers r1, r3 and ip
349 mov r1, #(CACHE_DSEGMENTS - 1) << 5 @ 8 segments
350 1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
357 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
358 mcr p15, 0, ip, c7, c10, 4 @ drain WB
360 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
381 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
386 stmfd sp!, {r4 - r6, lr}
390 stmia r0, {r4 - r6}
391 ldmfd sp!, {r4 - r6, pc}
395 mov ip, #0
396 mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs
397 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches
398 ldmia r0, {r4 - r6}
421 .size __arm920_setup, . - __arm920_setup
434 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
474 .size __arm920_proc_info, . - __arm920_proc_info