Lines Matching +full:soft +full:- +full:ip

57 * DOC: IP Blocks
59 * GPUs are composed of IP (intellectual property) blocks. These
60 * IP blocks provide various functionalities: display, graphics,
61 * video decode, etc. The IP blocks that comprise a particular GPU
63 * acquires the list of IP blocks for the GPU in use on initialization.
68 * IP block implementations are named using the following convention:
73 * enum amd_ip_block_type - Used to classify IP blocks by functionality.
85 * @AMD_IP_BLOCK_TYPE_ACP: Audio Co-Processor
87 * @AMD_IP_BLOCK_TYPE_MES: Micro-Engine Scheduler
92 * @AMD_IP_BLOCK_TYPE_NUM: Total number of IP block types
185 * enum PP_FEATURE_MASK - Used to mask power play features.
201 * @PP_OVERDRIVE_MASK: Over- and under-clocking support.
257 * enum DC_DEBUG_MASK - Bits that are useful for debugging the Display Core IP
261 * @DC_DISABLE_PIPE_SPLIT: If set, disable pipe-splitting
281 * @DC_DISABLE_PSR: If set, disable Panel self refresh v1 and PSR-SU
292 * @DC_DISABLE_MPO: If set, disable multi-plane offloading
349 * @DC_DISABLE_HDMI_CEC: If set, disable HDMI-CEC feature in amdgpu driver.
354 * @DC_DISABLE_SUBVP: If set, disable DCN Sub-Viewport feature in amdgpu driver.
378 * struct amd_ip_funcs - general hooks for managing amdgpu IP Blocks
379 * @name: Name of IP block
381 * does not configure hw - Optional
382 * @late_init: sets up late driver/hw state (post hw_init) - Optional
389 * @prepare_suspend: handle IP specific changes to prepare for suspend
391 * @suspend: handles IP specific hw/sw changes for suspend
392 * @resume: handles IP specific hw/sw changes for resume
393 * @is_idle: returns current IP block idle status
395 * @check_soft_reset: check soft reset the IP block
396 * @pre_soft_reset: pre soft reset the IP block
397 * @soft_reset: soft reset the IP block
398 * @post_soft_reset: post soft reset the IP block
399 * @set_clockgating_state: enable/disable cg for the IP block
400 * @set_powergating_state: enable/disable pg for the IP block
402 * @dump_ip_state: dump the IP state of the ASIC during a gpu hang
403 * @print_ip_state: print the IP state in devcoredump for each IP of the ASIC
406 * of IP blocks. After acquiring a list of IP blocks for the GPU in use,
407 * the driver can make chip-wide state changes by walking this list and
408 * making calls to hooks from each IP block. This list is ordered to ensure
409 * that the driver initializes the IP blocks in a safe sequence.