arm/mm/proc-arm1020.S

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  *  linux/arch/arm/mm/proc-arm1020.S: MMU functions for ARM1020
7  *  hacked for non-paged-MM by Hyok S. Choi, 2003.
17 #include <asm/asm-offsets.h>
19 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
78  * Perform a soft reset of the system.	Put the CPU into the
82  * loc: location to jump to for soft reset
87 	mov	ip, #0
88 	mcr	p15, 0, ip, c7, c7, 0		@ invalidate I,D caches
89 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
91 	mcr	p15, 0, ip, c8, c7, 0		@ invalidate I & D TLBs
93 	mrc	p15, 0, ip, c1, c0, 0		@ ctrl register
94 	bic	ip, ip, #0x000f 		@ ............wcam
95 	bic	ip, ip, #0x1100 		@ ...i...s........
96 	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
142 	mov	ip, #0
145 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
146 	mov	r1, #(CACHE_DSEGMENTS - 1) << 5	@ 16 segments
147 1:	orr	r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
149 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
157 	mcrne	p15, 0, ip, c7, c5, 0		@ invalidate I cache
159 	mcrne	p15, 0, ip, c7, c10, 4		@ drain WB
169  *	- start	- start address (inclusive)
170  *	- end	- end address (exclusive)
171  *	- flags	- vm_flags for this space
174 	mov	ip, #0
180 	mcr	p15, 0, ip, c7, c10, 4
182 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
189 	mcrne	p15, 0, ip, c7, c5, 0		@ invalidate I cache
191 	mcrne	p15, 0, ip, c7, c10, 4		@ drain WB
199  *	region described by start.  If you have non-snooping
202  *	- start	- virtual start address
203  *	- end	- virtual end address
215  *	region described by start.  If you have non-snooping
218  *	- start	- virtual start address
219  *	- end	- virtual end address
222 	mov	ip, #0
223 	bic	r0, r0, #CACHE_DLINESIZE - 1
224 	mcr	p15, 0, ip, c7, c10, 4
228 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
236 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
247  *	- addr	- kernel address
248  *	- size	- region size
251 	mov	ip, #0
255 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
260 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
272  *	- start	- virtual start address
273  *	- end	- virtual end address
278 	mov	ip, #0
280 	tst	r0, #CACHE_DLINESIZE - 1
281 	bic	r0, r0, #CACHE_DLINESIZE - 1
282 	mcrne	p15, 0, ip, c7, c10, 4
284 	mcrne	p15, 0, ip, c7, c10, 4		@ drain WB
285 	tst	r1, #CACHE_DLINESIZE - 1
286 	mcrne	p15, 0, ip, c7, c10, 4
288 	mcrne	p15, 0, ip, c7, c10, 4		@ drain WB
294 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
302  *	- start	- virtual start address
303  *	- end	- virtual end address
308 	mov	ip, #0
310 	bic	r0, r0, #CACHE_DLINESIZE - 1
312 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
317 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
325  *	- start	- virtual start address
326  *	- end	- virtual end address
329 	mov	ip, #0
331 	bic	r0, r0, #CACHE_DLINESIZE - 1
332 	mcr	p15, 0, ip, c7, c10, 4
334 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
339 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
345  *	- start	- kernel virtual start address
346  *	- size	- size of region
347  *	- dir	- DMA direction
359  *	- start	- kernel virtual start address
360  *	- size	- size of region
361  *	- dir	- DMA direction
370 	mov	ip, #0
372 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
396 2:	mov	ip, r3, LSL #26 		@ shift up entry
397 	orr	ip, ip, r1, LSL #5		@ shift in/up index
398 	mcr	p15, 0, ip, c7, c14, 2		@ Clean & Inval DCache entry
399 	mov	ip, #0
400 	mcr	p15, 0, ip, c7, c10, 4
457 	.size	__arm1020_setup, . - __arm1020_setup
469 	@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
499 	.size	cpu_arm1020_name, . - cpu_arm1020_name
524 	.size	__arm1020_proc_info, . - __arm1020_proc_info