arm/mm/proc-fa526.S

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  *  linux/arch/arm/mm/proc-fa526.S: MMU functions for FA526
7  *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
18 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
50  * Perform a soft reset of the system.  Put the CPU into the
54  * loc: location to jump to for soft reset
60 	mov	ip, #0
61 	mcr	p15, 0, ip, c7, c7, 0		@ invalidate I,D caches
62 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
64 	mcr	p15, 0, ip, c8, c7, 0		@ invalidate I & D TLBs
66 	mrc	p15, 0, ip, c1, c0, 0		@ ctrl register
67 	bic	ip, ip, #0x000f			@ ............wcam
68 	bic	ip, ip, #0x1100			@ ...i...s........
69 	bic	ip, ip, #0x0800			@ BTB off
70 	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
106 	mov	ip, #0
108 	mcr	p15, 0, ip, c7, c6, 0		@ invalidate D cache
110 	mcr	p15, 0, ip, c7, c14, 0		@ clean and invalidate whole D cache
112 	mcr	p15, 0, ip, c7, c5, 0		@ invalidate I cache
113 	mcr	p15, 0, ip, c7, c5, 6		@ invalidate BTB since mm changed
114 	mcr	p15, 0, ip, c7, c10, 4		@ data write barrier
115 	mcr	p15, 0, ip, c7, c5, 4		@ prefetch flush
117 	mcr	p15, 0, ip, c8, c7, 0		@ invalidate UTLB
151 	mcr	p15, 0, r0, c1, c1, 0		@ turn-on ECR
167 	.size	__fa526_setup, . - __fa526_setup
183 	@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
219 	.size	__fa526_proc_info, . - __fa526_proc_info