Lines Matching +full:soft +full:- +full:ip

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-mohawk.S: MMU functions for Marvell PJ1 core
7 * Heavily based on proc-arm926.S and proc-xsc3.S
16 #include <asm/pgtable-hwdef.h>
19 #include "proc-macros.S"
53 * Perform a soft reset of the system. Put the CPU into the
57 * loc: location to jump to for soft reset
64 mov ip, #0
65 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
66 mcr p15, 0, ip, c7, c10, 4 @ drain WB
67 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
68 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
69 bic ip, ip, #0x0007 @ .............cam
70 bic ip, ip, #0x1100 @ ...i...s........
71 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
115 mov ip, #0
117 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache
119 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
120 mcrne p15, 0, ip, c7, c10, 0 @ drain write buffer
130 * - start - start address (inclusive)
131 * - end - end address (exclusive)
132 * - flags - vm_flags describing address space
137 mov ip, #0
151 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
159 * region described by start, end. If you have non-snooping
162 * - start - virtual start address
163 * - end - virtual end address
175 * region described by start, end. If you have non-snooping
178 * - start - virtual start address
179 * - end - virtual end address
184 bic r0, r0, #CACHE_DLINESIZE - 1
201 * - addr - kernel address
202 * - size - region size
224 * - start - virtual start address
225 * - end - virtual end address
230 tst r0, #CACHE_DLINESIZE - 1
232 tst r1, #CACHE_DLINESIZE - 1
234 bic r0, r0, #CACHE_DLINESIZE - 1
247 * - start - virtual start address
248 * - end - virtual end address
253 bic r0, r0, #CACHE_DLINESIZE - 1
266 * - start - virtual start address
267 * - end - virtual end address
270 bic r0, r0, #CACHE_DLINESIZE - 1
282 * - start - kernel virtual start address
283 * - size - size of region
284 * - dir - DMA direction
296 * - start - kernel virtual start address
297 * - size - size of region
298 * - dir - DMA direction
322 mov ip, #0
323 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache
324 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
325 mcr p15, 0, ip, c7, c10, 4 @ drain WB
328 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
352 stmfd sp!, {r4 - r9, lr}
360 stmia r0, {r4 - r9} @ store cp regs
361 ldmia sp!, {r4 - r9, pc}
365 ldmia r0, {r4 - r9} @ load cp regs
366 mov ip, #0
367 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB
368 mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer
369 mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer
370 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
402 .size __mohawk_setup, . - __mohawk_setup
416 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
452 .size __88sv331x_proc_info, . - __88sv331x_proc_info