Lines Matching +full:soft +full:- +full:ip
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm1020e.S: MMU functions for ARM1020
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
17 #include <asm/asm-offsets.h>
19 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
78 * Perform a soft reset of the system. Put the CPU into the
82 * loc: location to jump to for soft reset
87 mov ip, #0
88 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
89 mcr p15, 0, ip, c7, c10, 4 @ drain WB
91 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
93 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
94 bic ip, ip, #0x000f @ ............wcam
95 bic ip, ip, #0x1100 @ ...i...s........
96 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
142 mov ip, #0
145 mcr p15, 0, ip, c7, c10, 4 @ drain WB
146 mov r1, #(CACHE_DSEGMENTS - 1) << 5 @ 16 segments
147 1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
156 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
158 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
168 * - start - start address (inclusive)
169 * - end - end address (exclusive)
170 * - flags - vm_flags for this space
173 mov ip, #0
186 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
188 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
196 * region described by start. If you have non-snooping
199 * - start - virtual start address
200 * - end - virtual end address
212 * region described by start. If you have non-snooping
215 * - start - virtual start address
216 * - end - virtual end address
219 mov ip, #0
220 bic r0, r0, #CACHE_DLINESIZE - 1
231 mcr p15, 0, ip, c7, c10, 4 @ drain WB
242 * - addr - kernel address
243 * - size - region size
246 mov ip, #0
254 mcr p15, 0, ip, c7, c10, 4 @ drain WB
266 * - start - virtual start address
267 * - end - virtual end address
272 mov ip, #0
274 tst r0, #CACHE_DLINESIZE - 1
275 bic r0, r0, #CACHE_DLINESIZE - 1
277 tst r1, #CACHE_DLINESIZE - 1
284 mcr p15, 0, ip, c7, c10, 4 @ drain WB
292 * - start - virtual start address
293 * - end - virtual end address
298 mov ip, #0
300 bic r0, r0, #CACHE_DLINESIZE - 1
306 mcr p15, 0, ip, c7, c10, 4 @ drain WB
314 * - start - virtual start address
315 * - end - virtual end address
318 mov ip, #0
320 bic r0, r0, #CACHE_DLINESIZE - 1
326 mcr p15, 0, ip, c7, c10, 4 @ drain WB
332 * - start - kernel virtual start address
333 * - size - size of region
334 * - dir - DMA direction
346 * - start - kernel virtual start address
347 * - size - size of region
348 * - dir - DMA direction
357 mov ip, #0
382 2: mov ip, r3, LSL #26 @ shift up entry
383 orr ip, ip, r1, LSL #5 @ shift in/up index
384 mcr p15, 0, ip, c7, c14, 2 @ Clean & Inval DCache entry
385 mov ip, #0
439 .size __arm1020e_setup, . - __arm1020e_setup
451 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
485 .size __arm1020e_proc_info, . - __arm1020e_proc_info