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Searched refs:intc (Results 1 – 25 of 38) sorted by relevance

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/qemu/include/hw/ppc/
H A Dspapr_irq.h58 int (*activate)(SpaprInterruptController *intc, uint32_t nr_servers,
60 void (*deactivate)(SpaprInterruptController *intc);
66 int (*cpu_intc_create)(SpaprInterruptController *intc,
68 void (*cpu_intc_reset)(SpaprInterruptController *intc, PowerPCCPU *cpu);
69 void (*cpu_intc_destroy)(SpaprInterruptController *intc, PowerPCCPU *cpu);
70 int (*claim_irq)(SpaprInterruptController *intc, int irq, bool lsi,
72 void (*free_irq)(SpaprInterruptController *intc, int irq);
75 void (*set_irq)(SpaprInterruptController *intc, int irq, int val);
76 void (*print_info)(SpaprInterruptController *intc, GString *buf);
77 void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers,
[all …]
H A Dxics_spapr.h38 int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers,
40 void xics_kvm_disconnect(SpaprInterruptController *intc);
H A Dspapr_xive.h80 int kvmppc_xive_connect(SpaprInterruptController *intc, uint32_t nr_servers,
82 void kvmppc_xive_disconnect(SpaprInterruptController *intc);
H A Dpnv_core.h85 Object *intc; member
/qemu/hw/arm/
H A Daspeed_ast27x0-ssp.c121 return qdev_get_gpio_in(DEVICE(&a->intc[idx].orgates[or_idx]), in aspeed_soc_ast27x0ssp_get_irq()
145 object_initialize_child(obj, "intc0", &a->intc[0], in aspeed_soc_ast27x0ssp_init()
147 object_initialize_child(obj, "intc1", &a->intc[1], in aspeed_soc_ast27x0ssp_init()
201 if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) { in aspeed_soc_ast27x0ssp_realize()
205 aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[0]), 0, in aspeed_soc_ast27x0ssp_realize()
209 if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[1]), errp)) { in aspeed_soc_ast27x0ssp_realize()
213 aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[1]), 0, in aspeed_soc_ast27x0ssp_realize()
217 for (i = 0; i < ASPEED_INTC_GET_CLASS(&a->intc[0])->num_inpins; i++) { in aspeed_soc_ast27x0ssp_realize()
218 qdev_connect_gpio_out(DEVICE(&a->intc[0].orgates[i]), 0, in aspeed_soc_ast27x0ssp_realize()
219 qdev_get_gpio_in(DEVICE(&a->intc[0]), i)); in aspeed_soc_ast27x0ssp_realize()
[all …]
H A Daspeed_ast27x0-tsp.c121 return qdev_get_gpio_in(DEVICE(&a->intc[idx].orgates[or_idx]), in aspeed_soc_ast27x0tsp_get_irq()
145 object_initialize_child(obj, "intc0", &a->intc[0], in aspeed_soc_ast27x0tsp_init()
147 object_initialize_child(obj, "intc1", &a->intc[1], in aspeed_soc_ast27x0tsp_init()
201 if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) { in aspeed_soc_ast27x0tsp_realize()
205 aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[0]), 0, in aspeed_soc_ast27x0tsp_realize()
209 if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[1]), errp)) { in aspeed_soc_ast27x0tsp_realize()
213 aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[1]), 0, in aspeed_soc_ast27x0tsp_realize()
217 for (i = 0; i < ASPEED_INTC_GET_CLASS(&a->intc[0])->num_inpins; i++) { in aspeed_soc_ast27x0tsp_realize()
218 qdev_connect_gpio_out(DEVICE(&a->intc[0].orgates[i]), 0, in aspeed_soc_ast27x0tsp_realize()
219 qdev_get_gpio_in(DEVICE(&a->intc[0]), i)); in aspeed_soc_ast27x0tsp_realize()
[all …]
H A Daspeed_ast27x0.c289 return qdev_get_gpio_in(DEVICE(&a->intc[idx].orgates[or_idx]), in aspeed_soc_ast2700_get_irq()
311 return qdev_get_gpio_in(DEVICE(&a->intc[idx].orgates[or_idx]), in aspeed_soc_ast2700_get_irq_index()
488 object_initialize_child(obj, "intc", &a->intc[0], TYPE_ASPEED_2700_INTC); in aspeed_soc_ast2700_init()
489 object_initialize_child(obj, "intcio", &a->intc[1], in aspeed_soc_ast2700_init()
619 AspeedINTCClass *ic = ASPEED_INTC_GET_CLASS(&a->intc[0]); in aspeed_soc_ast2700_realize()
620 AspeedINTCClass *icio = ASPEED_INTC_GET_CLASS(&a->intc[1]); in aspeed_soc_ast2700_realize()
651 if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) { in aspeed_soc_ast2700_realize()
655 aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[0]), 0, in aspeed_soc_ast2700_realize()
659 if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[1]), errp)) { in aspeed_soc_ast2700_realize()
663 aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[1]), 0, in aspeed_soc_ast2700_realize()
[all …]
H A Dallwinner-a10.c70 object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC); in aw_a10_init()
108 if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), errp)) { in aw_a10_realize()
111 sysbusdev = SYS_BUS_DEVICE(&s->intc); in aw_a10_realize()
117 qdev_pass_gpios(DEVICE(&s->intc), dev, NULL); in aw_a10_realize()
H A Dvexpress.c432 hwaddr addr, hwaddr size, uint32_t intc, in add_virtio_mmio_node() argument
454 qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", intc); in add_virtio_mmio_node()
484 uint32_t acells, scells, intc; in vexpress_modify_dtb() local
491 intc = find_int_controller(fdt); in vexpress_modify_dtb()
492 if (!intc) { in vexpress_modify_dtb()
508 0x200, intc, 40 + i); in vexpress_modify_dtb()
/qemu/hw/ppc/
H A Dspapr_irq.c76 SpaprInterruptController *intc, in spapr_irq_init_kvm() argument
83 if (fn(intc, nr_servers, &local_err) < 0) { in spapr_irq_init_kvm()
218 SpaprInterruptController *intc = intcs[i]; in spapr_irq_cpu_intc_create() local
219 if (intc) { in spapr_irq_cpu_intc_create()
220 SpaprInterruptControllerClass *sicc = SPAPR_INTC_GET_CLASS(intc); in spapr_irq_cpu_intc_create()
221 rc = sicc->cpu_intc_create(intc, cpu, errp); in spapr_irq_cpu_intc_create()
237 SpaprInterruptController *intc = intcs[i]; in spapr_irq_cpu_intc_reset() local
238 if (intc) { in spapr_irq_cpu_intc_reset()
239 SpaprInterruptControllerClass *sicc = SPAPR_INTC_GET_CLASS(intc); in spapr_irq_cpu_intc_reset()
240 sicc->cpu_intc_reset(intc, cpu); in spapr_irq_cpu_intc_reset()
[all …]
H A Dpnv.c1244 pnv_cpu->intc = obj; in pnv_chip_power8_intc_create()
1252 icp_reset(ICP(pnv_cpu->intc)); in pnv_chip_power8_intc_reset()
1259 icp_destroy(ICP(pnv_cpu->intc)); in pnv_chip_power8_intc_destroy()
1260 pnv_cpu->intc = NULL; in pnv_chip_power8_intc_destroy()
1266 icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), buf); in pnv_chip_power8_intc_print_info()
1356 pnv_cpu->intc = obj; in pnv_chip_power9_intc_create()
1363 xive_tctx_reset(XIVE_TCTX(pnv_cpu->intc)); in pnv_chip_power9_intc_reset()
1370 xive_tctx_destroy(XIVE_TCTX(pnv_cpu->intc)); in pnv_chip_power9_intc_destroy()
1371 pnv_cpu->intc = NULL; in pnv_chip_power9_intc_destroy()
1377 xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf); in pnv_chip_power9_intc_print_info()
[all …]
/qemu/hw/intc/
H A Dxics_spapr.c310 static void xics_spapr_dt(SpaprInterruptController *intc, uint32_t nr_servers, in xics_spapr_dt() argument
332 static int xics_spapr_cpu_intc_create(SpaprInterruptController *intc, in xics_spapr_cpu_intc_create() argument
335 ICSState *ics = ICS_SPAPR(intc); in xics_spapr_cpu_intc_create()
348 static void xics_spapr_cpu_intc_reset(SpaprInterruptController *intc, in xics_spapr_cpu_intc_reset() argument
354 static void xics_spapr_cpu_intc_destroy(SpaprInterruptController *intc, in xics_spapr_cpu_intc_destroy() argument
363 static int xics_spapr_claim_irq(SpaprInterruptController *intc, int irq, in xics_spapr_claim_irq() argument
366 ICSState *ics = ICS_SPAPR(intc); in xics_spapr_claim_irq()
380 static void xics_spapr_free_irq(SpaprInterruptController *intc, int irq) in xics_spapr_free_irq() argument
382 ICSState *ics = ICS_SPAPR(intc); in xics_spapr_free_irq()
390 static void xics_spapr_set_irq(SpaprInterruptController *intc, int irq, int val) in xics_spapr_set_irq() argument
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H A Dspapr_xive.c563 static int spapr_xive_post_load(SpaprInterruptController *intc, int version_id) in spapr_xive_post_load() argument
565 SpaprXive *xive = SPAPR_XIVE(intc); in spapr_xive_post_load()
590 static int spapr_xive_claim_irq(SpaprInterruptController *intc, int lisn, in spapr_xive_claim_irq() argument
593 SpaprXive *xive = SPAPR_XIVE(intc); in spapr_xive_claim_irq()
620 static void spapr_xive_free_irq(SpaprInterruptController *intc, int lisn) in spapr_xive_free_irq() argument
622 SpaprXive *xive = SPAPR_XIVE(intc); in spapr_xive_free_irq()
638 static int spapr_xive_cpu_intc_create(SpaprInterruptController *intc, in spapr_xive_cpu_intc_create() argument
641 SpaprXive *xive = SPAPR_XIVE(intc); in spapr_xive_cpu_intc_create()
660 static void spapr_xive_cpu_intc_reset(SpaprInterruptController *intc, in spapr_xive_cpu_intc_reset() argument
679 static void spapr_xive_cpu_intc_destroy(SpaprInterruptController *intc, in spapr_xive_cpu_intc_destroy() argument
[all …]
H A Domap_intc.c368 void omap_intc_set_iclk(OMAPIntcState *intc, omap_clk clk) in omap_intc_set_iclk() argument
370 intc->iclk = clk; in omap_intc_set_iclk()
373 void omap_intc_set_fclk(OMAPIntcState *intc, omap_clk clk) in omap_intc_set_fclk() argument
375 intc->fclk = clk; in omap_intc_set_fclk()
H A Dxics_kvm.c348 int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers, in xics_kvm_connect() argument
351 ICSState *ics = ICS_SPAPR(intc); in xics_kvm_connect()
449 xics_kvm_disconnect(intc); in xics_kvm_connect()
453 void xics_kvm_disconnect(SpaprInterruptController *intc) in xics_kvm_disconnect() argument
H A Dspapr_xive_kvm.c718 int kvmppc_xive_connect(SpaprInterruptController *intc, uint32_t nr_servers, in kvmppc_xive_connect() argument
721 SpaprXive *xive = SPAPR_XIVE(intc); in kvmppc_xive_connect()
819 kvmppc_xive_disconnect(intc); in kvmppc_xive_connect()
823 void kvmppc_xive_disconnect(SpaprInterruptController *intc) in kvmppc_xive_disconnect() argument
825 SpaprXive *xive = SPAPR_XIVE(intc); in kvmppc_xive_disconnect()
/qemu/hw/microblaze/
H A Dxlnx-zynqmp-pmu.c55 XlnxPMUIOIntc intc; member
66 object_initialize_child(obj, "intc", &s->intc, TYPE_XLNX_PMU_IO_INTC); in xlnx_zynqmp_pmu_soc_init()
102 object_property_set_uint(OBJECT(&s->intc), "intc-intr-size", 0x10, in xlnx_zynqmp_pmu_soc_realize()
104 object_property_set_uint(OBJECT(&s->intc), "intc-level-edge", 0x0, in xlnx_zynqmp_pmu_soc_realize()
106 object_property_set_uint(OBJECT(&s->intc), "intc-positive", 0xffff, in xlnx_zynqmp_pmu_soc_realize()
108 if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), errp)) { in xlnx_zynqmp_pmu_soc_realize()
111 sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR); in xlnx_zynqmp_pmu_soc_realize()
112 sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0, in xlnx_zynqmp_pmu_soc_realize()
120 qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i])); in xlnx_zynqmp_pmu_soc_realize()
/qemu/hw/sh4/
H A Dsh7750.c81 struct intc_desc intc; member
755 sh_intc_init(sysmem, &s->intc, NR_SOURCES, in sh7750_init()
759 sh_intc_register_sources(&s->intc, in sh7750_init()
763 cpu->env.intc_handle = &s->intc; in sh7750_init()
777 qdev_connect_gpio_out_named(dev, "eri", 0, s->intc.irqs[SCI1_ERI]); in sh7750_init()
778 qdev_connect_gpio_out_named(dev, "rxi", 0, s->intc.irqs[SCI1_RXI]); in sh7750_init()
779 qdev_connect_gpio_out_named(dev, "txi", 0, s->intc.irqs[SCI1_TXI]); in sh7750_init()
780 qdev_connect_gpio_out_named(dev, "tei", 0, s->intc.irqs[SCI1_TEI]); in sh7750_init()
795 qdev_connect_gpio_out_named(dev, "eri", 0, s->intc.irqs[SCIF_ERI]); in sh7750_init()
796 qdev_connect_gpio_out_named(dev, "rxi", 0, s->intc.irqs[SCIF_RXI]); in sh7750_init()
[all …]
/qemu/hw/core/
H A Dmachine-qmp-cmds.c326 InterruptStatsProvider *intc; in qmp_x_query_irq_foreach() local
331 intc = INTERRUPT_STATS_PROVIDER(obj); in qmp_x_query_irq_foreach()
336 k->get_statistics(intc, &irq_counts, &nb_irqs)) { in qmp_x_query_irq_foreach()
369 InterruptStatsProvider *intc; in qmp_x_query_intc_foreach() local
374 intc = INTERRUPT_STATS_PROVIDER(obj); in qmp_x_query_intc_foreach()
377 k->print_info(intc, buf); in qmp_x_query_intc_foreach()
/qemu/pc-bios/dtb/
H A Dpetalogix-ml605.dts144 interrupt-parent = < &intc >;
182 interrupt-parent = < &intc >;
205 interrupt-parent = < &intc >;
222 interrupt-parent = < &intc >;
234 intc: interrupt-controller@81800000 { label
236 compatible = "xlnx,axi-intc-1.01.a\0xlnx,xps-intc-1.00.a";
/qemu/include/hw/arm/
H A Daspeed_soc.h135 AspeedINTCState intc[2]; member
151 AspeedINTCState intc[2]; member
163 AspeedINTCState intc[2]; member
H A Dallwinner-a10.h39 AwA10PICState intc; member
/qemu/include/hw/core/
H A Dsysbus-fdt.h35 void platform_bus_add_all_fdt_nodes(void *fdt, const char *intc, hwaddr addr,
/qemu/hw/riscv/
H A Dsifive_u.c172 char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu); in create_fdt() local
189 qemu_fdt_add_subnode(fdt, intc); in create_fdt()
190 qemu_fdt_setprop_cell(fdt, intc, "phandle", cpu_phandle); in create_fdt()
191 qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc"); in create_fdt()
192 qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0); in create_fdt()
193 qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1); in create_fdt()
194 g_free(intc); in create_fdt()
/qemu/docs/specs/
H A Dindex.rst41 aspeed-intc

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