81     struct intc_desc intc;  member
755     sh_intc_init(sysmem, &s->intc, NR_SOURCES,  in sh7750_init()
759     sh_intc_register_sources(&s->intc,  in sh7750_init()
763     cpu->env.intc_handle = &s->intc;  in sh7750_init()
777     qdev_connect_gpio_out_named(dev, "eri", 0, s->intc.irqs[SCI1_ERI]);  in sh7750_init()
778     qdev_connect_gpio_out_named(dev, "rxi", 0, s->intc.irqs[SCI1_RXI]);  in sh7750_init()
779     qdev_connect_gpio_out_named(dev, "txi", 0, s->intc.irqs[SCI1_TXI]);  in sh7750_init()
780     qdev_connect_gpio_out_named(dev, "tei", 0, s->intc.irqs[SCI1_TEI]);  in sh7750_init()
795     qdev_connect_gpio_out_named(dev, "eri", 0, s->intc.irqs[SCIF_ERI]);  in sh7750_init()
796     qdev_connect_gpio_out_named(dev, "rxi", 0, s->intc.irqs[SCIF_RXI]);  in sh7750_init()
797     qdev_connect_gpio_out_named(dev, "txi", 0, s->intc.irqs[SCIF_TXI]);  in sh7750_init()
798     qdev_connect_gpio_out_named(dev, "bri", 0, s->intc.irqs[SCIF_BRI]);  in sh7750_init()
803                 s->intc.irqs[TMU0],  in sh7750_init()
804                 s->intc.irqs[TMU1],  in sh7750_init()
805                 s->intc.irqs[TMU2_TUNI],  in sh7750_init()
806                 s->intc.irqs[TMU2_TICPI]);  in sh7750_init()
809         sh_intc_register_sources(&s->intc,  in sh7750_init()
815         sh_intc_register_sources(&s->intc,  in sh7750_init()
821         sh_intc_register_sources(&s->intc,  in sh7750_init()
825                     s->intc.irqs[TMU3],  in sh7750_init()
826                     s->intc.irqs[TMU4],  in sh7750_init()
831         sh_intc_register_sources(&s->intc,  in sh7750_init()
837         sh_intc_register_sources(&s->intc,  in sh7750_init()
842     sh_intc_register_sources(&s->intc,  in sh7750_init()
850     sh_intc_toggle_source(&s->intc.sources[IRL], 1, 0); /* enable */  in sh7750_irl()
851     return qemu_allocate_irq(sh_intc_set_irl, &s->intc.sources[IRL], 0);  in sh7750_irl()