Searched +full:ipq9574 +full:- +full:gcc (Results 1 – 21 of 21) sorted by relevance
/linux-6.15/Documentation/devicetree/bindings/clock/ |
D | qcom,ipq9574-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on IPQ9574 10 - Bjorn Andersson <andersson@kernel.org> 11 - Anusha Rao <quic_anusha@quicinc.com> 15 domains on IPQ9574 18 include/dt-bindings/clock/qcom,ipq9574-gcc.h 19 include/dt-bindings/reset/qcom,ipq9574-gcc.h [all …]
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D | qcom,ipq9574-nsscc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-nsscc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Networking Sub System Clock & Reset Controller on IPQ9574 10 - Bjorn Andersson <andersson@kernel.org> 11 - Anusha Rao <quic_anusha@quicinc.com> 15 resets on IPQ9574 18 include/dt-bindings/clock/qcom,ipq9574-nsscc.h 19 include/dt-bindings/reset/qcom,ipq9574-nsscc.h [all …]
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D | qcom,ipq9574-cmn-pll.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-cmn-pll.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Luo Jie <quic_luoj@quicinc.com> 15 input clock. This reference clock is from the on-board Wi-Fi. 17 the devices providing networking functions and to GCC. These 20 PLL block also outputs fixed rate clocks to GCC. The PLL's 27 - qcom,ipq9574-cmn-pll [all …]
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/linux-6.15/arch/arm64/boot/dts/qcom/ |
D | ipq9574.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * IPQ9574 SoC device tree source 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 6 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved. 9 #include <dt-bindings/clock/qcom,apss-ipq.h> 10 #include <dt-bindings/clock/qcom,ipq-cmn-pll.h> 11 #include <dt-bindings/clock/qcom,ipq9574-gcc.h> 12 #include <dt-bindings/interconnect/qcom,ipq9574.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/reset/qcom,ipq9574-gcc.h> [all …]
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/linux-6.15/Documentation/devicetree/bindings/phy/ |
D | qcom,ipq8074-qmp-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,ipq8074-qmp-pcie-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 19 - enum: 20 - qcom,ipq6018-qmp-pcie-phy 21 - qcom,ipq8074-qmp-gen3-pcie-phy 22 - qcom,ipq8074-qmp-pcie-phy 23 - qcom,ipq9574-qmp-gen3x1-pcie-phy [all …]
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D | qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 19 - qcom,ipq5424-qmp-usb3-phy 20 - qcom,ipq6018-qmp-usb3-phy 21 - qcom,ipq8074-qmp-usb3-phy 22 - qcom,ipq9574-qmp-usb3-phy 23 - qcom,msm8996-qmp-usb3-phy [all …]
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D | qcom,qusb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Wesley Cheng <quic_wcheng@quicinc.com> 19 - items: 20 - enum: 21 - qcom,ipq5424-qusb2-phy 22 - qcom,ipq6018-qusb2-phy 23 - qcom,ipq8074-qusb2-phy [all …]
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/linux-6.15/Documentation/devicetree/bindings/spi/ |
D | qcom,spi-qpic-snand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Md sadre Alam <quic_mdalam@quicinc.com> 13 The QCOM QPIC-SPI-NAND flash controller is an extended version of 15 and parallel mode. It supports typical SPI-NAND page cache 20 - $ref: /schemas/spi/spi-controller.yaml# 25 - qcom,ipq9574-snand 33 clock-names: [all …]
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/linux-6.15/Documentation/devicetree/bindings/pci/ |
D | qcom,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 [all …]
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/linux-6.15/Documentation/devicetree/bindings/crypto/ |
D | qcom-qce.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Konrad Dybcio <konradybcio@kernel.org> 20 - const: qcom,crypto-v5.1 24 - const: qcom,crypto-v5.4 28 - items: 29 - enum: [all …]
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/linux-6.15/drivers/clk/qcom/ |
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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D | ipq-cmn-pll.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * CMN PLL block expects the reference clock from on-board Wi-Fi block, 9 * blocks and to GCC. The networking related blocks include PPE (packet 13 * On the IPQ9574 SoC, there are three clocks with 50 MHZ and one clock 16 * are supplied to GCC (24 MHZ as XO and 32 KHZ as sleep clock), and to PCS 19 * +---------+ 20 * | GCC | 21 * +--+---+--+ 24 * +-------+---+------+ 25 * | +-------------> eth0-50mhz [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 206 CMN PLL consumes the AHB/SYS clocks from GCC and supplies 207 the output clocks to the networking hardware and GCC blocks. 277 tristate "IPQ9574 Global Clock Controller" 279 Support for global clock controller on ipq9574 devices. 282 of ipq9574. 285 tristate "IPQ9574 NSS Clock Controller" 289 Support for NSS clock controller on ipq9574 devices. 1294 Say Y if you want to toggle LPASS-adjacent resets within 1393 tristate "High-Frequency PLL (HFPLL) Clock Controller" [all …]
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D | gcc-ipq9574.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 6 #include <linux/clk-provider.h> 7 #include <linux/interconnect-clk.h> 8 #include <linux/interconnect-provider.h> 15 #include <dt-bindings/clock/qcom,ipq9574-gcc.h> 16 #include <dt-bindings/reset/qcom,ipq9574-gcc.h> 17 #include <dt-bindings/interconnect/qcom,ipq9574.h> 19 #include "clk-alpha-pll.h" 20 #include "clk-branch.h" 21 #include "clk-rcg.h" [all …]
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/linux-6.15/Documentation/devicetree/bindings/usb/ |
D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 15 - enum: 16 - qcom,ipq4019-dwc3 17 - qcom,ipq5018-dwc3 18 - qcom,ipq5332-dwc3 19 - qcom,ipq5424-dwc3 20 - qcom,ipq6018-dwc3 [all …]
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/linux-6.15/Documentation/devicetree/bindings/nvmem/ |
D | qcom,qfprom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 - $ref: nvmem.yaml# 14 - $ref: nvmem-deprecated-cells.yaml# 19 - enum: 20 - qcom,apq8064-qfprom 21 - qcom,apq8084-qfprom 22 - qcom,ipq5018-qfprom [all …]
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/linux-6.15/Documentation/devicetree/bindings/mailbox/ |
D | qcom,apcs-kpss-global.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Jassi Brar <jassisinghbrar@gmail.com> 19 - items: 20 - enum: 21 - qcom,ipq5018-apcs-apps-global 22 - qcom,ipq5332-apcs-apps-global 23 - qcom,ipq5424-apcs-apps-global [all …]
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/linux-6.15/Documentation/devicetree/bindings/firmware/ |
D | qcom,scm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - Robert Marko <robimarko@gmail.com> 18 - Guru Das Srinagesh <quic_gurus@quicinc.com> 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-ipq4019 [all …]
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/linux-6.15/Documentation/devicetree/bindings/mmc/ |
D | sdhci-msm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDHCI controller (sdhci-msm) 10 - Bjorn Andersson <andersson@kernel.org> 11 - Konrad Dybcio <konradybcio@kernel.org> 20 - enum: 21 - qcom,sdhci-msm-v4 23 - items: [all …]
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/linux-6.15/drivers/phy/qualcomm/ |
D | phy-qcom-qmp-usb.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 22 #include "phy-qcom-qmp-common.h" 24 #include "phy-qcom-qmp.h" 25 #include "phy-qcom-qmp-pcs-misc-v3.h" 26 #include "phy-qcom-qmp-pcs-misc-v4.h" 27 #include "phy-qcom-qmp-pcs-usb-v4.h" 28 #include "phy-qcom-qmp-pcs-usb-v5.h" 29 #include "phy-qcom-qmp-pcs-usb-v6.h" 30 #include "phy-qcom-qmp-pcs-usb-v7.h" [all …]
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D | phy-qcom-qmp-pcie.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 25 #include <dt-bindings/phy/phy-qcom-qmp.h> 27 #include "phy-qcom-qmp-common.h" 29 #include "phy-qcom-qmp.h" 30 #include "phy-qcom-qmp-pcs-misc-v3.h" 31 #include "phy-qcom-qmp-pcs-pcie-v4.h" 32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h" 33 #include "phy-qcom-qmp-pcs-pcie-v5.h" 34 #include "phy-qcom-qmp-pcs-pcie-v5_20.h" [all …]
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