1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm crypto engine driver
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Konrad Dybcio <konradybcio@kernel.org>
12
13description:
14  This document defines the binding for the QCE crypto
15  controller found on Qualcomm parts.
16
17properties:
18  compatible:
19    oneOf:
20      - const: qcom,crypto-v5.1
21        deprecated: true
22        description: Kept only for ABI backward compatibility
23
24      - const: qcom,crypto-v5.4
25        deprecated: true
26        description: Kept only for ABI backward compatibility
27
28      - items:
29          - enum:
30              - qcom,ipq4019-qce
31              - qcom,sm8150-qce
32          - const: qcom,qce
33
34      - items:
35          - enum:
36              - qcom,ipq6018-qce
37              - qcom,ipq8074-qce
38              - qcom,ipq9574-qce
39              - qcom,msm8996-qce
40              - qcom,qcm2290-qce
41              - qcom,sdm845-qce
42              - qcom,sm6115-qce
43          - const: qcom,ipq4019-qce
44          - const: qcom,qce
45
46      - items:
47          - enum:
48              - qcom,qcs8300-qce
49              - qcom,sa8775p-qce
50              - qcom,sc7280-qce
51              - qcom,sm6350-qce
52              - qcom,sm8250-qce
53              - qcom,sm8350-qce
54              - qcom,sm8450-qce
55              - qcom,sm8550-qce
56              - qcom,sm8650-qce
57              - qcom,sm8750-qce
58              - qcom,x1e80100-qce
59          - const: qcom,sm8150-qce
60          - const: qcom,qce
61
62  reg:
63    maxItems: 1
64
65  clocks:
66    minItems: 1
67    maxItems: 3
68
69  clock-names:
70    minItems: 1
71    maxItems: 3
72
73  iommus:
74    minItems: 1
75    maxItems: 8
76    description:
77      phandle to apps_smmu node with sid mask.
78
79  interconnects:
80    maxItems: 1
81    description:
82      Interconnect path between qce crypto and main memory.
83
84  interconnect-names:
85    const: memory
86
87  dmas:
88    items:
89      - description: DMA specifiers for rx dma channel.
90      - description: DMA specifiers for tx dma channel.
91
92  dma-names:
93    items:
94      - const: rx
95      - const: tx
96
97allOf:
98  - if:
99      properties:
100        compatible:
101          contains:
102            enum:
103              - qcom,crypto-v5.1
104              - qcom,crypto-v5.4
105              - qcom,ipq6018-qce
106              - qcom,ipq8074-qce
107              - qcom,ipq9574-qce
108              - qcom,msm8996-qce
109              - qcom,sdm845-qce
110    then:
111      properties:
112        clocks:
113          maxItems: 3
114        clock-names:
115          items:
116            - const: iface
117            - const: bus
118            - const: core
119      required:
120        - clocks
121        - clock-names
122
123  - if:
124      properties:
125        compatible:
126          contains:
127            enum:
128              - qcom,qcm2290-qce
129              - qcom,sm6115-qce
130    then:
131      properties:
132        clocks:
133          maxItems: 1
134        clock-names:
135          items:
136            - const: core
137      required:
138        - clocks
139        - clock-names
140
141  - if:
142      properties:
143        compatible:
144          contains:
145            enum:
146              - qcom,sm8150-qce
147    then:
148      properties:
149        clocks: false
150        clock-names: false
151
152required:
153  - compatible
154  - reg
155  - dmas
156  - dma-names
157
158additionalProperties: false
159
160examples:
161  - |
162    #include <dt-bindings/clock/qcom,gcc-apq8084.h>
163    crypto-engine@fd45a000 {
164        compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";
165        reg = <0xfd45a000 0x6000>;
166        clocks = <&gcc GCC_CE2_AHB_CLK>,
167                 <&gcc GCC_CE2_AXI_CLK>,
168                 <&gcc GCC_CE2_CLK>;
169        clock-names = "iface", "bus", "core";
170        dmas = <&cryptobam 2>, <&cryptobam 3>;
171        dma-names = "rx", "tx";
172        iommus = <&apps_smmu 0x584 0x0011>,
173                 <&apps_smmu 0x586 0x0011>,
174                 <&apps_smmu 0x594 0x0011>,
175                 <&apps_smmu 0x596 0x0011>;
176    };
177