1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 25 - qcom,pcie-ipq8064 26 - qcom,pcie-ipq8064-v2 27 - qcom,pcie-ipq8074 28 - qcom,pcie-ipq8074-gen3 29 - qcom,pcie-ipq9574 30 - qcom,pcie-msm8996 31 - qcom,pcie-qcs404 32 - qcom,pcie-sdm845 33 - qcom,pcie-sdx55 34 - items: 35 - enum: 36 - qcom,pcie-ipq5332 37 - qcom,pcie-ipq5424 38 - const: qcom,pcie-ipq9574 39 - items: 40 - const: qcom,pcie-msm8998 41 - const: qcom,pcie-msm8996 42 43 reg: 44 minItems: 4 45 maxItems: 6 46 47 reg-names: 48 minItems: 4 49 maxItems: 6 50 51 interrupts: 52 minItems: 1 53 maxItems: 9 54 55 interrupt-names: 56 minItems: 1 57 maxItems: 9 58 59 iommu-map: 60 minItems: 1 61 maxItems: 16 62 63 # Common definitions for clocks, clock-names and reset. 64 # Platform constraints are described later. 65 clocks: 66 minItems: 3 67 maxItems: 13 68 69 clock-names: 70 minItems: 3 71 maxItems: 13 72 73 dma-coherent: true 74 75 interconnects: 76 maxItems: 2 77 78 interconnect-names: 79 items: 80 - const: pcie-mem 81 - const: cpu-pcie 82 83 resets: 84 minItems: 1 85 maxItems: 12 86 87 reset-names: 88 minItems: 1 89 maxItems: 12 90 91 vdda-supply: 92 description: A phandle to the core analog power supply 93 94 vdda_phy-supply: 95 description: A phandle to the core analog power supply for PHY 96 97 vdda_refclk-supply: 98 description: A phandle to the core analog power supply for IC which generates reference clock 99 100 vddpe-3v3-supply: 101 description: A phandle to the PCIe endpoint power supply 102 103 phys: 104 maxItems: 1 105 106 phy-names: 107 items: 108 - const: pciephy 109 110 power-domains: 111 maxItems: 1 112 113 perst-gpios: 114 description: GPIO controlled connection to PERST# signal 115 maxItems: 1 116 117 required-opps: 118 maxItems: 1 119 120 wake-gpios: 121 description: GPIO controlled connection to WAKE# signal 122 maxItems: 1 123 124required: 125 - compatible 126 - reg 127 - reg-names 128 - interrupt-map-mask 129 - interrupt-map 130 - clocks 131 - clock-names 132 133anyOf: 134 - required: 135 - interrupts 136 - interrupt-names 137 - "#interrupt-cells" 138 - required: 139 - msi-map 140 141allOf: 142 - $ref: /schemas/pci/pci-host-bridge.yaml# 143 - if: 144 properties: 145 compatible: 146 contains: 147 enum: 148 - qcom,pcie-apq8064 149 - qcom,pcie-ipq4019 150 - qcom,pcie-ipq8064 151 - qcom,pcie-ipq8064v2 152 - qcom,pcie-ipq8074 153 - qcom,pcie-qcs404 154 then: 155 properties: 156 reg: 157 minItems: 4 158 maxItems: 4 159 reg-names: 160 items: 161 - const: dbi # DesignWare PCIe registers 162 - const: elbi # External local bus interface registers 163 - const: parf # Qualcomm specific registers 164 - const: config # PCIe configuration space 165 166 - if: 167 properties: 168 compatible: 169 contains: 170 enum: 171 - qcom,pcie-ipq6018 172 - qcom,pcie-ipq8074-gen3 173 - qcom,pcie-ipq9574 174 then: 175 properties: 176 reg: 177 minItems: 5 178 maxItems: 5 179 reg-names: 180 items: 181 - const: dbi # DesignWare PCIe registers 182 - const: elbi # External local bus interface registers 183 - const: atu # ATU address space 184 - const: parf # Qualcomm specific registers 185 - const: config # PCIe configuration space 186 187 - if: 188 properties: 189 compatible: 190 contains: 191 enum: 192 - qcom,pcie-apq8084 193 - qcom,pcie-msm8996 194 - qcom,pcie-sdm845 195 then: 196 properties: 197 reg: 198 minItems: 4 199 maxItems: 5 200 reg-names: 201 minItems: 4 202 items: 203 - const: parf # Qualcomm specific registers 204 - const: dbi # DesignWare PCIe registers 205 - const: elbi # External local bus interface registers 206 - const: config # PCIe configuration space 207 - const: mhi # MHI registers 208 209 - if: 210 properties: 211 compatible: 212 contains: 213 enum: 214 - qcom,pcie-sdx55 215 then: 216 properties: 217 reg: 218 minItems: 5 219 maxItems: 6 220 reg-names: 221 minItems: 5 222 items: 223 - const: parf # Qualcomm specific registers 224 - const: dbi # DesignWare PCIe registers 225 - const: elbi # External local bus interface registers 226 - const: atu # ATU address space 227 - const: config # PCIe configuration space 228 - const: mhi # MHI registers 229 230 - if: 231 properties: 232 compatible: 233 contains: 234 enum: 235 - qcom,pcie-apq8064 236 - qcom,pcie-ipq8064 237 - qcom,pcie-ipq8064v2 238 then: 239 properties: 240 clocks: 241 minItems: 3 242 maxItems: 5 243 clock-names: 244 minItems: 3 245 items: 246 - const: core # Clocks the pcie hw block 247 - const: iface # Configuration AHB clock 248 - const: phy # Clocks the pcie PHY block 249 - const: aux # Clocks the pcie AUX block, not on apq8064 250 - const: ref # Clocks the pcie ref block, not on apq8064 251 resets: 252 minItems: 5 253 maxItems: 6 254 reset-names: 255 minItems: 5 256 items: 257 - const: axi # AXI reset 258 - const: ahb # AHB reset 259 - const: por # POR reset 260 - const: pci # PCI reset 261 - const: phy # PHY reset 262 - const: ext # EXT reset, not on apq8064 263 required: 264 - vdda-supply 265 - vdda_phy-supply 266 - vdda_refclk-supply 267 268 - if: 269 properties: 270 compatible: 271 contains: 272 enum: 273 - qcom,pcie-apq8084 274 then: 275 properties: 276 clocks: 277 minItems: 4 278 maxItems: 4 279 clock-names: 280 items: 281 - const: iface # Configuration AHB clock 282 - const: master_bus # Master AXI clock 283 - const: slave_bus # Slave AXI clock 284 - const: aux # Auxiliary (AUX) clock 285 resets: 286 maxItems: 1 287 reset-names: 288 items: 289 - const: core # Core reset 290 291 - if: 292 properties: 293 compatible: 294 contains: 295 enum: 296 - qcom,pcie-ipq4019 297 then: 298 properties: 299 clocks: 300 minItems: 3 301 maxItems: 3 302 clock-names: 303 items: 304 - const: aux # Auxiliary (AUX) clock 305 - const: master_bus # Master AXI clock 306 - const: slave_bus # Slave AXI clock 307 resets: 308 minItems: 12 309 maxItems: 12 310 reset-names: 311 items: 312 - const: axi_m # AXI master reset 313 - const: axi_s # AXI slave reset 314 - const: pipe # PIPE reset 315 - const: axi_m_vmid # VMID reset 316 - const: axi_s_xpu # XPU reset 317 - const: parf # PARF reset 318 - const: phy # PHY reset 319 - const: axi_m_sticky # AXI sticky reset 320 - const: pipe_sticky # PIPE sticky reset 321 - const: pwr # PWR reset 322 - const: ahb # AHB reset 323 - const: phy_ahb # PHY AHB reset 324 325 - if: 326 properties: 327 compatible: 328 contains: 329 enum: 330 - qcom,pcie-msm8996 331 then: 332 properties: 333 clocks: 334 minItems: 5 335 maxItems: 5 336 clock-names: 337 items: 338 - const: pipe # Pipe Clock driving internal logic 339 - const: aux # Auxiliary (AUX) clock 340 - const: cfg # Configuration clock 341 - const: bus_master # Master AXI clock 342 - const: bus_slave # Slave AXI clock 343 resets: false 344 reset-names: false 345 346 - if: 347 properties: 348 compatible: 349 contains: 350 enum: 351 - qcom,pcie-ipq8074 352 then: 353 properties: 354 clocks: 355 minItems: 5 356 maxItems: 5 357 clock-names: 358 items: 359 - const: iface # PCIe to SysNOC BIU clock 360 - const: axi_m # AXI Master clock 361 - const: axi_s # AXI Slave clock 362 - const: ahb # AHB clock 363 - const: aux # Auxiliary clock 364 resets: 365 minItems: 7 366 maxItems: 7 367 reset-names: 368 items: 369 - const: pipe # PIPE reset 370 - const: sleep # Sleep reset 371 - const: sticky # Core Sticky reset 372 - const: axi_m # AXI Master reset 373 - const: axi_s # AXI Slave reset 374 - const: ahb # AHB Reset 375 - const: axi_m_sticky # AXI Master Sticky reset 376 377 - if: 378 properties: 379 compatible: 380 contains: 381 enum: 382 - qcom,pcie-ipq6018 383 - qcom,pcie-ipq8074-gen3 384 then: 385 properties: 386 clocks: 387 minItems: 5 388 maxItems: 5 389 clock-names: 390 items: 391 - const: iface # PCIe to SysNOC BIU clock 392 - const: axi_m # AXI Master clock 393 - const: axi_s # AXI Slave clock 394 - const: axi_bridge # AXI bridge clock 395 - const: rchng 396 resets: 397 minItems: 8 398 maxItems: 8 399 reset-names: 400 items: 401 - const: pipe # PIPE reset 402 - const: sleep # Sleep reset 403 - const: sticky # Core Sticky reset 404 - const: axi_m # AXI Master reset 405 - const: axi_s # AXI Slave reset 406 - const: ahb # AHB Reset 407 - const: axi_m_sticky # AXI Master Sticky reset 408 - const: axi_s_sticky # AXI Slave Sticky reset 409 410 - if: 411 properties: 412 compatible: 413 contains: 414 enum: 415 - qcom,pcie-ipq9574 416 then: 417 properties: 418 clocks: 419 minItems: 6 420 maxItems: 6 421 clock-names: 422 items: 423 - const: axi_m # AXI Master clock 424 - const: axi_s # AXI Slave clock 425 - const: axi_bridge 426 - const: rchng 427 - const: ahb 428 - const: aux 429 430 resets: 431 minItems: 8 432 maxItems: 8 433 reset-names: 434 items: 435 - const: pipe # PIPE reset 436 - const: sticky # Core Sticky reset 437 - const: axi_s_sticky # AXI Slave Sticky reset 438 - const: axi_s # AXI Slave reset 439 - const: axi_m_sticky # AXI Master Sticky reset 440 - const: axi_m # AXI Master reset 441 - const: aux # AUX Reset 442 - const: ahb # AHB Reset 443 444 interrupts: 445 minItems: 8 446 interrupt-names: 447 minItems: 8 448 items: 449 - const: msi0 450 - const: msi1 451 - const: msi2 452 - const: msi3 453 - const: msi4 454 - const: msi5 455 - const: msi6 456 - const: msi7 457 - const: global 458 459 - if: 460 properties: 461 compatible: 462 contains: 463 enum: 464 - qcom,pcie-qcs404 465 then: 466 properties: 467 clocks: 468 minItems: 4 469 maxItems: 4 470 clock-names: 471 items: 472 - const: iface # AHB clock 473 - const: aux # Auxiliary clock 474 - const: master_bus # AXI Master clock 475 - const: slave_bus # AXI Slave clock 476 resets: 477 minItems: 6 478 maxItems: 6 479 reset-names: 480 items: 481 - const: axi_m # AXI Master reset 482 - const: axi_s # AXI Slave reset 483 - const: axi_m_sticky # AXI Master Sticky reset 484 - const: pipe_sticky # PIPE sticky reset 485 - const: pwr # PWR reset 486 - const: ahb # AHB reset 487 488 - if: 489 properties: 490 compatible: 491 contains: 492 enum: 493 - qcom,pcie-sdm845 494 then: 495 oneOf: 496 # Unfortunately the "optional" ref clock is used in the middle of the list 497 - properties: 498 clocks: 499 minItems: 8 500 maxItems: 8 501 clock-names: 502 items: 503 - const: pipe # PIPE clock 504 - const: aux # Auxiliary clock 505 - const: cfg # Configuration clock 506 - const: bus_master # Master AXI clock 507 - const: bus_slave # Slave AXI clock 508 - const: slave_q2a # Slave Q2A clock 509 - const: ref # REFERENCE clock 510 - const: tbu # PCIe TBU clock 511 - properties: 512 clocks: 513 minItems: 7 514 maxItems: 7 515 clock-names: 516 items: 517 - const: pipe # PIPE clock 518 - const: aux # Auxiliary clock 519 - const: cfg # Configuration clock 520 - const: bus_master # Master AXI clock 521 - const: bus_slave # Slave AXI clock 522 - const: slave_q2a # Slave Q2A clock 523 - const: tbu # PCIe TBU clock 524 properties: 525 resets: 526 maxItems: 1 527 reset-names: 528 items: 529 - const: pci # PCIe core reset 530 531 - if: 532 properties: 533 compatible: 534 contains: 535 enum: 536 - qcom,pcie-sdx55 537 then: 538 properties: 539 clocks: 540 minItems: 7 541 maxItems: 7 542 clock-names: 543 items: 544 - const: pipe # PIPE clock 545 - const: aux # Auxiliary clock 546 - const: cfg # Configuration clock 547 - const: bus_master # Master AXI clock 548 - const: bus_slave # Slave AXI clock 549 - const: slave_q2a # Slave Q2A clock 550 - const: sleep # PCIe Sleep clock 551 resets: 552 maxItems: 1 553 reset-names: 554 items: 555 - const: pci # PCIe core reset 556 557 - if: 558 not: 559 properties: 560 compatible: 561 contains: 562 enum: 563 - qcom,pcie-apq8064 564 - qcom,pcie-ipq4019 565 - qcom,pcie-ipq8064 566 - qcom,pcie-ipq8064v2 567 - qcom,pcie-ipq8074 568 - qcom,pcie-ipq8074-gen3 569 - qcom,pcie-ipq9574 570 - qcom,pcie-qcs404 571 then: 572 required: 573 - power-domains 574 575 - if: 576 not: 577 properties: 578 compatible: 579 contains: 580 enum: 581 - qcom,pcie-msm8996 582 then: 583 required: 584 - resets 585 - reset-names 586 587 - if: 588 properties: 589 compatible: 590 contains: 591 enum: 592 - qcom,pcie-msm8996 593 - qcom,pcie-sdm845 594 then: 595 oneOf: 596 - properties: 597 interrupts: 598 maxItems: 1 599 interrupt-names: 600 items: 601 - const: msi 602 - properties: 603 interrupts: 604 minItems: 8 605 maxItems: 8 606 interrupt-names: 607 items: 608 - const: msi0 609 - const: msi1 610 - const: msi2 611 - const: msi3 612 - const: msi4 613 - const: msi5 614 - const: msi6 615 - const: msi7 616 617 - if: 618 properties: 619 compatible: 620 contains: 621 enum: 622 - qcom,pcie-apq8064 623 - qcom,pcie-apq8084 624 - qcom,pcie-ipq4019 625 - qcom,pcie-ipq6018 626 - qcom,pcie-ipq8064 627 - qcom,pcie-ipq8064-v2 628 - qcom,pcie-ipq8074 629 - qcom,pcie-ipq8074-gen3 630 - qcom,pcie-qcs404 631 then: 632 properties: 633 interrupts: 634 maxItems: 1 635 interrupt-names: 636 items: 637 - const: msi 638 639unevaluatedProperties: false 640 641examples: 642 - | 643 #include <dt-bindings/interrupt-controller/arm-gic.h> 644 pcie@1b500000 { 645 compatible = "qcom,pcie-ipq8064"; 646 reg = <0x1b500000 0x1000>, 647 <0x1b502000 0x80>, 648 <0x1b600000 0x100>, 649 <0x0ff00000 0x100000>; 650 reg-names = "dbi", "elbi", "parf", "config"; 651 device_type = "pci"; 652 linux,pci-domain = <0>; 653 bus-range = <0x00 0xff>; 654 num-lanes = <1>; 655 #address-cells = <3>; 656 #size-cells = <2>; 657 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 658 <0x82000000 0 0 0x08000000 0 0x07e00000>; 659 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 660 interrupt-names = "msi"; 661 #interrupt-cells = <1>; 662 interrupt-map-mask = <0 0 0 0x7>; 663 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 664 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 665 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 666 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 667 clocks = <&gcc 41>, 668 <&gcc 43>, 669 <&gcc 44>, 670 <&gcc 42>, 671 <&gcc 248>; 672 clock-names = "core", "iface", "phy", "aux", "ref"; 673 resets = <&gcc 27>, 674 <&gcc 26>, 675 <&gcc 25>, 676 <&gcc 24>, 677 <&gcc 23>, 678 <&gcc 22>; 679 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 680 pinctrl-0 = <&pcie_pins_default>; 681 pinctrl-names = "default"; 682 vdda-supply = <&pm8921_s3>; 683 vdda_phy-supply = <&pm8921_lvs6>; 684 vdda_refclk-supply = <&ext_3p3v>; 685 }; 686 - | 687 #include <dt-bindings/interrupt-controller/arm-gic.h> 688 #include <dt-bindings/gpio/gpio.h> 689 pcie@fc520000 { 690 compatible = "qcom,pcie-apq8084"; 691 reg = <0xfc520000 0x2000>, 692 <0xff000000 0x1000>, 693 <0xff001000 0x1000>, 694 <0xff002000 0x2000>; 695 reg-names = "parf", "dbi", "elbi", "config"; 696 device_type = "pci"; 697 linux,pci-domain = <0>; 698 bus-range = <0x00 0xff>; 699 num-lanes = <1>; 700 #address-cells = <3>; 701 #size-cells = <2>; 702 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 703 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 704 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 705 interrupt-names = "msi"; 706 #interrupt-cells = <1>; 707 interrupt-map-mask = <0 0 0 0x7>; 708 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 709 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 710 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 711 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 712 clocks = <&gcc 324>, 713 <&gcc 325>, 714 <&gcc 327>, 715 <&gcc 323>; 716 clock-names = "iface", "master_bus", "slave_bus", "aux"; 717 resets = <&gcc 81>; 718 reset-names = "core"; 719 power-domains = <&gcc 1>; 720 vdda-supply = <&pma8084_l3>; 721 phys = <&pciephy0>; 722 phy-names = "pciephy"; 723 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 724 pinctrl-0 = <&pcie0_pins_default>; 725 pinctrl-names = "default"; 726 }; 727... 728