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/linux-5.10/Documentation/devicetree/bindings/crypto/
Dst,stm32-hash.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lionel Debieve <lionel.debieve@st.com>
15 - st,stm32f456-hash
16 - st,stm32f756-hash
33 dma-names:
35 - const: in
37 dma-maxburst:
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/linux-5.10/drivers/dma/
Dzx_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
22 #include "virt-dma.h"
24 #define DRIVER_NAME "zx-dma"
26 #define DMA_MAX_SIZE (0x10000 - 512)
142 val = readl_relaxed(phy->base + REG_ZX_CTRL); in zx_dma_terminate_chan()
145 writel_relaxed(val, phy->base + REG_ZX_CTRL); in zx_dma_terminate_chan()
147 val = 0x1 << phy->idx; in zx_dma_terminate_chan()
148 writel_relaxed(val, d->base + REG_ZX_TC_IRQ_RAW); in zx_dma_terminate_chan()
149 writel_relaxed(val, d->base + REG_ZX_SRC_ERR_IRQ_RAW); in zx_dma_terminate_chan()
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Duniphier-xdmac.c1 // SPDX-License-Identifier: GPL-2.0
3 * External DMA controller driver for UniPhier SoCs
18 #include "virt-dma.h"
115 /* xc->vc.lock must be held by caller */
121 vd = vchan_next_desc(&xc->vc); in uniphier_xdmac_next_desc()
125 list_del(&vd->node); in uniphier_xdmac_next_desc()
130 /* xc->vc.lock must be held by caller */
139 src_addr = xd->nodes[xd->cur_node].src; in uniphier_xdmac_chan_start()
140 dst_addr = xd->nodes[xd->cur_node].dst; in uniphier_xdmac_chan_start()
141 its = xd->nodes[xd->cur_node].burst_size; in uniphier_xdmac_chan_start()
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Didma64.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Core driver for the Intel integrated DMA 64-bit
12 #include <linux/dma-mapping.h>
19 #include <linux/dma/idma64.h>
26 /* ---------------------------------------------------------------------- */
30 return &chan->dev->device; in chan2dev()
33 /* ---------------------------------------------------------------------- */
41 channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask); in idma64_off()
42 channel_clear_bit(idma64, MASK(BLOCK), idma64->all_chan_mask); in idma64_off()
43 channel_clear_bit(idma64, MASK(SRC_TRAN), idma64->all_chan_mask); in idma64_off()
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Dat_hdmac_regs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Header file for the Atmel AHB DMA Controller driver
10 #include <linux/platform_data/dma-atmel.h>
16 #define AT_DMA_IF_BIGEND(i) (0x1 << (i)) /* AHB-Lite Interface i in Big-endian mode */
81 #define ATC_DSCR_IF(i) (0x3 & (i)) /* Dsc feched via AHB-Lite Interface i */
120 #define ATC_SIF(i) (0x3 & (i)) /* Src tx done via AHB-Lite Interface i */
121 #define ATC_DIF(i) ((0x3 & (i)) << 4) /* Dst tx done via AHB-Lite Interface i */
126 #define ATC_SRC_PIP (0x1 << 8) /* Source Picture-in-Picture enabled */
127 #define ATC_DST_PIP (0x1 << 12) /* Destination Picture-in-Picture enabled */
131 #define ATC_FC_MEM2MEM (0x0 << 21) /* Mem-to-Mem (DMA) */
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Dpxa_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
22 #include <linux/dma/pxa-dma.h>
25 #include "virt-dma.h"
36 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
38 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
39 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
64 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
71 #define PXA_DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
74 #define PDMA_MAX_DESC_BYTES (PXA_DCMD_LENGTH & ~((1 << PDMA_ALIGNMENT) - 1))
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Dk3dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013 - 2015 Linaro Ltd.
8 #include <linux/dma-mapping.h>
23 #include "virt-dma.h"
25 #define DRIVER_NAME "k3-dma"
139 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
141 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
143 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
145 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
155 val = 0x1 << phy->idx; in k3_dma_terminate_chan()
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Dmmp_pdma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
21 #include <linux/dma/mmp-pdma.h>
34 #define DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
36 #define DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
37 #define DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
63 #define DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
70 #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
147 u32 reg = (phy->idx << 4) + DDADR; in set_desc()
149 writel(addr, phy->base + reg); in set_desc()
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Dsa11x0-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Derived in part from arch/arm/mach-sa1100/dma.c,
20 #include "virt-dma.h"
89 /* protected by c->vc.lock */
93 /* protected by d->lock */
107 /* Protected by c->vc.lock */
138 struct virt_dma_desc *vd = vchan_next_desc(&c->vc); in sa11x0_dma_next_desc()
150 list_del(&txd->vd.node); in sa11x0_dma_start_desc()
151 p->txd_load = txd; in sa11x0_dma_start_desc()
152 p->sg_load = 0; in sa11x0_dma_start_desc()
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Dcoh901318.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * driver/dma/coh901318.c
5 * Copyright (C) 2007-2009 ST-Ericsson
6 * DMA driver for COH 901 318
24 #include <linux/platform_data/dma-coh901318.h>
32 /* INT_STATUS - Interrupt Status Registers 32bit (R/-) */
35 /* TC_INT_STATUS - Terminal Count Interrupt Status Registers 32bit (R/-) */
38 /* TC_INT_CLEAR - Terminal Count Interrupt Clear Registers 32bit (-/W) */
41 /* RAW_TC_INT_STATUS - Raw Term Count Interrupt Status Registers 32bit (R/-) */
44 /* BE_INT_STATUS - Bus Error Interrupt Status Registers 32bit (R/-) */
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Ddma-jz4780.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4780 DMA controller
6 * Author: Alex Smith <alex@alex-smith.me.uk>
21 #include "virt-dma.h"
37 /* Per-channel registers. */
98 * struct jz4780_dma_hwdesc - descriptor structure read by the DMA controller.
178 return container_of(jzchan->vchan.chan.device, struct jz4780_dma_dev, in jz4780_dma_chan_parent()
185 return readl(jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn)); in jz4780_dma_chn_readl()
191 writel(val, jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn)); in jz4780_dma_chn_writel()
197 return readl(jzdma->ctrl_base + reg); in jz4780_dma_ctrl_readl()
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/linux-5.10/sound/soc/pxa/
Dpxa2xx-ac97.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
15 #include <linux/dma/pxa-dma.h>
21 #include <sound/pxa2xx-lib.h>
25 #include <mach/regs-ac97.h>
65 .maxburst = 32,
72 .maxburst = 32,
79 .maxburst = 16,
86 .maxburst = 16,
93 .maxburst = 16,
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Dpxa2xx-i2s.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pxa2xx-i2s.c -- ALSA Soc Audio Layer
21 #include <sound/pxa2xx-lib.h>
27 #include "pxa2xx-i2s.h"
33 #define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */
34 #define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Reg…
40 #define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */
41 #define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */
85 .maxburst = 32,
92 .maxburst = 32,
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/linux-5.10/sound/soc/fsl/
Dfsl_asrc_dma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale ASRC ALSA SoC Platform (DMA) driver
9 #include <linux/dma-mapping.h>
11 #include <linux/platform_data/dma-imx.h>
37 chan->private = param; in filter()
45 struct snd_pcm_runtime *runtime = substream->runtime; in fsl_asrc_dma_complete()
46 struct fsl_asrc_pair *pair = runtime->private_data; in fsl_asrc_dma_complete()
48 pair->pos += snd_pcm_lib_period_bytes(substream); in fsl_asrc_dma_complete()
49 if (pair->pos >= snd_pcm_lib_buffer_bytes(substream)) in fsl_asrc_dma_complete()
50 pair->pos = 0; in fsl_asrc_dma_complete()
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/linux-5.10/include/sound/
Ddmaengine_pcm.h1 /* SPDX-License-Identifier: GPL-2.0+
4 * Author: Lars-Peter Clausen <lars@metafoo.de>
15 * snd_pcm_substream_to_dma_direction - Get dma_transfer_direction for a PCM
22 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in snd_pcm_substream_to_dma_direction()
47 * The DAI supports packed transfers, eg 2 16-bit samples in a 32-bit word.
49 * the supported sample formats and set the DMA transfer size to undefined.
57 * struct snd_dmaengine_dai_dma_data - DAI DMA configuration data
60 * @maxburst: Maximum number of words(note: words, as in units of the
63 * @slave_id: Slave requester id for the DMA channel.
64 * @filter_data: Custom DMA channel filter data, this will usually be used when
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/linux-5.10/drivers/usb/gadget/udc/
Dmv_u3d_core.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/dma-mapping.h>
56 ep = &u3d->eps[i]; in mv_u3d_ep0_reset()
57 ep->u3d = u3d; in mv_u3d_ep0_reset()
60 ep->ep_context = &u3d->ep_context[1]; in mv_u3d_ep0_reset()
65 epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
67 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
70 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
77 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr1); in mv_u3d_ep0_reset()
80 epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxincr0); in mv_u3d_ep0_reset()
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Dtrace.h1 // SPDX-License-Identifier: GPL-2.0
3 * udc.c - Core UDC Framework
45 __entry->speed = g->speed;
46 __entry->max_speed = g->max_speed;
47 __entry->state = g->state;
48 __entry->mA = g->mA;
49 __entry->sg_supported = g->sg_supported;
50 __entry->is_otg = g->is_otg;
51 __entry->is_a_peripheral = g->is_a_peripheral;
52 __entry->b_hnp_enable = g->b_hnp_enable;
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/linux-5.10/drivers/usb/cdns3/
Dtrace.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2018-2019 Cadence.
31 __string(name, ep_priv->name)
36 __assign_str(name, ep_priv->name);
37 __entry->halt = halt;
38 __entry->flush = flush;
40 TP_printk("Halt %s for %s: %s", __entry->flush ? " and flush" : "",
41 __get_str(name), __entry->halt ? "set" : "cleared")
48 __string(ep_name, ep_priv->name)
52 __assign_str(ep_name, ep_priv->name);
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/linux-5.10/drivers/spi/
Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
173 * use PIO for small transfers, avoiding DMA setup/teardown overhead for drivers
179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
193 * @dma_rx_en: SPI DMA RX enable register end SPI DMA RX enable bit
194 * @dma_tx_en: SPI DMA TX enable register end SPI DMA TX enable bit
217 * struct stm32_spi_cfg - stm32 compatible configuration data
229 * @can_dma: routine to determine if the transfer is eligible for DMA use
231 * using DMA
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/linux-5.10/drivers/usb/mtu3/
Dmtu3_trace.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3_trace.h - trace support
32 vsnprintf(__get_str(msg), MTU3_MSG_MAX, vaf->fmt, *vaf->va);
44 __entry->intr = intr;
46 TP_printk("(%08x) %s %s %s %s %s %s", __entry->intr,
47 __entry->intr & HOT_RST_INTR ? "HOT_RST" : "",
48 __entry->intr & WARM_RST_INTR ? "WARM_RST" : "",
49 __entry->intr & ENTER_U3_INTR ? "ENT_U3" : "",
50 __entry->intr & EXIT_U3_INTR ? "EXIT_U3" : "",
51 __entry->intr & VBUS_RISE_INTR ? "VBUS_RISE" : "",
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/linux-5.10/sound/core/
Dpcm_dmaengine.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 * imx-pcm-dma-mx2.c, Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
8 * mxs-pcm.c, Copyright (C) 2011 Freescale Semiconductor, Inc.
9 * ep93xx-pcm.c, Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
32 return substream->runtime->private_data; in substream_to_prtd()
39 return prtd->dma_chan; in snd_dmaengine_pcm_get_chan()
44 * snd_hwparams_to_dma_slave_config - Convert hw_params to dma_slave_config
47 * @slave_config: DMA slave config
61 return -EINVAL; in snd_hwparams_to_dma_slave_config()
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/linux-5.10/drivers/staging/ralink-gdma/
Dralink-gdma.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013, Lars-Peter Clausen <lars@metafoo.de>
8 #include <linux/dma-mapping.h>
21 #include "virt-dma.h"
141 return container_of(chan->vchan.chan.device, struct gdma_dma_dev, in gdma_dma_chan_get_dev()
158 return readl(dma_dev->base + reg); in gdma_dma_read()
164 writel(val, dma_dev->base + reg); in gdma_dma_write()
167 static enum gdma_dma_transfer_size gdma_dma_maxburst(u32 maxburst) in gdma_dma_maxburst() argument
169 if (maxburst < 2) in gdma_dma_maxburst()
171 else if (maxburst < 4) in gdma_dma_maxburst()
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/linux-5.10/drivers/crypto/
Datmel-aes.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (c) 2012 Eukréa Electromatique - ATMEL
10 * Some ideas are from omap-aes.c driver.
30 #include <linux/dma-mapping.h>
41 #include "atmel-aes-regs.h"
42 #include "atmel-authenc.h"
263 snprintf(tmp, sz, "KEYWR[%u]", (offset - AES_KEYWR(0)) >> 2); in atmel_aes_reg_name()
270 snprintf(tmp, sz, "IDATAR[%u]", (offset - AES_IDATAR(0)) >> 2); in atmel_aes_reg_name()
277 snprintf(tmp, sz, "ODATAR[%u]", (offset - AES_ODATAR(0)) >> 2); in atmel_aes_reg_name()
284 snprintf(tmp, sz, "IVR[%u]", (offset - AES_IVR(0)) >> 2); in atmel_aes_reg_name()
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/linux-5.10/arch/powerpc/platforms/512x/
Dmpc512x_lpbfifo.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2013-2015 Alexander Popov <alex.popov@linux.com>.
21 #include <linux/dma-direction.h>
22 #include <linux/dma-mapping.h>
55 * automatically disables LPBFIFO reading request to the DMA controller
61 * mpc512x_lpbfifo_irq - IRQ handler for LPB FIFO
76 if (!req || req->dir == MPC512X_LPBFIFO_REQ_DIR_READ) { in mpc512x_lpbfifo_irq()
81 status = in_be32(&lpbfifo.regs->status); in mpc512x_lpbfifo_irq()
83 dev_err(dev, "DMA transfer from RAM to peripheral failed\n"); in mpc512x_lpbfifo_irq()
84 out_be32(&lpbfifo.regs->enable, in mpc512x_lpbfifo_irq()
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/linux-5.10/sound/soc/adi/
Daxi-i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013, Analog Devices Inc.
4 * Author: Lars-Peter Clausen <lars@metafoo.de>
63 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in axi_i2s_trigger()
80 return -EINVAL; in axi_i2s_trigger()
83 regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val); in axi_i2s_trigger()
97 word_size = AXI_I2S_BITS_PER_FRAME / 2 - 1; in axi_i2s_hw_params()
98 bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1; in axi_i2s_hw_params()
100 regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) | in axi_i2s_hw_params()
113 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in axi_i2s_startup()
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