Lines Matching +full:dma +full:- +full:maxburst
1 // SPDX-License-Identifier: GPL-2.0-only
3 * driver/dma/coh901318.c
5 * Copyright (C) 2007-2009 ST-Ericsson
6 * DMA driver for COH 901 318
24 #include <linux/platform_data/dma-coh901318.h>
32 /* INT_STATUS - Interrupt Status Registers 32bit (R/-) */
35 /* TC_INT_STATUS - Terminal Count Interrupt Status Registers 32bit (R/-) */
38 /* TC_INT_CLEAR - Terminal Count Interrupt Clear Registers 32bit (-/W) */
41 /* RAW_TC_INT_STATUS - Raw Term Count Interrupt Status Registers 32bit (R/-) */
44 /* BE_INT_STATUS - Bus Error Interrupt Status Registers 32bit (R/-) */
47 /* BE_INT_CLEAR - Bus Error Interrupt Clear Registers 32bit (-/W) */
50 /* RAW_BE_INT_STATUS - Raw Term Count Interrupt Status Registers 32bit (R/-) */
55 * CX_CFG - Channel Configuration Registers 32bit (R/W)
59 /* Channel enable activates tha dma job */
81 * CX_STAT - Channel Status Registers 32bit (R/-)
91 * CX_CTRL - Channel Control Registers 32bit (R/W)
98 /* Transfer Count Value 0 - 4095 */
143 /* DMA mode */
154 * CX_SRC_ADDR - Channel Source Address Registers 32bit (R/W)
160 * CX_DST_ADDR - Channel Destination Address Registers 32bit R/W
166 * CX_LNK_ADDR - Channel Link Address Registers 32bit (R/W)
173 * struct coh901318_params - parameters for DMAC configuration
174 * @config: DMA config register
175 * @ctrl_lli_last: DMA control register for the last lli in the list
176 * @ctrl_lli: DMA control register for an lli
177 * @ctrl_lli_chained: DMA control register for a chained lli
187 * struct coh_dma_channel - dma channel base
188 * @name: ascii name of dma channel
203 * struct powersave - DMA power save structure
205 * @started_channels: bit mask indicating active dma channels
212 /* points out all dma slave channels.
213 * Syntax is [A1, B1, A2, B2, .... ,-1,-1]
214 * Select all channels from A to B, end of list is marked with -1,-1
218 U300_DMA_UART1_TX, U300_DMA_UART1_RX, -1, -1};
220 /* points out all dma memcpy channels. */
222 U300_DMA_GENERAL_PURPOSE_0, U300_DMA_GENERAL_PURPOSE_8, -1, -1};
744 * or dst bus for this peripheral - handled by PrimeCell
745 * DMA extension.
793 * or dst bus for this peripheral - handled by PrimeCell
794 * DMA extension.
1088 * or dst bus for this peripheral - handled by PrimeCell
1089 * DMA extension.
1260 #define COHC_2_DEV(cohc) (&cohc->chan.dev->device)
1325 i, l, l->control, &l->src_addr, &l->dst_addr, in coh901318_list_print()
1326 &l->link_addr, l->virt_link_addr); in coh901318_list_print()
1328 l = l->virt_link_addr; in coh901318_list_print()
1342 u64 started_channels = debugfs_dma_base->pm.started_channels; in coh901318_debugfs_read()
1343 int pool_count = debugfs_dma_base->pool.debugfs_pool_counter; in coh901318_debugfs_read()
1351 return -ENOMEM; in coh901318_debugfs_read()
1354 tmp += sprintf(tmp, "DMA -- enabled dma channels\n"); in coh901318_debugfs_read()
1364 tmp - dev_buf); in coh901318_debugfs_read()
1379 dma_dentry = debugfs_create_dir("dma", NULL); in init_coh901318_debugfs()
1411 return &chan_config[cohc->id].param; in cohc_chan_param()
1417 return &chan_config[cohc->id]; in cohc_chan_conf()
1423 struct powersave *pm = &cohc->base->pm; in enable_powersave()
1425 spin_lock_irqsave(&pm->lock, flags); in enable_powersave()
1427 pm->started_channels &= ~(1ULL << cohc->id); in enable_powersave()
1429 spin_unlock_irqrestore(&pm->lock, flags); in enable_powersave()
1434 struct powersave *pm = &cohc->base->pm; in disable_powersave()
1436 spin_lock_irqsave(&pm->lock, flags); in disable_powersave()
1438 pm->started_channels |= (1ULL << cohc->id); in disable_powersave()
1440 spin_unlock_irqrestore(&pm->lock, flags); in disable_powersave()
1445 int channel = cohc->id; in coh901318_set_ctrl()
1446 void __iomem *virtbase = cohc->base->virtbase; in coh901318_set_ctrl()
1456 int channel = cohc->id; in coh901318_set_conf()
1457 void __iomem *virtbase = cohc->base->virtbase; in coh901318_set_conf()
1469 int channel = cohc->id; in coh901318_start()
1470 void __iomem *virtbase = cohc->base->virtbase; in coh901318_start()
1488 int channel = cohc->id; in coh901318_prep_linked_list()
1489 void __iomem *virtbase = cohc->base->virtbase; in coh901318_prep_linked_list()
1495 writel(lli->src_addr, in coh901318_prep_linked_list()
1499 writel(lli->dst_addr, virtbase + in coh901318_prep_linked_list()
1503 writel(lli->link_addr, virtbase + COH901318_CX_LNK_ADDR + in coh901318_prep_linked_list()
1506 writel(lli->control, virtbase + COH901318_CX_CTRL + in coh901318_prep_linked_list()
1517 if (list_empty(&cohc->free)) { in coh901318_desc_get()
1525 INIT_LIST_HEAD(&desc->node); in coh901318_desc_get()
1526 dma_async_tx_descriptor_init(&desc->desc, &cohc->chan); in coh901318_desc_get()
1529 desc = list_first_entry(&cohc->free, in coh901318_desc_get()
1532 list_del(&desc->node); in coh901318_desc_get()
1534 desc->sg = NULL; in coh901318_desc_get()
1535 desc->sg_len = 0; in coh901318_desc_get()
1536 desc->desc.callback = NULL; in coh901318_desc_get()
1537 desc->desc.callback_param = NULL; in coh901318_desc_get()
1547 list_add_tail(&cohd->node, &cohc->free); in coh901318_desc_free()
1554 list_add_tail(&desc->node, &cohc->active); in coh901318_desc_submit()
1560 return list_first_entry_or_null(&cohc->active, struct coh901318_desc, in coh901318_first_active_get()
1567 list_del(&cohd->node); in coh901318_desc_remove()
1573 list_add_tail(&desc->node, &cohc->queue); in coh901318_desc_queue()
1579 return list_first_entry_or_null(&cohc->queue, struct coh901318_desc, in coh901318_first_queued()
1589 bytes += lli->control & COH901318_CX_CTRL_TC_VALUE_MASK; in coh901318_get_bytes_in_lli()
1590 lli = lli->virt_link_addr; in coh901318_get_bytes_in_lli()
1610 spin_lock_irqsave(&cohc->lock, flags); in coh901318_get_bytes_left()
1617 list_for_each(pos, &cohc->active) { in coh901318_get_bytes_left()
1631 left = readl(cohc->base->virtbase + in coh901318_get_bytes_left()
1633 COH901318_CX_CTRL_SPACING * cohc->id) & in coh901318_get_bytes_left()
1637 ladd = readl(cohc->base->virtbase + in coh901318_get_bytes_left()
1640 cohc->id) & in coh901318_get_bytes_left()
1650 lli = cohd->lli; in coh901318_get_bytes_left()
1651 while (lli && lli->link_addr != ladd) in coh901318_get_bytes_left()
1652 lli = lli->virt_link_addr; in coh901318_get_bytes_left()
1655 lli = lli->virt_link_addr; in coh901318_get_bytes_left()
1663 left += coh901318_get_bytes_in_lli(cohd->lli); in coh901318_get_bytes_left()
1669 list_for_each(pos, &cohc->queue) { in coh901318_get_bytes_left()
1671 left += coh901318_get_bytes_in_lli(cohd->lli); in coh901318_get_bytes_left()
1674 spin_unlock_irqrestore(&cohc->lock, flags); in coh901318_get_bytes_left()
1688 int channel = cohc->id; in coh901318_pause()
1689 void __iomem *virtbase = cohc->base->virtbase; in coh901318_pause()
1691 spin_lock_irqsave(&cohc->lock, flags); in coh901318_pause()
1700 cohc->stopped = 1; in coh901318_pause()
1710 /* Spin-wait for it to actually go inactive */ in coh901318_pause()
1718 cohc->stopped = 1; in coh901318_pause()
1722 spin_unlock_irqrestore(&cohc->lock, flags); in coh901318_pause()
1734 int channel = cohc->id; in coh901318_resume()
1736 spin_lock_irqsave(&cohc->lock, flags); in coh901318_resume()
1740 if (cohc->stopped) { in coh901318_resume()
1742 val = readl(cohc->base->virtbase + COH901318_CX_CFG + in coh901318_resume()
1747 writel(val, cohc->base->virtbase + COH901318_CX_CFG + in coh901318_resume()
1750 cohc->stopped = 0; in coh901318_resume()
1753 spin_unlock_irqrestore(&cohc->lock, flags); in coh901318_resume()
1761 if (ch_nr == to_coh901318_chan(chan)->id) in coh901318_filter_id()
1777 if (&args->base->dma_slave == chan->device && in coh901318_filter_base_and_id()
1778 args->ch_nr == to_coh901318_chan(chan)->id) in coh901318_filter_base_and_id()
1788 .base = ofdma->of_dma_data, in coh901318_xlate()
1789 .ch_nr = dma_spec->args[0], in coh901318_xlate()
1798 * DMA channel allocation
1804 int channel = cohc->id; in coh901318_config()
1805 void __iomem *virtbase = cohc->base->virtbase; in coh901318_config()
1817 writel(1 << (channel - 32), virtbase + in coh901318_config()
1819 writel(1 << (channel - 32), virtbase + in coh901318_config()
1823 coh901318_set_conf(cohc, p->config); in coh901318_config()
1824 coh901318_set_ctrl(cohc, p->ctrl_lli_last); in coh901318_config()
1849 /* initiate DMA job */ in coh901318_queue_start()
1850 cohc->busy = 1; in coh901318_queue_start()
1855 coh901318_set_conf(cohc, cohd->head_config); in coh901318_queue_start()
1856 coh901318_set_ctrl(cohc, cohd->head_ctrl); in coh901318_queue_start()
1857 coh901318_prep_linked_list(cohc, cohd->lli); in coh901318_queue_start()
1859 /* start dma job on this channel */ in coh901318_queue_start()
1869 * handle each descriptor (DMA job) that is sent to a channel.
1880 cohc->id, cohc->nbr_active_done); in dma_tasklet()
1882 spin_lock_irqsave(&cohc->lock, flags); in dma_tasklet()
1891 dmaengine_desc_get_callback(&cohd_fin->desc, &cb); in dma_tasklet()
1894 dma_cookie_complete(&cohd_fin->desc); in dma_tasklet()
1897 coh901318_lli_free(&cohc->base->pool, &cohd_fin->lli); in dma_tasklet()
1899 /* return desc to free-list */ in dma_tasklet()
1903 spin_unlock_irqrestore(&cohc->lock, flags); in dma_tasklet()
1908 spin_lock_irqsave(&cohc->lock, flags); in dma_tasklet()
1917 cohc->nbr_active_done--; in dma_tasklet()
1918 if (cohc->nbr_active_done) { in dma_tasklet()
1921 if (cohc_chan_conf(cohc)->priority_high) in dma_tasklet()
1922 tasklet_hi_schedule(&cohc->tasklet); in dma_tasklet()
1924 tasklet_schedule(&cohc->tasklet); in dma_tasklet()
1927 spin_unlock_irqrestore(&cohc->lock, flags); in dma_tasklet()
1932 spin_unlock_irqrestore(&cohc->lock, flags); in dma_tasklet()
1933 dev_err(COHC_2_DEV(cohc), "[%s] No active dma desc\n", __func__); in dma_tasklet()
1944 if (!cohc->allocated) { in dma_tc_handle()
1952 * should have been moved over from cohc->queue to in dma_tc_handle()
1953 * cohc->active and run to completion, that is why we're in dma_tc_handle()
1959 BUG_ON(list_empty(&cohc->active)); in dma_tc_handle()
1961 cohc->nbr_active_done++; in dma_tc_handle()
1964 * This attempt to take a job from cohc->queue, put it in dma_tc_handle()
1965 * into cohc->active and start it. in dma_tc_handle()
1968 cohc->busy = 0; in dma_tc_handle()
1971 * This tasklet will remove items from cohc->active in dma_tc_handle()
1974 if (cohc_chan_conf(cohc)->priority_high) in dma_tc_handle()
1975 tasklet_hi_schedule(&cohc->tasklet); in dma_tc_handle()
1977 tasklet_schedule(&cohc->tasklet); in dma_tc_handle()
1989 void __iomem *virtbase = base->virtbase; in dma_irq_handler()
1995 dev_warn(base->dev, "spurious DMA IRQ from no channel!\n"); in dma_irq_handler()
2002 /* Check the first 32 DMA channels for IRQ */ in dma_irq_handler()
2005 i = ffs(status1) - 1; in dma_irq_handler()
2008 cohc = &base->chans[ch]; in dma_irq_handler()
2009 spin_lock(&cohc->lock); in dma_irq_handler()
2016 "DMA bus error on channel %d!\n", ch); in dma_irq_handler()
2039 * in case tc_handle initiate a new dma job in dma_irq_handler()
2046 spin_unlock(&cohc->lock); in dma_irq_handler()
2049 /* Check the remaining 32 DMA channels for IRQ */ in dma_irq_handler()
2052 i = ffs(status2) - 1; in dma_irq_handler()
2054 cohc = &base->chans[ch]; in dma_irq_handler()
2055 spin_lock(&cohc->lock); in dma_irq_handler()
2062 "DMA bus error on channel %d!\n", ch); in dma_irq_handler()
2084 * in case tc_handle initiate a new dma job in dma_irq_handler()
2091 spin_unlock(&cohc->lock); in dma_irq_handler()
2102 void __iomem *virtbase = cohc->base->virtbase; in coh901318_terminate_all()
2106 spin_lock_irqsave(&cohc->lock, flags); in coh901318_terminate_all()
2109 if (cohc->id < 32) { in coh901318_terminate_all()
2110 writel(1 << cohc->id, virtbase + COH901318_BE_INT_CLEAR1); in coh901318_terminate_all()
2111 writel(1 << cohc->id, virtbase + COH901318_TC_INT_CLEAR1); in coh901318_terminate_all()
2113 writel(1 << (cohc->id - 32), virtbase + in coh901318_terminate_all()
2115 writel(1 << (cohc->id - 32), virtbase + in coh901318_terminate_all()
2123 coh901318_lli_free(&cohc->base->pool, &cohd->lli); in coh901318_terminate_all()
2125 /* return desc to free-list */ in coh901318_terminate_all()
2132 coh901318_lli_free(&cohc->base->pool, &cohd->lli); in coh901318_terminate_all()
2134 /* return desc to free-list */ in coh901318_terminate_all()
2140 cohc->nbr_active_done = 0; in coh901318_terminate_all()
2141 cohc->busy = 0; in coh901318_terminate_all()
2143 spin_unlock_irqrestore(&cohc->lock, flags); in coh901318_terminate_all()
2153 dev_vdbg(COHC_2_DEV(cohc), "[%s] DMA channel %d\n", in coh901318_alloc_chan_resources()
2154 __func__, cohc->id); in coh901318_alloc_chan_resources()
2156 if (chan->client_count > 1) in coh901318_alloc_chan_resources()
2157 return -EBUSY; in coh901318_alloc_chan_resources()
2159 spin_lock_irqsave(&cohc->lock, flags); in coh901318_alloc_chan_resources()
2163 cohc->allocated = 1; in coh901318_alloc_chan_resources()
2166 spin_unlock_irqrestore(&cohc->lock, flags); in coh901318_alloc_chan_resources()
2175 int channel = cohc->id; in coh901318_free_chan_resources()
2178 spin_lock_irqsave(&cohc->lock, flags); in coh901318_free_chan_resources()
2181 writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CFG + in coh901318_free_chan_resources()
2183 writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CTRL + in coh901318_free_chan_resources()
2186 cohc->allocated = 0; in coh901318_free_chan_resources()
2188 spin_unlock_irqrestore(&cohc->lock, flags); in coh901318_free_chan_resources()
2199 struct coh901318_chan *cohc = to_coh901318_chan(tx->chan); in coh901318_tx_submit()
2203 spin_lock_irqsave(&cohc->lock, flags); in coh901318_tx_submit()
2208 spin_unlock_irqrestore(&cohc->lock, flags); in coh901318_tx_submit()
2222 u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last; in coh901318_prep_memcpy()
2225 spin_lock_irqsave(&cohc->lock, flg); in coh901318_prep_memcpy()
2229 __func__, cohc->id, &src, &dest, size); in coh901318_prep_memcpy()
2239 lli = coh901318_lli_alloc(&cohc->base->pool, lli_len); in coh901318_prep_memcpy()
2245 &cohc->base->pool, lli, src, size, dest, in coh901318_prep_memcpy()
2246 cohc_chan_param(cohc)->ctrl_lli_chained, in coh901318_prep_memcpy()
2255 cohd->lli = lli; in coh901318_prep_memcpy()
2256 cohd->flags = flags; in coh901318_prep_memcpy()
2257 cohd->desc.tx_submit = coh901318_tx_submit; in coh901318_prep_memcpy()
2259 spin_unlock_irqrestore(&cohc->lock, flg); in coh901318_prep_memcpy()
2261 return &cohd->desc; in coh901318_prep_memcpy()
2263 spin_unlock_irqrestore(&cohc->lock, flg); in coh901318_prep_memcpy()
2280 u32 ctrl_chained = cohc_chan_param(cohc)->ctrl_lli_chained; in coh901318_prep_slave_sg()
2281 u32 ctrl = cohc_chan_param(cohc)->ctrl_lli; in coh901318_prep_slave_sg()
2282 u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last; in coh901318_prep_slave_sg()
2292 spin_lock_irqsave(&cohc->lock, flg); in coh901318_prep_slave_sg()
2302 config = params->config; in coh901318_prep_slave_sg()
2304 * Add runtime-specific control on top, make in coh901318_prep_slave_sg()
2308 ctrl_chained |= cohc->ctrl; in coh901318_prep_slave_sg()
2309 ctrl_last |= cohc->ctrl; in coh901318_prep_slave_sg()
2310 ctrl |= cohc->ctrl; in coh901318_prep_slave_sg()
2331 /* The dma only supports transmitting packages up to in coh901318_prep_slave_sg()
2333 * dma elemts required to send the entire sg list in coh901318_prep_slave_sg()
2352 lli = coh901318_lli_alloc(&cohc->base->pool, len); in coh901318_prep_slave_sg()
2357 coh901318_dma_set_runtimeconfig(chan, &cohc->config, direction); in coh901318_prep_slave_sg()
2360 ret = coh901318_lli_fill_sg(&cohc->base->pool, lli, sgl, sg_len, in coh901318_prep_slave_sg()
2361 cohc->addr, in coh901318_prep_slave_sg()
2374 cohd->head_config = config; in coh901318_prep_slave_sg()
2380 cohd->head_ctrl = lli->control; in coh901318_prep_slave_sg()
2381 cohd->dir = direction; in coh901318_prep_slave_sg()
2382 cohd->flags = flags; in coh901318_prep_slave_sg()
2383 cohd->desc.tx_submit = coh901318_tx_submit; in coh901318_prep_slave_sg()
2384 cohd->lli = lli; in coh901318_prep_slave_sg()
2386 spin_unlock_irqrestore(&cohc->lock, flg); in coh901318_prep_slave_sg()
2388 return &cohd->desc; in coh901318_prep_slave_sg()
2392 spin_unlock_irqrestore(&cohc->lock, flg); in coh901318_prep_slave_sg()
2410 if (ret == DMA_IN_PROGRESS && cohc->stopped) in coh901318_tx_status()
2422 spin_lock_irqsave(&cohc->lock, flags); in coh901318_issue_pending()
2430 if (!cohc->busy) in coh901318_issue_pending()
2433 spin_unlock_irqrestore(&cohc->lock, flags); in coh901318_issue_pending()
2437 * Here we wrap in the runtime dma control interface
2504 u32 maxburst; in coh901318_dma_set_runtimeconfig() local
2510 addr = config->src_addr; in coh901318_dma_set_runtimeconfig()
2511 addr_width = config->src_addr_width; in coh901318_dma_set_runtimeconfig()
2512 maxburst = config->src_maxburst; in coh901318_dma_set_runtimeconfig()
2514 addr = config->dst_addr; in coh901318_dma_set_runtimeconfig()
2515 addr_width = config->dst_addr_width; in coh901318_dma_set_runtimeconfig()
2516 maxburst = config->dst_maxburst; in coh901318_dma_set_runtimeconfig()
2519 return -EINVAL; in coh901318_dma_set_runtimeconfig()
2531 if (burst_sizes[i].burst_8bit <= maxburst) in coh901318_dma_set_runtimeconfig()
2543 if (burst_sizes[i].burst_16bit <= maxburst) in coh901318_dma_set_runtimeconfig()
2556 if (burst_sizes[i].burst_32bit <= maxburst) in coh901318_dma_set_runtimeconfig()
2565 return -EINVAL; in coh901318_dma_set_runtimeconfig()
2570 "selected burst size %d bytes for address width %d bytes, maxburst %d\n", in coh901318_dma_set_runtimeconfig()
2571 burst_sizes[i].burst_8bit, addr_width, maxburst); in coh901318_dma_set_runtimeconfig()
2573 cohc->addr = addr; in coh901318_dma_set_runtimeconfig()
2574 cohc->ctrl = ctrl; in coh901318_dma_set_runtimeconfig()
2584 memcpy(&cohc->config, config, sizeof(*config)); in coh901318_dma_slave_config()
2589 static void coh901318_base_init(struct dma_device *dma, const int *pick_chans, in coh901318_base_init() argument
2596 INIT_LIST_HEAD(&dma->channels); in coh901318_base_init()
2598 for (chans_i = 0; pick_chans[chans_i] != -1; chans_i += 2) { in coh901318_base_init()
2600 cohc = &base->chans[i]; in coh901318_base_init()
2602 cohc->base = base; in coh901318_base_init()
2603 cohc->chan.device = dma; in coh901318_base_init()
2604 cohc->id = i; in coh901318_base_init()
2610 spin_lock_init(&cohc->lock); in coh901318_base_init()
2612 cohc->nbr_active_done = 0; in coh901318_base_init()
2613 cohc->busy = 0; in coh901318_base_init()
2614 INIT_LIST_HEAD(&cohc->free); in coh901318_base_init()
2615 INIT_LIST_HEAD(&cohc->active); in coh901318_base_init()
2616 INIT_LIST_HEAD(&cohc->queue); in coh901318_base_init()
2618 tasklet_setup(&cohc->tasklet, dma_tasklet); in coh901318_base_init()
2620 list_add_tail(&cohc->chan.device_node, in coh901318_base_init()
2621 &dma->channels); in coh901318_base_init()
2635 return -ENODEV; in coh901318_probe()
2637 /* Map DMA controller registers to virtual memory */ in coh901318_probe()
2638 if (devm_request_mem_region(&pdev->dev, in coh901318_probe()
2639 io->start, in coh901318_probe()
2641 pdev->dev.driver->name) == NULL) in coh901318_probe()
2642 return -ENOMEM; in coh901318_probe()
2644 base = devm_kzalloc(&pdev->dev, in coh901318_probe()
2650 return -ENOMEM; in coh901318_probe()
2652 base->chans = ((void *)base) + ALIGN(sizeof(struct coh901318_base), 4); in coh901318_probe()
2654 base->virtbase = devm_ioremap(&pdev->dev, io->start, resource_size(io)); in coh901318_probe()
2655 if (!base->virtbase) in coh901318_probe()
2656 return -ENOMEM; in coh901318_probe()
2658 base->dev = &pdev->dev; in coh901318_probe()
2659 spin_lock_init(&base->pm.lock); in coh901318_probe()
2660 base->pm.started_channels = 0; in coh901318_probe()
2668 err = devm_request_irq(&pdev->dev, irq, dma_irq_handler, 0, in coh901318_probe()
2673 base->irq = irq; in coh901318_probe()
2675 err = coh901318_pool_create(&base->pool, &pdev->dev, in coh901318_probe()
2682 coh901318_base_init(&base->dma_slave, dma_slave_channels, in coh901318_probe()
2685 dma_cap_zero(base->dma_slave.cap_mask); in coh901318_probe()
2686 dma_cap_set(DMA_SLAVE, base->dma_slave.cap_mask); in coh901318_probe()
2688 base->dma_slave.device_alloc_chan_resources = coh901318_alloc_chan_resources; in coh901318_probe()
2689 base->dma_slave.device_free_chan_resources = coh901318_free_chan_resources; in coh901318_probe()
2690 base->dma_slave.device_prep_slave_sg = coh901318_prep_slave_sg; in coh901318_probe()
2691 base->dma_slave.device_tx_status = coh901318_tx_status; in coh901318_probe()
2692 base->dma_slave.device_issue_pending = coh901318_issue_pending; in coh901318_probe()
2693 base->dma_slave.device_config = coh901318_dma_slave_config; in coh901318_probe()
2694 base->dma_slave.device_pause = coh901318_pause; in coh901318_probe()
2695 base->dma_slave.device_resume = coh901318_resume; in coh901318_probe()
2696 base->dma_slave.device_terminate_all = coh901318_terminate_all; in coh901318_probe()
2697 base->dma_slave.dev = &pdev->dev; in coh901318_probe()
2699 err = dma_async_device_register(&base->dma_slave); in coh901318_probe()
2705 coh901318_base_init(&base->dma_memcpy, dma_memcpy_channels, in coh901318_probe()
2708 dma_cap_zero(base->dma_memcpy.cap_mask); in coh901318_probe()
2709 dma_cap_set(DMA_MEMCPY, base->dma_memcpy.cap_mask); in coh901318_probe()
2711 base->dma_memcpy.device_alloc_chan_resources = coh901318_alloc_chan_resources; in coh901318_probe()
2712 base->dma_memcpy.device_free_chan_resources = coh901318_free_chan_resources; in coh901318_probe()
2713 base->dma_memcpy.device_prep_dma_memcpy = coh901318_prep_memcpy; in coh901318_probe()
2714 base->dma_memcpy.device_tx_status = coh901318_tx_status; in coh901318_probe()
2715 base->dma_memcpy.device_issue_pending = coh901318_issue_pending; in coh901318_probe()
2716 base->dma_memcpy.device_config = coh901318_dma_slave_config; in coh901318_probe()
2717 base->dma_memcpy.device_pause = coh901318_pause; in coh901318_probe()
2718 base->dma_memcpy.device_resume = coh901318_resume; in coh901318_probe()
2719 base->dma_memcpy.device_terminate_all = coh901318_terminate_all; in coh901318_probe()
2720 base->dma_memcpy.dev = &pdev->dev; in coh901318_probe()
2725 base->dma_memcpy.copy_align = DMAENGINE_ALIGN_4_BYTES; in coh901318_probe()
2726 err = dma_async_device_register(&base->dma_memcpy); in coh901318_probe()
2731 err = of_dma_controller_register(pdev->dev.of_node, coh901318_xlate, in coh901318_probe()
2737 dev_info(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%p\n", in coh901318_probe()
2738 base->virtbase); in coh901318_probe()
2743 dma_async_device_unregister(&base->dma_memcpy); in coh901318_probe()
2745 dma_async_device_unregister(&base->dma_slave); in coh901318_probe()
2747 coh901318_pool_destroy(&base->pool); in coh901318_probe()
2756 for (chans_i = 0; pick_chans[chans_i] != -1; chans_i += 2) { in coh901318_base_remove()
2758 cohc = &base->chans[i]; in coh901318_base_remove()
2760 tasklet_kill(&cohc->tasklet); in coh901318_base_remove()
2770 devm_free_irq(&pdev->dev, base->irq, base); in coh901318_remove()
2775 of_dma_controller_free(pdev->dev.of_node); in coh901318_remove()
2776 dma_async_device_unregister(&base->dma_memcpy); in coh901318_remove()
2777 dma_async_device_unregister(&base->dma_slave); in coh901318_remove()
2778 coh901318_pool_destroy(&base->pool); in coh901318_remove()