1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  * Header file for the Atmel AHB DMA Controller driver
10 #include <linux/platform_data/dma-atmel.h>
16 #define		AT_DMA_IF_BIGEND(i)	(0x1 << (i))	/* AHB-Lite Interface i in Big-endian mode */
81 #define	ATC_DSCR_IF(i)		(0x3 & (i))	/* Dsc feched via AHB-Lite Interface i */
120 #define	ATC_SIF(i)		(0x3 & (i))	/* Src tx done via AHB-Lite Interface i */
121 #define	ATC_DIF(i)		((0x3 & (i)) <<  4)	/* Dst tx done via AHB-Lite Interface i */
126 #define	ATC_SRC_PIP		(0x1 <<  8)	/* Source Picture-in-Picture enabled */
127 #define	ATC_DST_PIP		(0x1 << 12)	/* Destination Picture-in-Picture enabled */
131 #define		ATC_FC_MEM2MEM		(0x0 << 21)	/* Mem-to-Mem (DMA) */
132 #define		ATC_FC_MEM2PER		(0x1 << 21)	/* Mem-to-Periph (DMA) */
133 #define		ATC_FC_PER2MEM		(0x2 << 21)	/* Periph-to-Mem (DMA) */
134 #define		ATC_FC_PER2PER		(0x3 << 21)	/* Periph-to-Periph (DMA) */
135 #define		ATC_FC_PER2MEM_PER	(0x4 << 21)	/* Periph-to-Mem (Peripheral) */
136 #define		ATC_FC_MEM2PER_PER	(0x5 << 21)	/* Mem-to-Periph (Peripheral) */
137 #define		ATC_FC_PER2PER_SRCPER	(0x6 << 21)	/* Periph-to-Periph (Src Peripheral) */
138 #define		ATC_FC_PER2PER_DSTPER	(0x7 << 21)	/* Periph-to-Periph (Dst Peripheral) */
162 /*--  descriptors  -----------------------------------------------------*/
164 /* LLI == Linked List Item; aka DMA buffer descriptor */
177  * struct at_desc - software descriptor
213 /*--  Channels  --------------------------------------------------------*/
216  * atc_status - information bits stored in channel status flag
227  * struct at_dma_chan - internal representation of an Atmel HDMAC channel
269 	__raw_readl((atchan)->ch_regs + ATC_##name##_OFFSET)
272 	__raw_writel((val), (atchan)->ch_regs + ATC_##name##_OFFSET)
281  * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3, 32 -> 4, 64 -> 5, 128 -> 6, 256 -> 7.
285 static inline void convert_burst(u32 *maxburst)  in convert_burst()  argument
287 	if (*maxburst > 1)  in convert_burst()
288 		*maxburst = fls(*maxburst) - 2;  in convert_burst()
290 		*maxburst = 0;  in convert_burst()
295  * 1 byte -> 0, 2 bytes -> 1, 4 bytes -> 2.
310 /*--  Controller  ------------------------------------------------------*/
313  * struct at_dma - internal representation of an Atmel HDMA Controller
315  * @atdma_devtype: identifier of DMA controller compatibility
317  * @clk: dma controller clock
320  * @dma_desc_pool: base of DMA descriptor region (DMA address)
338 	__raw_readl((atdma)->regs + AT_DMA_##name)
340 	__raw_writel((val), (atdma)->regs + AT_DMA_##name)
348 /*--  Helper functions  ------------------------------------------------*/
352 	return &chan->dev->device;  in chan2dev()
358 	struct at_dma	*atdma = to_at_dma(atchan->chan_common.device);  in vdbg_dump_regs()
360 	dev_err(chan2dev(&atchan->chan_common),  in vdbg_dump_regs()
362 		atchan->chan_common.chan_id,  in vdbg_dump_regs()
366 	dev_err(chan2dev(&atchan->chan_common),  in vdbg_dump_regs()
381 	dev_crit(chan2dev(&atchan->chan_common),  in atc_dump_lli()
383 		 &lli->saddr, &lli->daddr,  in atc_dump_lli()
384 		 lli->ctrla, lli->ctrlb, &lli->dscr);  in atc_dump_lli()
413  * atc_chan_is_enabled - test if given channel is enabled
418 	struct at_dma	*atdma = to_at_dma(atchan->chan_common.device);  in atc_chan_is_enabled()
420 	return !!(dma_readl(atdma, CHSR) & atchan->mask);  in atc_chan_is_enabled()
424  * atc_chan_is_paused - test channel pause/resume status
429 	return test_bit(ATC_IS_PAUSED, &atchan->status);  in atc_chan_is_paused()
433  * atc_chan_is_cyclic - test if given channel has cyclic property set
438 	return test_bit(ATC_IS_CYCLIC, &atchan->status);  in atc_chan_is_cyclic()
442  * set_desc_eol - set end-of-link to descriptor so it will end transfer
447 	u32 ctrlb = desc->lli.ctrlb;  in set_desc_eol()
452 	desc->lli.ctrlb = ctrlb;  in set_desc_eol()
453 	desc->lli.dscr = 0;  in set_desc_eol()