Lines Matching +full:dma +full:- +full:maxburst
1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (c) 2012 Eukréa Electromatique - ATMEL
10 * Some ideas are from omap-aes.c driver.
30 #include <linux/dma-mapping.h>
41 #include "atmel-aes-regs.h"
42 #include "atmel-authenc.h"
263 snprintf(tmp, sz, "KEYWR[%u]", (offset - AES_KEYWR(0)) >> 2); in atmel_aes_reg_name()
270 snprintf(tmp, sz, "IDATAR[%u]", (offset - AES_IDATAR(0)) >> 2); in atmel_aes_reg_name()
277 snprintf(tmp, sz, "ODATAR[%u]", (offset - AES_ODATAR(0)) >> 2); in atmel_aes_reg_name()
284 snprintf(tmp, sz, "IVR[%u]", (offset - AES_IVR(0)) >> 2); in atmel_aes_reg_name()
297 snprintf(tmp, sz, "GHASHR[%u]", (offset - AES_GHASHR(0)) >> 2); in atmel_aes_reg_name()
304 snprintf(tmp, sz, "TAGR[%u]", (offset - AES_TAGR(0)) >> 2); in atmel_aes_reg_name()
314 snprintf(tmp, sz, "GCMHR[%u]", (offset - AES_GCMHR(0)) >> 2); in atmel_aes_reg_name()
324 snprintf(tmp, sz, "TWR[%u]", (offset - AES_TWR(0)) >> 2); in atmel_aes_reg_name()
331 snprintf(tmp, sz, "ALPHAR[%u]", (offset - AES_ALPHAR(0)) >> 2); in atmel_aes_reg_name()
347 u32 value = readl_relaxed(dd->io_base + offset); in atmel_aes_read()
350 if (dd->flags & AES_FLAGS_DUMP_REG) { in atmel_aes_read()
353 dev_vdbg(dd->dev, "read 0x%08x from %s\n", value, in atmel_aes_read()
365 if (dd->flags & AES_FLAGS_DUMP_REG) { in atmel_aes_write()
368 dev_vdbg(dd->dev, "write 0x%08x into %s\n", value, in atmel_aes_write()
373 writel_relaxed(value, dd->io_base + offset); in atmel_aes_write()
379 for (; count--; value++, offset += 4) in atmel_aes_read_n()
386 for (; count--; value++, offset += 4) in atmel_aes_write_n()
410 dd->resume = resume; in atmel_aes_wait_for_data_ready()
412 return -EINPROGRESS; in atmel_aes_wait_for_data_ready()
417 len &= block_size - 1; in atmel_aes_padlen()
418 return len ? block_size - len : 0; in atmel_aes_padlen()
427 if (!ctx->dd) { in atmel_aes_find_dev()
432 ctx->dd = aes_dd; in atmel_aes_find_dev()
434 aes_dd = ctx->dd; in atmel_aes_find_dev()
446 err = clk_enable(dd->iclk); in atmel_aes_hw_init()
469 dd->hw_version = atmel_aes_get_version(dd); in atmel_aes_hw_version_init()
471 dev_info(dd->dev, "version: 0x%x\n", dd->hw_version); in atmel_aes_hw_version_init()
473 clk_disable(dd->iclk); in atmel_aes_hw_version_init()
481 dd->flags = (dd->flags & AES_FLAGS_PERSISTENT) | rctx->mode; in atmel_aes_set_mode()
486 return (dd->flags & AES_FLAGS_ENCRYPT); in atmel_aes_is_encrypt()
495 struct skcipher_request *req = skcipher_request_cast(dd->areq); in atmel_aes_set_iv_as_last_ciphertext_block()
500 if (req->cryptlen < ivsize) in atmel_aes_set_iv_as_last_ciphertext_block()
503 if (rctx->mode & AES_FLAGS_ENCRYPT) { in atmel_aes_set_iv_as_last_ciphertext_block()
504 scatterwalk_map_and_copy(req->iv, req->dst, in atmel_aes_set_iv_as_last_ciphertext_block()
505 req->cryptlen - ivsize, ivsize, 0); in atmel_aes_set_iv_as_last_ciphertext_block()
507 if (req->src == req->dst) in atmel_aes_set_iv_as_last_ciphertext_block()
508 memcpy(req->iv, rctx->lastc, ivsize); in atmel_aes_set_iv_as_last_ciphertext_block()
510 scatterwalk_map_and_copy(req->iv, req->src, in atmel_aes_set_iv_as_last_ciphertext_block()
511 req->cryptlen - ivsize, in atmel_aes_set_iv_as_last_ciphertext_block()
524 struct atmel_aes_ctr_ctx *ctx = atmel_aes_ctr_ctx_cast(dd->ctx); in atmel_aes_ctr_update_req_iv()
525 struct skcipher_request *req = skcipher_request_cast(dd->areq); in atmel_aes_ctr_update_req_iv()
533 * here, ctx->blocks contains the number of blocks of the last fragment in atmel_aes_ctr_update_req_iv()
536 for (i = 0; i < ctx->blocks; i++) in atmel_aes_ctr_update_req_iv()
537 crypto_inc((u8 *)ctx->iv, AES_BLOCK_SIZE); in atmel_aes_ctr_update_req_iv()
539 memcpy(req->iv, ctx->iv, ivsize); in atmel_aes_ctr_update_req_iv()
544 struct skcipher_request *req = skcipher_request_cast(dd->areq); in atmel_aes_complete()
548 if (dd->ctx->is_aead) in atmel_aes_complete()
552 clk_disable(dd->iclk); in atmel_aes_complete()
553 dd->flags &= ~AES_FLAGS_BUSY; in atmel_aes_complete()
555 if (!err && !dd->ctx->is_aead && in atmel_aes_complete()
556 (rctx->mode & AES_FLAGS_OPMODE_MASK) != AES_FLAGS_ECB) { in atmel_aes_complete()
557 if ((rctx->mode & AES_FLAGS_OPMODE_MASK) != AES_FLAGS_CTR) in atmel_aes_complete()
563 if (dd->is_async) in atmel_aes_complete()
564 dd->areq->complete(dd->areq, err); in atmel_aes_complete()
566 tasklet_schedule(&dd->queue_task); in atmel_aes_complete()
584 valmr |= dd->flags & AES_FLAGS_MODE_MASK; in atmel_aes_write_ctrl_key()
588 if (dd->caps.has_dualbuff) in atmel_aes_write_ctrl_key()
607 dd->ctx->key, dd->ctx->keylen); in atmel_aes_write_ctrl()
618 atmel_aes_read_block(dd, AES_ODATAR(0), dd->data); in atmel_aes_cpu_transfer()
619 dd->data += 4; in atmel_aes_cpu_transfer()
620 dd->datalen -= AES_BLOCK_SIZE; in atmel_aes_cpu_transfer()
622 if (dd->datalen < AES_BLOCK_SIZE) in atmel_aes_cpu_transfer()
625 atmel_aes_write_block(dd, AES_IDATAR(0), dd->data); in atmel_aes_cpu_transfer()
629 dd->resume = atmel_aes_cpu_transfer; in atmel_aes_cpu_transfer()
631 return -EINPROGRESS; in atmel_aes_cpu_transfer()
635 if (!sg_copy_from_buffer(dd->real_dst, sg_nents(dd->real_dst), in atmel_aes_cpu_transfer()
636 dd->buf, dd->total)) in atmel_aes_cpu_transfer()
637 err = -EINVAL; in atmel_aes_cpu_transfer()
642 return dd->cpu_transfer_complete(dd); in atmel_aes_cpu_transfer()
654 return -EINVAL; in atmel_aes_cpu_start()
656 sg_copy_to_buffer(src, sg_nents(src), dd->buf, len); in atmel_aes_cpu_start()
658 dd->total = len; in atmel_aes_cpu_start()
659 dd->real_dst = dst; in atmel_aes_cpu_start()
660 dd->cpu_transfer_complete = resume; in atmel_aes_cpu_start()
661 dd->datalen = len + padlen; in atmel_aes_cpu_start()
662 dd->data = (u32 *)dd->buf; in atmel_aes_cpu_start()
663 atmel_aes_write_block(dd, AES_IDATAR(0), dd->data); in atmel_aes_cpu_start()
668 /* DMA transfer */
675 struct atmel_aes_dma *dma) in atmel_aes_check_aligned() argument
679 if (!IS_ALIGNED(len, dd->ctx->block_size)) in atmel_aes_check_aligned()
683 if (!IS_ALIGNED(sg->offset, sizeof(u32))) in atmel_aes_check_aligned()
686 if (len <= sg->length) { in atmel_aes_check_aligned()
687 if (!IS_ALIGNED(len, dd->ctx->block_size)) in atmel_aes_check_aligned()
690 dma->nents = nents+1; in atmel_aes_check_aligned()
691 dma->remainder = sg->length - len; in atmel_aes_check_aligned()
692 sg->length = len; in atmel_aes_check_aligned()
696 if (!IS_ALIGNED(sg->length, dd->ctx->block_size)) in atmel_aes_check_aligned()
699 len -= sg->length; in atmel_aes_check_aligned()
705 static inline void atmel_aes_restore_sg(const struct atmel_aes_dma *dma) in atmel_aes_restore_sg() argument
707 struct scatterlist *sg = dma->sg; in atmel_aes_restore_sg()
708 int nents = dma->nents; in atmel_aes_restore_sg()
710 if (!dma->remainder) in atmel_aes_restore_sg()
713 while (--nents > 0 && sg) in atmel_aes_restore_sg()
719 sg->length += dma->remainder; in atmel_aes_restore_sg()
730 dd->total = len; in atmel_aes_map()
731 dd->src.sg = src; in atmel_aes_map()
732 dd->dst.sg = dst; in atmel_aes_map()
733 dd->real_dst = dst; in atmel_aes_map()
735 src_aligned = atmel_aes_check_aligned(dd, src, len, &dd->src); in atmel_aes_map()
739 dst_aligned = atmel_aes_check_aligned(dd, dst, len, &dd->dst); in atmel_aes_map()
741 padlen = atmel_aes_padlen(len, dd->ctx->block_size); in atmel_aes_map()
743 if (dd->buflen < len + padlen) in atmel_aes_map()
744 return -ENOMEM; in atmel_aes_map()
747 sg_copy_to_buffer(src, sg_nents(src), dd->buf, len); in atmel_aes_map()
748 dd->src.sg = &dd->aligned_sg; in atmel_aes_map()
749 dd->src.nents = 1; in atmel_aes_map()
750 dd->src.remainder = 0; in atmel_aes_map()
754 dd->dst.sg = &dd->aligned_sg; in atmel_aes_map()
755 dd->dst.nents = 1; in atmel_aes_map()
756 dd->dst.remainder = 0; in atmel_aes_map()
759 sg_init_table(&dd->aligned_sg, 1); in atmel_aes_map()
760 sg_set_buf(&dd->aligned_sg, dd->buf, len + padlen); in atmel_aes_map()
763 if (dd->src.sg == dd->dst.sg) { in atmel_aes_map()
764 dd->src.sg_len = dma_map_sg(dd->dev, dd->src.sg, dd->src.nents, in atmel_aes_map()
766 dd->dst.sg_len = dd->src.sg_len; in atmel_aes_map()
767 if (!dd->src.sg_len) in atmel_aes_map()
768 return -EFAULT; in atmel_aes_map()
770 dd->src.sg_len = dma_map_sg(dd->dev, dd->src.sg, dd->src.nents, in atmel_aes_map()
772 if (!dd->src.sg_len) in atmel_aes_map()
773 return -EFAULT; in atmel_aes_map()
775 dd->dst.sg_len = dma_map_sg(dd->dev, dd->dst.sg, dd->dst.nents, in atmel_aes_map()
777 if (!dd->dst.sg_len) { in atmel_aes_map()
778 dma_unmap_sg(dd->dev, dd->src.sg, dd->src.nents, in atmel_aes_map()
780 return -EFAULT; in atmel_aes_map()
789 if (dd->src.sg == dd->dst.sg) { in atmel_aes_unmap()
790 dma_unmap_sg(dd->dev, dd->src.sg, dd->src.nents, in atmel_aes_unmap()
793 if (dd->src.sg != &dd->aligned_sg) in atmel_aes_unmap()
794 atmel_aes_restore_sg(&dd->src); in atmel_aes_unmap()
796 dma_unmap_sg(dd->dev, dd->dst.sg, dd->dst.nents, in atmel_aes_unmap()
799 if (dd->dst.sg != &dd->aligned_sg) in atmel_aes_unmap()
800 atmel_aes_restore_sg(&dd->dst); in atmel_aes_unmap()
802 dma_unmap_sg(dd->dev, dd->src.sg, dd->src.nents, in atmel_aes_unmap()
805 if (dd->src.sg != &dd->aligned_sg) in atmel_aes_unmap()
806 atmel_aes_restore_sg(&dd->src); in atmel_aes_unmap()
809 if (dd->dst.sg == &dd->aligned_sg) in atmel_aes_unmap()
810 sg_copy_from_buffer(dd->real_dst, sg_nents(dd->real_dst), in atmel_aes_unmap()
811 dd->buf, dd->total); in atmel_aes_unmap()
817 u32 maxburst) in atmel_aes_dma_transfer_start() argument
822 struct atmel_aes_dma *dma; in atmel_aes_dma_transfer_start() local
828 config.src_maxburst = maxburst; in atmel_aes_dma_transfer_start()
829 config.dst_maxburst = maxburst; in atmel_aes_dma_transfer_start()
833 dma = &dd->src; in atmel_aes_dma_transfer_start()
835 config.dst_addr = dd->phys_base + AES_IDATAR(0); in atmel_aes_dma_transfer_start()
839 dma = &dd->dst; in atmel_aes_dma_transfer_start()
841 config.src_addr = dd->phys_base + AES_ODATAR(0); in atmel_aes_dma_transfer_start()
845 return -EINVAL; in atmel_aes_dma_transfer_start()
848 err = dmaengine_slave_config(dma->chan, &config); in atmel_aes_dma_transfer_start()
852 desc = dmaengine_prep_slave_sg(dma->chan, dma->sg, dma->sg_len, dir, in atmel_aes_dma_transfer_start()
855 return -ENOMEM; in atmel_aes_dma_transfer_start()
857 desc->callback = callback; in atmel_aes_dma_transfer_start()
858 desc->callback_param = dd; in atmel_aes_dma_transfer_start()
860 dma_async_issue_pending(dma->chan); in atmel_aes_dma_transfer_start()
872 u32 maxburst; in atmel_aes_dma_start() local
875 switch (dd->ctx->block_size) { in atmel_aes_dma_start()
878 maxburst = 1; in atmel_aes_dma_start()
883 maxburst = 1; in atmel_aes_dma_start()
889 maxburst = 1; in atmel_aes_dma_start()
894 maxburst = dd->caps.max_burst_size; in atmel_aes_dma_start()
898 err = -EINVAL; in atmel_aes_dma_start()
906 dd->resume = resume; in atmel_aes_dma_start()
908 /* Set output DMA transfer first */ in atmel_aes_dma_start()
910 maxburst); in atmel_aes_dma_start()
914 /* Then set input DMA transfer */ in atmel_aes_dma_start()
916 maxburst); in atmel_aes_dma_start()
920 return -EINPROGRESS; in atmel_aes_dma_start()
923 dmaengine_terminate_sync(dd->dst.chan); in atmel_aes_dma_start()
935 dd->is_async = true; in atmel_aes_dma_callback()
936 (void)dd->resume(dd); in atmel_aes_dma_callback()
948 spin_lock_irqsave(&dd->lock, flags); in atmel_aes_handle_queue()
950 ret = crypto_enqueue_request(&dd->queue, new_areq); in atmel_aes_handle_queue()
951 if (dd->flags & AES_FLAGS_BUSY) { in atmel_aes_handle_queue()
952 spin_unlock_irqrestore(&dd->lock, flags); in atmel_aes_handle_queue()
955 backlog = crypto_get_backlog(&dd->queue); in atmel_aes_handle_queue()
956 areq = crypto_dequeue_request(&dd->queue); in atmel_aes_handle_queue()
958 dd->flags |= AES_FLAGS_BUSY; in atmel_aes_handle_queue()
959 spin_unlock_irqrestore(&dd->lock, flags); in atmel_aes_handle_queue()
965 backlog->complete(backlog, -EINPROGRESS); in atmel_aes_handle_queue()
967 ctx = crypto_tfm_ctx(areq->tfm); in atmel_aes_handle_queue()
969 dd->areq = areq; in atmel_aes_handle_queue()
970 dd->ctx = ctx; in atmel_aes_handle_queue()
972 dd->is_async = start_async; in atmel_aes_handle_queue()
974 /* WARNING: ctx->start() MAY change dd->is_async. */ in atmel_aes_handle_queue()
975 err = ctx->start(dd); in atmel_aes_handle_queue()
989 struct skcipher_request *req = skcipher_request_cast(dd->areq); in atmel_aes_start()
991 bool use_dma = (req->cryptlen >= ATMEL_AES_DMA_THRESHOLD || in atmel_aes_start()
992 dd->ctx->block_size != AES_BLOCK_SIZE); in atmel_aes_start()
1001 atmel_aes_write_ctrl(dd, use_dma, (void *)req->iv); in atmel_aes_start()
1003 return atmel_aes_dma_start(dd, req->src, req->dst, in atmel_aes_start()
1004 req->cryptlen, in atmel_aes_start()
1007 return atmel_aes_cpu_start(dd, req->src, req->dst, req->cryptlen, in atmel_aes_start()
1013 struct atmel_aes_ctr_ctx *ctx = atmel_aes_ctr_ctx_cast(dd->ctx); in atmel_aes_ctr_transfer()
1014 struct skcipher_request *req = skcipher_request_cast(dd->areq); in atmel_aes_ctr_transfer()
1022 ctx->offset += dd->total; in atmel_aes_ctr_transfer()
1023 if (ctx->offset >= req->cryptlen) in atmel_aes_ctr_transfer()
1027 datalen = req->cryptlen - ctx->offset; in atmel_aes_ctr_transfer()
1028 ctx->blocks = DIV_ROUND_UP(datalen, AES_BLOCK_SIZE); in atmel_aes_ctr_transfer()
1029 ctr = be32_to_cpu(ctx->iv[3]); in atmel_aes_ctr_transfer()
1033 end = start + ctx->blocks - 1; in atmel_aes_ctr_transfer()
1035 if (ctx->blocks >> 16 || end < start) { in atmel_aes_ctr_transfer()
1037 datalen = AES_BLOCK_SIZE * (0x10000 - start); in atmel_aes_ctr_transfer()
1044 src = scatterwalk_ffwd(ctx->src, req->src, ctx->offset); in atmel_aes_ctr_transfer()
1045 dst = ((req->src == req->dst) ? src : in atmel_aes_ctr_transfer()
1046 scatterwalk_ffwd(ctx->dst, req->dst, ctx->offset)); in atmel_aes_ctr_transfer()
1049 atmel_aes_write_ctrl(dd, use_dma, ctx->iv); in atmel_aes_ctr_transfer()
1055 ctx->iv[3] = cpu_to_be32(ctr); in atmel_aes_ctr_transfer()
1056 crypto_inc((u8 *)ctx->iv, AES_BLOCK_SIZE); in atmel_aes_ctr_transfer()
1069 struct atmel_aes_ctr_ctx *ctx = atmel_aes_ctr_ctx_cast(dd->ctx); in atmel_aes_ctr_start()
1070 struct skcipher_request *req = skcipher_request_cast(dd->areq); in atmel_aes_ctr_start()
1080 memcpy(ctx->iv, req->iv, AES_BLOCK_SIZE); in atmel_aes_ctr_start()
1081 ctx->offset = 0; in atmel_aes_ctr_start()
1082 dd->total = 0; in atmel_aes_ctr_start()
1095 ctx->block_size = CFB8_BLOCK_SIZE; in atmel_aes_crypt()
1099 ctx->block_size = CFB16_BLOCK_SIZE; in atmel_aes_crypt()
1103 ctx->block_size = CFB32_BLOCK_SIZE; in atmel_aes_crypt()
1107 ctx->block_size = CFB64_BLOCK_SIZE; in atmel_aes_crypt()
1111 ctx->block_size = AES_BLOCK_SIZE; in atmel_aes_crypt()
1114 ctx->is_aead = false; in atmel_aes_crypt()
1118 return -ENODEV; in atmel_aes_crypt()
1121 rctx->mode = mode; in atmel_aes_crypt()
1124 !(mode & AES_FLAGS_ENCRYPT) && req->src == req->dst) { in atmel_aes_crypt()
1127 if (req->cryptlen >= ivsize) in atmel_aes_crypt()
1128 scatterwalk_map_and_copy(rctx->lastc, req->src, in atmel_aes_crypt()
1129 req->cryptlen - ivsize, in atmel_aes_crypt()
1133 return atmel_aes_handle_queue(dd, &req->base); in atmel_aes_crypt()
1144 return -EINVAL; in atmel_aes_setkey()
1146 memcpy(ctx->key, key, keylen); in atmel_aes_setkey()
1147 ctx->keylen = keylen; in atmel_aes_setkey()
1247 ctx->base.start = atmel_aes_start; in atmel_aes_init_tfm()
1257 ctx->base.start = atmel_aes_ctr_start; in atmel_aes_ctr_init_tfm()
1265 .base.cra_driver_name = "atmel-ecb-aes",
1278 .base.cra_driver_name = "atmel-cbc-aes",
1292 .base.cra_driver_name = "atmel-ofb-aes",
1306 .base.cra_driver_name = "atmel-cfb-aes",
1320 .base.cra_driver_name = "atmel-cfb32-aes",
1334 .base.cra_driver_name = "atmel-cfb16-aes",
1348 .base.cra_driver_name = "atmel-cfb8-aes",
1362 .base.cra_driver_name = "atmel-ctr-aes",
1378 .base.cra_driver_name = "atmel-cfb64-aes",
1420 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_ghash()
1422 dd->data = (u32 *)data; in atmel_aes_gcm_ghash()
1423 dd->datalen = datalen; in atmel_aes_gcm_ghash()
1424 ctx->ghash_in = ghash_in; in atmel_aes_gcm_ghash()
1425 ctx->ghash_out = ghash_out; in atmel_aes_gcm_ghash()
1426 ctx->ghash_resume = resume; in atmel_aes_gcm_ghash()
1434 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_ghash_init()
1437 atmel_aes_write(dd, AES_AADLENR, dd->total); in atmel_aes_gcm_ghash_init()
1441 if (ctx->ghash_in) in atmel_aes_gcm_ghash_init()
1442 atmel_aes_write_block(dd, AES_GHASHR(0), ctx->ghash_in); in atmel_aes_gcm_ghash_init()
1449 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_ghash_finalize()
1453 while (dd->datalen > 0) { in atmel_aes_gcm_ghash_finalize()
1454 atmel_aes_write_block(dd, AES_IDATAR(0), dd->data); in atmel_aes_gcm_ghash_finalize()
1455 dd->data += 4; in atmel_aes_gcm_ghash_finalize()
1456 dd->datalen -= AES_BLOCK_SIZE; in atmel_aes_gcm_ghash_finalize()
1460 dd->resume = atmel_aes_gcm_ghash_finalize; in atmel_aes_gcm_ghash_finalize()
1462 return -EINPROGRESS; in atmel_aes_gcm_ghash_finalize()
1467 atmel_aes_read_block(dd, AES_GHASHR(0), ctx->ghash_out); in atmel_aes_gcm_ghash_finalize()
1469 return ctx->ghash_resume(dd); in atmel_aes_gcm_ghash_finalize()
1475 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_start()
1476 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_gcm_start()
1481 const void *iv = req->iv; in atmel_aes_gcm_start()
1482 u8 *data = dd->buf; in atmel_aes_gcm_start()
1492 memcpy(ctx->j0, iv, ivsize); in atmel_aes_gcm_start()
1493 ctx->j0[3] = cpu_to_be32(1); in atmel_aes_gcm_start()
1499 if (datalen > dd->buflen) in atmel_aes_gcm_start()
1500 return atmel_aes_complete(dd, -EINVAL); in atmel_aes_gcm_start()
1504 ((__be64 *)(data + datalen))[-1] = cpu_to_be64(ivsize * 8); in atmel_aes_gcm_start()
1507 NULL, ctx->j0, atmel_aes_gcm_process); in atmel_aes_gcm_start()
1512 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_process()
1513 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_gcm_process()
1520 ctx->textlen = req->cryptlen - (enc ? 0 : authsize); in atmel_aes_gcm_process()
1526 if (likely(req->assoclen != 0 || ctx->textlen != 0)) in atmel_aes_gcm_process()
1527 dd->flags |= AES_FLAGS_GTAGEN; in atmel_aes_gcm_process()
1535 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_length()
1536 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_gcm_length()
1537 __be32 j0_lsw, *j0 = ctx->j0; in atmel_aes_gcm_length()
1547 atmel_aes_write(dd, AES_AADLENR, req->assoclen); in atmel_aes_gcm_length()
1548 atmel_aes_write(dd, AES_CLENR, ctx->textlen); in atmel_aes_gcm_length()
1551 if (unlikely(req->assoclen == 0)) { in atmel_aes_gcm_length()
1552 dd->datalen = 0; in atmel_aes_gcm_length()
1557 padlen = atmel_aes_padlen(req->assoclen, AES_BLOCK_SIZE); in atmel_aes_gcm_length()
1558 if (unlikely(req->assoclen + padlen > dd->buflen)) in atmel_aes_gcm_length()
1559 return atmel_aes_complete(dd, -EINVAL); in atmel_aes_gcm_length()
1560 sg_copy_to_buffer(req->src, sg_nents(req->src), dd->buf, req->assoclen); in atmel_aes_gcm_length()
1563 dd->data = (u32 *)dd->buf; in atmel_aes_gcm_length()
1564 dd->datalen = req->assoclen + padlen; in atmel_aes_gcm_length()
1570 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_data()
1571 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_gcm_data()
1572 bool use_dma = (ctx->textlen >= ATMEL_AES_DMA_THRESHOLD); in atmel_aes_gcm_data()
1577 while (dd->datalen > 0) { in atmel_aes_gcm_data()
1578 atmel_aes_write_block(dd, AES_IDATAR(0), dd->data); in atmel_aes_gcm_data()
1579 dd->data += 4; in atmel_aes_gcm_data()
1580 dd->datalen -= AES_BLOCK_SIZE; in atmel_aes_gcm_data()
1584 dd->resume = atmel_aes_gcm_data; in atmel_aes_gcm_data()
1586 return -EINPROGRESS; in atmel_aes_gcm_data()
1591 if (unlikely(ctx->textlen == 0)) in atmel_aes_gcm_data()
1595 src = scatterwalk_ffwd(ctx->src, req->src, req->assoclen); in atmel_aes_gcm_data()
1596 dst = ((req->src == req->dst) ? src : in atmel_aes_gcm_data()
1597 scatterwalk_ffwd(ctx->dst, req->dst, req->assoclen)); in atmel_aes_gcm_data()
1600 /* Update the Mode Register for DMA transfers. */ in atmel_aes_gcm_data()
1604 if (dd->caps.has_dualbuff) in atmel_aes_gcm_data()
1608 return atmel_aes_dma_start(dd, src, dst, ctx->textlen, in atmel_aes_gcm_data()
1612 return atmel_aes_cpu_start(dd, src, dst, ctx->textlen, in atmel_aes_gcm_data()
1618 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_tag_init()
1619 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_gcm_tag_init()
1620 __be64 *data = dd->buf; in atmel_aes_gcm_tag_init()
1622 if (likely(dd->flags & AES_FLAGS_GTAGEN)) { in atmel_aes_gcm_tag_init()
1624 dd->resume = atmel_aes_gcm_tag_init; in atmel_aes_gcm_tag_init()
1626 return -EINPROGRESS; in atmel_aes_gcm_tag_init()
1633 atmel_aes_read_block(dd, AES_GHASHR(0), ctx->ghash); in atmel_aes_gcm_tag_init()
1635 data[0] = cpu_to_be64(req->assoclen * 8); in atmel_aes_gcm_tag_init()
1636 data[1] = cpu_to_be64(ctx->textlen * 8); in atmel_aes_gcm_tag_init()
1639 ctx->ghash, ctx->ghash, atmel_aes_gcm_tag); in atmel_aes_gcm_tag_init()
1644 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_tag()
1651 flags = dd->flags; in atmel_aes_gcm_tag()
1652 dd->flags &= ~(AES_FLAGS_OPMODE_MASK | AES_FLAGS_GTAGEN); in atmel_aes_gcm_tag()
1653 dd->flags |= AES_FLAGS_CTR; in atmel_aes_gcm_tag()
1654 atmel_aes_write_ctrl(dd, false, ctx->j0); in atmel_aes_gcm_tag()
1655 dd->flags = flags; in atmel_aes_gcm_tag()
1657 atmel_aes_write_block(dd, AES_IDATAR(0), ctx->ghash); in atmel_aes_gcm_tag()
1663 struct atmel_aes_gcm_ctx *ctx = atmel_aes_gcm_ctx_cast(dd->ctx); in atmel_aes_gcm_finalize()
1664 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_gcm_finalize()
1667 u32 offset, authsize, itag[4], *otag = ctx->tag; in atmel_aes_gcm_finalize()
1671 if (likely(dd->flags & AES_FLAGS_GTAGEN)) in atmel_aes_gcm_finalize()
1672 atmel_aes_read_block(dd, AES_TAGR(0), ctx->tag); in atmel_aes_gcm_finalize()
1674 atmel_aes_read_block(dd, AES_ODATAR(0), ctx->tag); in atmel_aes_gcm_finalize()
1676 offset = req->assoclen + ctx->textlen; in atmel_aes_gcm_finalize()
1679 scatterwalk_map_and_copy(otag, req->dst, offset, authsize, 1); in atmel_aes_gcm_finalize()
1682 scatterwalk_map_and_copy(itag, req->src, offset, authsize, 0); in atmel_aes_gcm_finalize()
1683 err = crypto_memneq(itag, otag, authsize) ? -EBADMSG : 0; in atmel_aes_gcm_finalize()
1697 ctx->block_size = AES_BLOCK_SIZE; in atmel_aes_gcm_crypt()
1698 ctx->is_aead = true; in atmel_aes_gcm_crypt()
1702 return -ENODEV; in atmel_aes_gcm_crypt()
1705 rctx->mode = AES_FLAGS_GCM | mode; in atmel_aes_gcm_crypt()
1707 return atmel_aes_handle_queue(dd, &req->base); in atmel_aes_gcm_crypt()
1718 return -EINVAL; in atmel_aes_gcm_setkey()
1720 memcpy(ctx->key, key, keylen); in atmel_aes_gcm_setkey()
1721 ctx->keylen = keylen; in atmel_aes_gcm_setkey()
1747 ctx->base.start = atmel_aes_gcm_start; in atmel_aes_gcm_init()
1763 .cra_driver_name = "atmel-gcm-aes",
1782 struct atmel_aes_xts_ctx *ctx = atmel_aes_xts_ctx_cast(dd->ctx); in atmel_aes_xts_start()
1783 struct skcipher_request *req = skcipher_request_cast(dd->areq); in atmel_aes_xts_start()
1794 /* Compute the tweak value from req->iv with ecb(aes). */ in atmel_aes_xts_start()
1795 flags = dd->flags; in atmel_aes_xts_start()
1796 dd->flags &= ~AES_FLAGS_MODE_MASK; in atmel_aes_xts_start()
1797 dd->flags |= (AES_FLAGS_ECB | AES_FLAGS_ENCRYPT); in atmel_aes_xts_start()
1799 ctx->key2, ctx->base.keylen); in atmel_aes_xts_start()
1800 dd->flags = flags; in atmel_aes_xts_start()
1802 atmel_aes_write_block(dd, AES_IDATAR(0), req->iv); in atmel_aes_xts_start()
1808 struct skcipher_request *req = skcipher_request_cast(dd->areq); in atmel_aes_xts_process_data()
1809 bool use_dma = (req->cryptlen >= ATMEL_AES_DMA_THRESHOLD); in atmel_aes_xts_process_data()
1823 u8 tmp = tweak_bytes[AES_BLOCK_SIZE - 1 - i]; in atmel_aes_xts_process_data()
1825 tweak_bytes[AES_BLOCK_SIZE - 1 - i] = tweak_bytes[i]; in atmel_aes_xts_process_data()
1834 return atmel_aes_dma_start(dd, req->src, req->dst, in atmel_aes_xts_process_data()
1835 req->cryptlen, in atmel_aes_xts_process_data()
1838 return atmel_aes_cpu_start(dd, req->src, req->dst, req->cryptlen, in atmel_aes_xts_process_data()
1852 memcpy(ctx->base.key, key, keylen/2); in atmel_aes_xts_setkey()
1853 memcpy(ctx->key2, key + keylen/2, keylen/2); in atmel_aes_xts_setkey()
1854 ctx->base.keylen = keylen/2; in atmel_aes_xts_setkey()
1874 ctx->base.start = atmel_aes_xts_start; in atmel_aes_xts_init_tfm()
1881 .base.cra_driver_name = "atmel-xts-aes",
1908 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_authenc_complete()
1911 if (err && (dd->flags & AES_FLAGS_OWN_SHA)) in atmel_aes_authenc_complete()
1912 atmel_sha_authenc_abort(&rctx->auth_req); in atmel_aes_authenc_complete()
1913 dd->flags &= ~AES_FLAGS_OWN_SHA; in atmel_aes_authenc_complete()
1918 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_authenc_start()
1924 atmel_aes_set_mode(dd, &rctx->base); in atmel_aes_authenc_start()
1930 return atmel_sha_authenc_schedule(&rctx->auth_req, ctx->auth, in atmel_aes_authenc_start()
1937 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_authenc_init()
1941 dd->is_async = true; in atmel_aes_authenc_init()
1946 dd->flags |= AES_FLAGS_OWN_SHA; in atmel_aes_authenc_init()
1949 return atmel_sha_authenc_init(&rctx->auth_req, in atmel_aes_authenc_init()
1950 req->src, req->assoclen, in atmel_aes_authenc_init()
1951 rctx->textlen, in atmel_aes_authenc_init()
1958 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_authenc_transfer()
1966 dd->is_async = true; in atmel_aes_authenc_transfer()
1970 /* Prepare src and dst scatter-lists to transfer cipher/plain texts. */ in atmel_aes_authenc_transfer()
1971 src = scatterwalk_ffwd(rctx->src, req->src, req->assoclen); in atmel_aes_authenc_transfer()
1974 if (req->src != req->dst) in atmel_aes_authenc_transfer()
1975 dst = scatterwalk_ffwd(rctx->dst, req->dst, req->assoclen); in atmel_aes_authenc_transfer()
1978 memcpy(iv, req->iv, sizeof(iv)); in atmel_aes_authenc_transfer()
1983 * not by the DMA) because we must force the AES_MR_SMOD bitfield to the in atmel_aes_authenc_transfer()
1994 return atmel_aes_dma_start(dd, src, dst, rctx->textlen, in atmel_aes_authenc_transfer()
2000 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_authenc_digest()
2004 dd->flags &= ~AES_FLAGS_OWN_SHA; in atmel_aes_authenc_digest()
2005 return atmel_sha_authenc_final(&rctx->auth_req, in atmel_aes_authenc_digest()
2006 rctx->digest, sizeof(rctx->digest), in atmel_aes_authenc_digest()
2013 struct aead_request *req = aead_request_cast(dd->areq); in atmel_aes_authenc_final()
2017 u32 idigest[SHA512_DIGEST_SIZE / sizeof(u32)], *odigest = rctx->digest; in atmel_aes_authenc_final()
2021 dd->is_async = true; in atmel_aes_authenc_final()
2025 offs = req->assoclen + rctx->textlen; in atmel_aes_authenc_final()
2028 scatterwalk_map_and_copy(odigest, req->dst, offs, authsize, 1); in atmel_aes_authenc_final()
2030 scatterwalk_map_and_copy(idigest, req->src, offs, authsize, 0); in atmel_aes_authenc_final()
2032 err = -EBADMSG; in atmel_aes_authenc_final()
2049 if (keys.enckeylen > sizeof(ctx->base.key)) in atmel_aes_authenc_setkey()
2053 err = atmel_sha_authenc_setkey(ctx->auth, in atmel_aes_authenc_setkey()
2062 ctx->base.keylen = keys.enckeylen; in atmel_aes_authenc_setkey()
2063 memcpy(ctx->base.key, keys.enckey, keys.enckeylen); in atmel_aes_authenc_setkey()
2070 return -EINVAL; in atmel_aes_authenc_setkey()
2079 ctx->auth = atmel_sha_authenc_spawn(auth_mode); in atmel_aes_authenc_init_tfm()
2080 if (IS_ERR(ctx->auth)) in atmel_aes_authenc_init_tfm()
2081 return PTR_ERR(ctx->auth); in atmel_aes_authenc_init_tfm()
2085 ctx->base.start = atmel_aes_authenc_start; in atmel_aes_authenc_init_tfm()
2119 atmel_sha_authenc_free(ctx->auth); in atmel_aes_authenc_exit_tfm()
2133 if (!enc && req->cryptlen < authsize) in atmel_aes_authenc_crypt()
2134 return -EINVAL; in atmel_aes_authenc_crypt()
2135 rctx->textlen = req->cryptlen - (enc ? 0 : authsize); in atmel_aes_authenc_crypt()
2139 * the SHA auto-padding can be used only on non-empty messages. in atmel_aes_authenc_crypt()
2142 if (!rctx->textlen && !req->assoclen) in atmel_aes_authenc_crypt()
2143 return -EINVAL; in atmel_aes_authenc_crypt()
2145 rctx->base.mode = mode; in atmel_aes_authenc_crypt()
2146 ctx->block_size = AES_BLOCK_SIZE; in atmel_aes_authenc_crypt()
2147 ctx->is_aead = true; in atmel_aes_authenc_crypt()
2151 return -ENODEV; in atmel_aes_authenc_crypt()
2153 return atmel_aes_handle_queue(dd, &req->base); in atmel_aes_authenc_crypt()
2178 .cra_driver_name = "atmel-authenc-hmac-sha1-cbc-aes",
2194 .cra_driver_name = "atmel-authenc-hmac-sha224-cbc-aes",
2210 .cra_driver_name = "atmel-authenc-hmac-sha256-cbc-aes",
2226 .cra_driver_name = "atmel-authenc-hmac-sha384-cbc-aes",
2242 .cra_driver_name = "atmel-authenc-hmac-sha512-cbc-aes",
2254 dd->buf = (void *)__get_free_pages(GFP_KERNEL, ATMEL_AES_BUFFER_ORDER); in atmel_aes_buff_init()
2255 dd->buflen = ATMEL_AES_BUFFER_SIZE; in atmel_aes_buff_init()
2256 dd->buflen &= ~(AES_BLOCK_SIZE - 1); in atmel_aes_buff_init()
2258 if (!dd->buf) { in atmel_aes_buff_init()
2259 dev_err(dd->dev, "unable to alloc pages.\n"); in atmel_aes_buff_init()
2260 return -ENOMEM; in atmel_aes_buff_init()
2268 free_page((unsigned long)dd->buf); in atmel_aes_buff_cleanup()
2275 /* Try to grab 2 DMA channels */ in atmel_aes_dma_init()
2276 dd->src.chan = dma_request_chan(dd->dev, "tx"); in atmel_aes_dma_init()
2277 if (IS_ERR(dd->src.chan)) { in atmel_aes_dma_init()
2278 ret = PTR_ERR(dd->src.chan); in atmel_aes_dma_init()
2282 dd->dst.chan = dma_request_chan(dd->dev, "rx"); in atmel_aes_dma_init()
2283 if (IS_ERR(dd->dst.chan)) { in atmel_aes_dma_init()
2284 ret = PTR_ERR(dd->dst.chan); in atmel_aes_dma_init()
2291 dma_release_channel(dd->src.chan); in atmel_aes_dma_init()
2293 dev_err(dd->dev, "no DMA channel available\n"); in atmel_aes_dma_init()
2299 dma_release_channel(dd->dst.chan); in atmel_aes_dma_cleanup()
2300 dma_release_channel(dd->src.chan); in atmel_aes_dma_cleanup()
2314 dd->is_async = true; in atmel_aes_done_task()
2315 (void)dd->resume(dd); in atmel_aes_done_task()
2326 if (AES_FLAGS_BUSY & aes_dd->flags) in atmel_aes_irq()
2327 tasklet_schedule(&aes_dd->done_task); in atmel_aes_irq()
2329 dev_warn(aes_dd->dev, "AES interrupt when no active requests.\n"); in atmel_aes_irq()
2341 if (dd->caps.has_authenc) in atmel_aes_unregister_algs()
2346 if (dd->caps.has_xts) in atmel_aes_unregister_algs()
2349 if (dd->caps.has_gcm) in atmel_aes_unregister_algs()
2352 if (dd->caps.has_cfb64) in atmel_aes_unregister_algs()
2361 alg->cra_flags = CRYPTO_ALG_ASYNC; in atmel_aes_crypto_alg_init()
2362 alg->cra_alignmask = 0xf; in atmel_aes_crypto_alg_init()
2363 alg->cra_priority = ATMEL_AES_PRIORITY; in atmel_aes_crypto_alg_init()
2364 alg->cra_module = THIS_MODULE; in atmel_aes_crypto_alg_init()
2379 if (dd->caps.has_cfb64) { in atmel_aes_register_algs()
2387 if (dd->caps.has_gcm) { in atmel_aes_register_algs()
2395 if (dd->caps.has_xts) { in atmel_aes_register_algs()
2404 if (dd->caps.has_authenc) { in atmel_aes_register_algs()
2439 dd->caps.has_dualbuff = 0; in atmel_aes_get_cap()
2440 dd->caps.has_cfb64 = 0; in atmel_aes_get_cap()
2441 dd->caps.has_gcm = 0; in atmel_aes_get_cap()
2442 dd->caps.has_xts = 0; in atmel_aes_get_cap()
2443 dd->caps.has_authenc = 0; in atmel_aes_get_cap()
2444 dd->caps.max_burst_size = 1; in atmel_aes_get_cap()
2447 switch (dd->hw_version & 0xff0) { in atmel_aes_get_cap()
2449 dd->caps.has_dualbuff = 1; in atmel_aes_get_cap()
2450 dd->caps.has_cfb64 = 1; in atmel_aes_get_cap()
2451 dd->caps.has_gcm = 1; in atmel_aes_get_cap()
2452 dd->caps.has_xts = 1; in atmel_aes_get_cap()
2453 dd->caps.has_authenc = 1; in atmel_aes_get_cap()
2454 dd->caps.max_burst_size = 4; in atmel_aes_get_cap()
2457 dd->caps.has_dualbuff = 1; in atmel_aes_get_cap()
2458 dd->caps.has_cfb64 = 1; in atmel_aes_get_cap()
2459 dd->caps.has_gcm = 1; in atmel_aes_get_cap()
2460 dd->caps.max_burst_size = 4; in atmel_aes_get_cap()
2463 dd->caps.has_dualbuff = 1; in atmel_aes_get_cap()
2464 dd->caps.has_cfb64 = 1; in atmel_aes_get_cap()
2465 dd->caps.max_burst_size = 4; in atmel_aes_get_cap()
2470 dev_warn(dd->dev, in atmel_aes_get_cap()
2478 { .compatible = "atmel,at91sam9g46-aes" },
2487 struct device *dev = &pdev->dev; in atmel_aes_probe()
2491 aes_dd = devm_kzalloc(&pdev->dev, sizeof(*aes_dd), GFP_KERNEL); in atmel_aes_probe()
2493 return -ENOMEM; in atmel_aes_probe()
2495 aes_dd->dev = dev; in atmel_aes_probe()
2499 INIT_LIST_HEAD(&aes_dd->list); in atmel_aes_probe()
2500 spin_lock_init(&aes_dd->lock); in atmel_aes_probe()
2502 tasklet_init(&aes_dd->done_task, atmel_aes_done_task, in atmel_aes_probe()
2504 tasklet_init(&aes_dd->queue_task, atmel_aes_queue_task, in atmel_aes_probe()
2507 crypto_init_queue(&aes_dd->queue, ATMEL_AES_QUEUE_LENGTH); in atmel_aes_probe()
2513 err = -ENODEV; in atmel_aes_probe()
2516 aes_dd->phys_base = aes_res->start; in atmel_aes_probe()
2519 aes_dd->irq = platform_get_irq(pdev, 0); in atmel_aes_probe()
2520 if (aes_dd->irq < 0) { in atmel_aes_probe()
2521 err = aes_dd->irq; in atmel_aes_probe()
2525 err = devm_request_irq(&pdev->dev, aes_dd->irq, atmel_aes_irq, in atmel_aes_probe()
2526 IRQF_SHARED, "atmel-aes", aes_dd); in atmel_aes_probe()
2533 aes_dd->iclk = devm_clk_get(&pdev->dev, "aes_clk"); in atmel_aes_probe()
2534 if (IS_ERR(aes_dd->iclk)) { in atmel_aes_probe()
2536 err = PTR_ERR(aes_dd->iclk); in atmel_aes_probe()
2540 aes_dd->io_base = devm_ioremap_resource(&pdev->dev, aes_res); in atmel_aes_probe()
2541 if (IS_ERR(aes_dd->io_base)) { in atmel_aes_probe()
2543 err = PTR_ERR(aes_dd->io_base); in atmel_aes_probe()
2547 err = clk_prepare(aes_dd->iclk); in atmel_aes_probe()
2558 if (aes_dd->caps.has_authenc && !atmel_sha_authenc_is_ready()) { in atmel_aes_probe()
2559 err = -EPROBE_DEFER; in atmel_aes_probe()
2573 list_add_tail(&aes_dd->list, &atmel_aes.dev_list); in atmel_aes_probe()
2580 dev_info(dev, "Atmel AES - Using %s, %s for DMA transfers\n", in atmel_aes_probe()
2581 dma_chan_name(aes_dd->src.chan), in atmel_aes_probe()
2582 dma_chan_name(aes_dd->dst.chan)); in atmel_aes_probe()
2588 list_del(&aes_dd->list); in atmel_aes_probe()
2594 clk_unprepare(aes_dd->iclk); in atmel_aes_probe()
2596 tasklet_kill(&aes_dd->done_task); in atmel_aes_probe()
2597 tasklet_kill(&aes_dd->queue_task); in atmel_aes_probe()
2608 return -ENODEV; in atmel_aes_remove()
2610 list_del(&aes_dd->list); in atmel_aes_remove()
2615 tasklet_kill(&aes_dd->done_task); in atmel_aes_remove()
2616 tasklet_kill(&aes_dd->queue_task); in atmel_aes_remove()
2621 clk_unprepare(aes_dd->iclk); in atmel_aes_remove()
2639 MODULE_AUTHOR("Nicolas Royer - Eukréa Electromatique");