/kvm-unit-tests/arm/ |
H A D | cstart.S | 74 /* set up vector table, mode stacks, and enable the VFP */ 265 .macro set_mode_stack mode, stack 267 msr cpsr_c, #(\mode | PSR_I_BIT | PSR_F_BIT) 288 * The first frame is reserved for svc mode 295 msr cpsr_cxsf, r2 @ back to svc mode 304 * Each mode has an S_FRAME_SIZE sized memory region, 305 * and the mode's stack pointer has been initialized 308 .macro vector_stub, name, vec, mode, correction=0 324 /* Prepare for SVC32 mode. */ 330 /* Branch to handler in SVC mode */ [all …]
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H A D | unittests.cfg | 21 # Test vector setup and exception handling (kernel mode). 27 # Test vector setup and exception handling (user mode).
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/kvm-unit-tests/s390x/ |
H A D | cstart64.S | 23 * For KVM and TCG kernel boot we are in 64 bit z/Arch mode. 24 * When booting from disk the initial short psw is in 31 bit mode. 25 * When running under LPAR or z/VM, we might start in 31 bit and esam mode. 29 /* Switch to z/Architecture mode and 64-bit */ 31 lhi %r1, 2 # mode 2 = esame 37 sam64 # Set addressing mode to 64 bit
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/kvm-unit-tests/x86/ |
H A D | apic.c | 157 report(is_xapic_enabled(), "Local apic enabled in xAPIC mode"); in test_apic_disable() 166 report(is_x2apic_enabled(), "Local apic enabled in x2APIC mode"); in test_apic_disable() 286 /* Reset to xAPIC mode. */ in test_self_ipi_xapic() 288 report(is_xapic_enabled(), "Local apic enabled in xAPIC mode"); in test_self_ipi_xapic() 302 report(is_x2apic_enabled(), "Local apic enabled in x2APIC mode"); in test_self_ipi_x2apic() 487 /* One shot mode */ in test_apic_timer_one_shot() 598 printf("starting apic change mode\n"); in test_apic_change_mode() 615 * Write TMICT before changing mode from one-shot to periodic TMCCT should in test_apic_change_mode() 624 * After the change of mode, the counter should not be reset and continue in test_apic_change_mode() 640 * Keep the same TMICT and change timer mode to one-shot in test_apic_change_mode() [all …]
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H A D | hyperv_stimer.c | 128 report(false, "VMBus message in direct mode received"); in process_stimer_msg() 348 /* Skipping msg slot busy test in direct mode */ in stimer_test_one_shot_busy() 425 printf("Starting Hyper-V SynIC timers tests: message mode\n"); in stimer_test_all() 434 printf("Starting Hyper-V SynIC timers tests: direct mode\n"); in stimer_test_all() 465 report_skip("Hyper-V SinIC timer direct mode is not supported"); in main()
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H A D | access_test.c | 16 * level page table requires entering real mode. in main()
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H A D | vmware_backdoors.c | 132 * from User Mode 163 /* Disable Permission to run rdpmc from user mode */ in check_vmware_backdoors()
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H A D | README | 4 The infrastructure initialize the system/cpus, switches to long-mode, and
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H A D | trampolines.S | 47 * address. In 64-bit mode, RIP-relative addressing neatly solves the problem,
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/kvm-unit-tests/lib/x86/ |
H A D | usermode.c | 61 /* IRET into user mode */ in run_in_user() 80 /* Call user mode function */ in run_in_user() 97 /* Kernel Mode */ in run_in_user()
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H A D | apic.c | 260 void apic_setup_timer(int vector, u32 mode) in apic_setup_timer() argument 264 assert((mode & APIC_LVT_TIMER_MASK) == mode); in apic_setup_timer() 267 apic_write(APIC_LVTT, vector | mode); in apic_setup_timer()
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H A D | msr.h | 8 #define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ 9 #define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ 10 #define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ 19 #define _EFER_LME 8 /* Long mode enable */ 20 #define _EFER_LMA 10 /* Long mode active (read-only) */ 23 #define _EFER_LMSLE 13 /* Long Mode Segment Limit Enable */
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H A D | usermode.h | 19 * Run function in user mode
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H A D | intel-iommu.c | 57 uint32_t dest_mode:1; /* Destination Mode */ 59 uint32_t trigger_mode:1; /* Trigger Mode */ 60 uint32_t delivery_mode:3; /* Delivery Mode */ 63 uint32_t irte_mode:1; /* IRTE Mode */
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H A D | smp.c | 215 * 16-bit mode, the relocated address of ap_rm_gdt_descr needs to be stored at in setup_rm_gdt() 231 * at runtime, and rip-relative addressing is not supported in 16-bit mode. This in setup_rm_gdt() 248 * This layout is only used for reaching 32-bit mode. APs load a 64-bit GDT in setup_rm_gdt()
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H A D | apic.h | 65 void apic_setup_timer(int vector, u32 mode);
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/kvm-unit-tests/lib/powerpc/asm/ |
H A D | reg.h | 52 #define MSR_HV_BIT 60 /* Hypervisor mode */ 53 #define MSR_SF_BIT 63 /* 64-bit mode */
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H A D | processor.h | 83 * mode. False on pseries / PAPR machines that run in guest mode.
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/kvm-unit-tests/powerpc/ |
H A D | emulator.c | 107 * mode, but to be able to check this, we also have to specify the in test_lswi() 109 * "lswi" when compiling in little endian mode. in test_lswi() 234 * For lswx in little-endian mode, an alignment interrupt always occurs. 254 * mode, but to be able to check this, we also have to specify the in test_lswx() 256 * "lswx" when compiling in little endian mode. in test_lswx()
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/kvm-unit-tests/lib/riscv/asm/ |
H A D | mmu.h | 21 void mmu_enable(unsigned long mode, pgd_t *pgtable);
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/kvm-unit-tests/lib/s390x/ |
H A D | interrupt.c | 109 * irq_set_dat_mode - Set the DAT mode of all interrupt handlers, except for 112 * @as: specifies the address space mode to use. Not set if use_dat is false. 114 * This will update the DAT mode and address space mode of all interrupt new
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/kvm-unit-tests/lib/ppc64/ |
H A D | opal-calls.S | 28 /* switch to BE and real-mode when we enter OPAL */
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/kvm-unit-tests/lib/ |
H A D | migrate.c | 48 * When the test has been started in migration mode, but the test case is
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/kvm-unit-tests/riscv/ |
H A D | sbi-fwft.c | 206 * Even though the SBI delegated the misaligned exception to S-mode, it might not trap on in fwft_check_misaligned_exc_deleg() 210 report_skip("Misaligned load exception does not trap in S-mode"); in fwft_check_misaligned_exc_deleg() 212 report_pass("Misaligned load exception trap in S-mode"); in fwft_check_misaligned_exc_deleg()
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/kvm-unit-tests/lib/riscv/ |
H A D | mmu.c | 119 void mmu_enable(unsigned long mode, pgd_t *pgtable) in mmu_enable() argument 122 unsigned long satp = mode | ppn; in mmu_enable()
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