Merge tag 'kvm-x86-2025.02.21' of https://github.com/kvm-x86/kvm-unit-tests into HEAD

KVM-Unit-Tests x86 changes:

- Expand the per-CPU data+stack area to 12KiB per CPU to reduce the
probability

Merge tag 'kvm-x86-2025.02.21' of https://github.com/kvm-x86/kvm-unit-tests into HEAD

KVM-Unit-Tests x86 changes:

- Expand the per-CPU data+stack area to 12KiB per CPU to reduce the
probability of tests overflowing their stack and clobbering pre-CPU
data.

- Add testcases for LA57 canonical checks.

- Add testcases for LAM.

- Add a smoke test to make sure KVM doesn't bleed split-lock #AC/#DB into
the guest.

- Fix many warts and bugs in the PMU test, and prepare it for PMU version 5
and beyond.

- Many misc fixes and cleanups.

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x86: Add a macro for the size of the per-CPU stack/data area

Add a macro to define the size of the per-CPU stack/data area so that it's
somewhat possible to make sense of the madness.

Link: https:/

x86: Add a macro for the size of the per-CPU stack/data area

Add a macro to define the size of the per-CPU stack/data area so that it's
somewhat possible to make sense of the madness.

Link: https://lore.kernel.org/r/20250215012032.1206409-3-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

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Merge tag 'kvm-x86-2023.09.01' of https://github.com/kvm-x86/kvm-unit-tests into HEAD

x86 fixes, cleanups, and new testcases, and a few generic changes

- Fix a bug in runtime.bash that caused it t

Merge tag 'kvm-x86-2023.09.01' of https://github.com/kvm-x86/kvm-unit-tests into HEAD

x86 fixes, cleanups, and new testcases, and a few generic changes

- Fix a bug in runtime.bash that caused it to mishandle "check" strings with
multiple entries, e.g. a test that depends on multiple module params
- Make the PMU tests depend on vPMU support being enabled in KVM
- Fix PMU's forced emulation test on CPUs with full-width writes
- Add a PMU testcase for measuring TSX transactional cycles
- Nested SVM testcase for virtual NMIs
- Move a pile of code to ASM_TRY() and "safe" helpers
- Set up the guest stack in the LBRV tests so that the tests don't fail if the
compiler decides to generate function calls in guest code
- Ignore the "mispredict" flag in nSVM's LBRV tests to fix false failures
- Clean up usage of helpers that disable interrupts, e.g. stop inserting
unnecessary nops
- Add helpers to dedup code for programming the APIC timer
- Fix a variety of bugs in nVMX testcases related to being a 64-bit host

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x86: replace irq_{enable|disable}() with sti()/cli()

This removes a layer of indirection which is strictly
speaking not needed since its x86 code anyway.

Signed-off-by: Maxim Levitsky <mlevitsk@red

x86: replace irq_{enable|disable}() with sti()/cli()

This removes a layer of indirection which is strictly
speaking not needed since its x86 code anyway.

Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Link: https://lore.kernel.org/r/20221122161152.293072-2-mlevitsk@redhat.com
[sean: move and reword IRQ shadow to be above and about safe_halt()]
Signed-off-by: Sean Christopherson <seanjc@google.com>

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x86: smp: fix 32-bit build

On macOS the 32-bit build gives the following warning:

lib/x86/smp.c:89:29: error: format '%d' expects argument of type 'int', but argument 2 has type 'uint32_t' {aka 'lo

x86: smp: fix 32-bit build

On macOS the 32-bit build gives the following warning:

lib/x86/smp.c:89:29: error: format '%d' expects argument of type 'int', but argument 2 has type 'uint32_t' {aka 'long unsigned int'} [-Werror=format=]
89 | printf("setup: CPU %d online\n", apic_id());
| ~^ ~~~~~~~~~
| | |
| int uint32_t {aka long unsigned int}
| %ld

Fix by using the inttypes.h printf formats.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Merge tag 'for_paolo' of https://github.com/sean-jc/kvm-unit-tests into HEAD

x86 fixes, cleanups, and new sub-tests:

- Bug fix for the VMX-preemption timer expiration test
- Refactor SVM tests

Merge tag 'for_paolo' of https://github.com/sean-jc/kvm-unit-tests into HEAD

x86 fixes, cleanups, and new sub-tests:

- Bug fix for the VMX-preemption timer expiration test
- Refactor SVM tests to split out NPT tests
- Add tests for MCE banks to MSR test
- Add SMP Support for x86 UEFI tests
- x86: nVMX: Add VMXON #UD test (and exception cleanup)
- PMU cleanup and related nVMX bug fixes

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x86: Add ap_online() to consolidate final "AP is alive!" code

Add ap_online() to consolidate the last stage of onlining an AP CPU.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Link: https

x86: Add ap_online() to consolidate final "AP is alive!" code

Add ap_online() to consolidate the last stage of onlining an AP CPU.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/r/20220615232943.1465490-14-seanjc@google.com

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x86: Rename ap_init() to bringup_aps()

Rename the helper that wakes and waits for APs to bringup_aps(), ap_init()
is terribly confusing because it's called from the BSP, not APs.

Signed-off-by: Sea

x86: Rename ap_init() to bringup_aps()

Rename the helper that wakes and waits for APs to bringup_aps(), ap_init()
is terribly confusing because it's called from the BSP, not APs.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/r/20220615232943.1465490-13-seanjc@google.com

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x86: Provide a common 64-bit AP entrypoint for EFI and non-EFI

ap_start64() currently serves as the 64-bit entrypoint for non-EFI
tests.

Having ap_start64() and save_id() written in asm prevents sh

x86: Provide a common 64-bit AP entrypoint for EFI and non-EFI

ap_start64() currently serves as the 64-bit entrypoint for non-EFI
tests.

Having ap_start64() and save_id() written in asm prevents sharing these
routines between EFI and non-EFI tests.

Rewrite them in C and use ap_start64 as the 64-bit entrypoint in the EFI
boot flow.

With this, EFI tests support -smp > 1. smptest.efi now passes.

Cc: Andrew Jones <drjones@redhat.com>
Cc: Marc Orr <marcorr@google.com>
Cc: Zixuan Wang <zxwang42@gmail.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: David Rientjes <rientjes@google.com>
Cc: Thomas.Lendacky@amd.com
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Signed-off-by: Varad Gautam <varad.gautam@suse.com>
[sean: reset APIC before TSS setup, halt in AP wait loop, add comment]
Signed-off-by: Sean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/r/20220615232943.1465490-12-seanjc@google.com

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x86: efi, smp: Transition APs from 16-bit to 32-bit mode

Sending INIT/SIPI to APs from ap_init() resets them into 16-bit mode
to loop into sipi_entry().

To drive the APs into 32-bit mode, the SIPI

x86: efi, smp: Transition APs from 16-bit to 32-bit mode

Sending INIT/SIPI to APs from ap_init() resets them into 16-bit mode
to loop into sipi_entry().

To drive the APs into 32-bit mode, the SIPI vector needs:
1. A GDT descriptor reachable from 16-bit code (gdt32_descr).
2. A 32-bit entrypoint reachable from 16-bit code (ap_start32).
3. The locations of GDT and the 32-bit entrypoint.

Setting these up at compile time (like on non-EFI builds) is not
possible since EFI builds with -shared -fPIC and efistart64.S cannot
reference any absolute addresses.

Relative addressing is unavailable on 16-bit mode.

Moreover, EFI may not load the 32-bit entrypoint to be reachable from
16-bit mode.

To overcome these problems,
1. Fill the GDT descriptor at runtime after relocating
[sipi_entry-sipi_end] to lowmem. Since sipi_entry does not know the
address of this descriptor, use the last two bytes of SIPI page to
communicate it.
2. Place a call gate in the GDT to point to ap_start32.
3. Popluate sipi_entry() to lcall to ap_start32.

With this, the APs can transition to 32-bit mode and loop at a known
location.

Signed-off-by: Varad Gautam <varad.gautam@suse.com>
Co-developed-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/r/20220615232943.1465490-11-seanjc@google.com

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x86: efi: Provide percpu storage

UEFI tests do not update MSR_GS_BASE during bringup, and continue
using the GS_BASE set up by the UEFI implementation for percpu
storage.

Update this MSR during set

x86: efi: Provide percpu storage

UEFI tests do not update MSR_GS_BASE during bringup, and continue
using the GS_BASE set up by the UEFI implementation for percpu
storage.

Update this MSR during setup_segments64() to allow storing percpu
data at a sane location reserved by the testcase, and ensure that
this happens before any operation that ends up storing to the percpu
space.

Since apic_ops (touched by reset_apic()) is percpu, move reset_apic()
to happen after setup_gdt_tss(); pre_boot_apic_id() works with either
xAPIC or x2APIC, so it's not necessary to put the APIC back into xAPIC]
mode prior to configuring the per-vCPU TSS, GS.base, etc...

With this, ap_init() can now use percpu apic_ops via apic_icr_write().

Signed-off-by: Varad Gautam <varad.gautam@suse.com>
[sean: add comment to call out GS.base dependency]
Signed-off-by: Sean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/r/20220615232943.1465490-9-seanjc@google.com

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x86: Move ap_init() to smp.c

ap_init() copies the SIPI vector to lowmem, sends INIT/SIPI to APs
and waits on the APs to come up.

Port this routine to C from asm and move it to smp.c to allow sharin

x86: Move ap_init() to smp.c

ap_init() copies the SIPI vector to lowmem, sends INIT/SIPI to APs
and waits on the APs to come up.

Port this routine to C from asm and move it to smp.c to allow sharing
this functionality between the EFI (-fPIC) and non-EFI builds.

Call ap_init() from the EFI setup path to reset the APs to a known
location.

Signed-off-by: Varad Gautam <varad.gautam@suse.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/r/20220615232943.1465490-4-seanjc@google.com

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x86: Add proper helpers for per-cpu reads/writes

Add helpers to read/write per-cpu data instead of open coding access
with gs: and magic numbers. Keeping track of what offsets are used for
what and

x86: Add proper helpers for per-cpu reads/writes

Add helpers to read/write per-cpu data instead of open coding access
with gs: and magic numbers. Keeping track of what offsets are used for
what and by whom is a nightmare.

No functional change intended.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220121231852.1439917-6-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: smp: Replace spaces with tabs

Replace spaces with tabs in smp.c, and opportunistically clean up a
handful of minor coding style violations.

No functional change intended.

Signed-off-by: Sean

x86: smp: Replace spaces with tabs

Replace spaces with tabs in smp.c, and opportunistically clean up a
handful of minor coding style violations.

No functional change intended.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220121231852.1439917-4-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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VMX: use xAPIC mode on all processors

Results are undefined if xAPIC/x2APIC mode is not homogeneous on all processors.
So far things seemed to have mostly worked, but if you end up calling xapic_icr

VMX: use xAPIC mode on all processors

Results are undefined if xAPIC/x2APIC mode is not homogeneous on all processors.
So far things seemed to have mostly worked, but if you end up calling xapic_icr_write
from an x2APIC-mode processor the write is eaten and the IPI is not delivered.

Reported-by: Cathy Avery <cavery@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: Declare online_cpus based on MAX_TEST_CPUS

Declare online_cpus so that it is properly sized to have MAX_TEST_CPUS
bits. Currently, online_cpus is hardcoded to a u64, i.e. changing
MAX_TEST_CPU

x86: Declare online_cpus based on MAX_TEST_CPUS

Declare online_cpus so that it is properly sized to have MAX_TEST_CPUS
bits. Currently, online_cpus is hardcoded to a u64, i.e. changing
MAX_TEST_CPUS to be greater than 64 will result in a variety of out of
bounds accesses.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86: APIC IDs might not be consecutive

APIC IDs do not have to be consecutive. Crease a map between logical CPU
identifiers and the physical APIC IDs for this matter and add a level of
indirection.

x86: APIC IDs might not be consecutive

APIC IDs do not have to be consecutive. Crease a map between logical CPU
identifiers and the physical APIC IDs for this matter and add a level of
indirection.

During boot, save in a bitmap the APIC IDs of the enabled CPU and use it
later when sending IPIs.

Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Make remaining x86 code compilable with -Wstrict-prototypes

This way the functions can not be called anymore with arbitrary
parameters by accident.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Mes

Make remaining x86 code compilable with -Wstrict-prototypes

This way the functions can not be called anymore with arbitrary
parameters by accident.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <1530086528-21665-4-git-send-email-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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lib/x86/smp: introduce on_cpus and cpus_active

Signed-off-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>

x86: use asm-generic spinlock

Signed-off-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>

lib/x86/smp: Fix compiler warnings

Add missing include of desc.h for prototypes of setup_idt and
set_idt_entry and fix the declaration of ipi_data - the pointer is
volatile, not the pointed-to datum

lib/x86/smp: Fix compiler warnings

Add missing include of desc.h for prototypes of setup_idt and
set_idt_entry and fix the declaration of ipi_data - the pointer is
volatile, not the pointed-to datum.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
[Correct the fix for ipi_data. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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x86/smp: use desc.c for setting up IPI handler

This allows other callers to use desc.c without conflict. Fixes
apic.flat failure with -smp 2.

Signed-off-by: Avi Kivity <avi@redhat.com>

Fix volatile qualifer on function pointer

It's a volatile pointer to a function returning void, not
a pointer to a function returning volatile void.

Signed-off-by: Avi Kivity <avi@redhat.com>

smp: speed up cpu_count()

cpu_count() is used in important places, like vmexit.flat's measuring
loop, yet it is ridiculously slow as it talks to the firmware config
interface.

Speed it up by readin

smp: speed up cpu_count()

cpu_count() is used in important places, like vmexit.flat's measuring
loop, yet it is ridiculously slow as it talks to the firmware config
interface.

Speed it up by reading the value from memory.

Signed-off-by: Avi Kivity <avi@redhat.com>

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smp: fix race in async on_cpu()

We fire off the IPI, but don't wait for the other cpu to pickk up
the function and data before returning.

Fix by making the other cpu ACK the receipt of the IPI (but

smp: fix race in async on_cpu()

We fire off the IPI, but don't wait for the other cpu to pickk up
the function and data before returning.

Fix by making the other cpu ACK the receipt of the IPI (but still
execute the result asynchrously).

Signed-off-by: Avi Kivity <avi@redhat.com>

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