Merge branch 'riscv/sbi' into 'master'

Mainly riscv stuff, but also limits.h and pseudo random numbers

See merge request kvm-unit-tests/kvm-unit-tests!65

riscv: mmu: Ensure order of PTE update and sfence

Use WRITE_ONCE to ensure the compiler won't order the page table
write after the TLB flush.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

riscv: Define and use PHYS_PAGE_MASK

C doesn't extend the sign bit for unsigned types since there isn't a
sign bit to extend. This means a promotion of a u32 to a u64 results
in the upper 32 bits of

riscv: Define and use PHYS_PAGE_MASK

C doesn't extend the sign bit for unsigned types since there isn't a
sign bit to extend. This means a promotion of a u32 to a u64 results
in the upper 32 bits of the u64 being zero. When the u64 is then used
as a mask on another u64 the upper 32 bits get cleared, and that's
definitely not the intention of 'phys_addr & PAGE_MASK', which should
only clear the lower bits for page alignment. Create PHYS_PAGE_MASK
to do the right thing.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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riscv: mmu: Sanity check input physical addresses

Ensure physical addresses aren't using bits they shouldn't be.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

riscv: Support up to 34-bit physical addresses on rv32, sort of

Change virt_to_phys() and phys_to_virt() to use phys_addr_t instead
of unsigned long. This allows 32-bit builds to use physical addres

riscv: Support up to 34-bit physical addresses on rv32, sort of

Change virt_to_phys() and phys_to_virt() to use phys_addr_t instead
of unsigned long. This allows 32-bit builds to use physical addresses
over 32 bits wide (the spec allows up to 34 bits). But, to keep
things simple, we don't expect physical addresses wider than 32 bits
in most the library code (and that's ensured by sprinkling around
some asserts). IOW, the support is really only for unit tests which
want to test with an additional high memory region.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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riscv: Fix virt_to_phys again

The last fix was a bit hasty since we didn't double check that
virt_to_phys() was the right place for the fix, rather than
virt_to_pte_phys(), and of course it was the

riscv: Fix virt_to_phys again

The last fix was a bit hasty since we didn't double check that
virt_to_phys() was the right place for the fix, rather than
virt_to_pte_phys(), and of course it was the latter... All
architectures add on the offset in virt_to_pte_phys() and then
simply wrap virt_to_pte_phys() with virt_to_phys(), if they
implement virt_to_phys() at all. RISCV shouldn't be different.

Fixes: e1dd4ea76894 ("riscv: Fix virt_to_phys")
Fixes: 23100d972705 ("riscv: Enable vmalloc")
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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Merge branch 'riscv/queue' into 'master'

riscv: Fix virt_to_phys

See merge request kvm-unit-tests/kvm-unit-tests!63

riscv: Fix virt_to_phys

After translating a virtual page address to a physical page address,
virt_to_phys() needs to tack the page offset of the original virtual
address back on to complete the tran

riscv: Fix virt_to_phys

After translating a virtual page address to a physical page address,
virt_to_phys() needs to tack the page offset of the original virtual
address back on to complete the translation.

Fixes: 23100d972705 ("riscv: Enable vmalloc")
Signed-off-by: Cade Richard <cade.richard@berkeley.edu>
[Added commit message, Fixes tag, and offset_in_page()]
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>

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Merge branch 'riscv/initial-port-v3' into 'master'

riscv: Initial port

See merge request kvm-unit-tests/kvm-unit-tests!50

riscv: Enable vmalloc

Implement the functions that vmalloc depends on and let it enable the
MMU through setup_vm(). We can now also run the sieve test, so we
add it as well.

Signed-off-by: Andrew J

riscv: Enable vmalloc

Implement the functions that vmalloc depends on and let it enable the
MMU through setup_vm(). We can now also run the sieve test, so we
add it as well.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Acked-by: Thomas Huth <thuth@redhat.com>

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riscv: Add MMU support

Add minimal page table defines and functions in order to build page
tables and enable the MMU.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Acked-by: Thomas Huth <thu

riscv: Add MMU support

Add minimal page table defines and functions in order to build page
tables and enable the MMU.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Acked-by: Thomas Huth <thuth@redhat.com>

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