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/linux-6.15/Documentation/devicetree/bindings/clock/
Dqcom,sar2130p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sar2130p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on sar2130p
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14 power domains on sar2130p.
16 See also: include/dt-bindings/clock/qcom,sar2130p-gcc.h
20 const: qcom,sar2130p-gcc
24 - description: XO reference clock
[all …]
Dqcom,sm8450-gpucc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Konrad Dybcio <konradybcio@kernel.org>
17 include/dt-bindings/clock/qcom,sar2130p-gpucc.h
18 include/dt-bindings/clock/qcom,sm4450-gpucc.h
19 include/dt-bindings/clock/qcom,sm8450-gpucc.h
20 include/dt-bindings/clock/qcom,sm8550-gpucc.h
21 include/dt-bindings/reset/qcom,sm8450-gpucc.h
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Dqcom,sm8550-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Neil Armstrong <neil.armstrong@linaro.org>
18 - include/dt-bindings/clock/qcom,sm8550-dispcc.h
19 - include/dt-bindings/clock/qcom,sm8650-dispcc.h
20 - include/dt-bindings/clock/qcom,sm8750-dispcc.h
21 - include/dt-bindings/clock/qcom,x1e80100-dispcc.h
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Dqcom,rpmhcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,qcs615-rpmh-clk
21 - qcom,qdu1000-rpmh-clk
22 - qcom,sa8775p-rpmh-clk
23 - qcom,sar2130p-rpmh-clk
24 - qcom,sc7180-rpmh-clk
25 - qcom,sc7280-rpmh-clk
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/linux-6.15/arch/arm64/boot/dts/qcom/
Dsar2130p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sar2130p-gcc.h>
8 #include <dt-bindings/clock/qcom,sar2130p-gpucc.h>
9 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,sar2130p-rpmh.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
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/linux-6.15/Documentation/devicetree/bindings/phy/
Dqcom,sc8280xp-qmp-usb43dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,sar2130p-qmp-usb3-dp-phy
20 - qcom,sc7180-qmp-usb3-dp-phy
21 - qcom,sc7280-qmp-usb3-dp-phy
22 - qcom,sc8180x-qmp-usb3-dp-phy
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Dqcom,sc8280xp-qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,qcs615-qmp-gen3x1-pcie-phy
20 - qcom,qcs8300-qmp-gen4x2-pcie-phy
21 - qcom,sa8775p-qmp-gen4x2-pcie-phy
22 - qcom,sa8775p-qmp-gen4x4-pcie-phy
23 - qcom,sar2130p-qmp-gen3x2-pcie-phy
[all …]
Dqcom,snps-eusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Abel Vesa <abel.vesa@linaro.org>
18 - items:
19 - enum:
20 - qcom,sar2130p-snps-eusb2-phy
21 - qcom,sdx75-snps-eusb2-phy
22 - qcom,sm8650-snps-eusb2-phy
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/linux-6.15/Documentation/devicetree/bindings/pci/
Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sar2130p-pcie-ep
18 - qcom,sdx55-pcie-ep
19 - qcom,sm8450-pcie-ep
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Dqcom,pcie-sm8550.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8550.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 - const: qcom,pcie-sm8550
21 - items:
22 - enum:
23 - qcom,sar2130p-pcie
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/linux-6.15/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
206 CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 the output clocks to the networking hardware and GCC blocks.
621 tristate "SAR2130P Global Clock Controller"
625 Support for the global clock controller on SAR2130P devices.
630 tristate "SAR2130P Graphics clock controller"
634 Support for the graphics clock controller on SAR2130P devices.
1055 SAR2130P, SM8550 or SM8650 devices.
1294 Say Y if you want to toggle LPASS-adjacent resets within
1393 tristate "High-Frequency PLL (HFPLL) Clock Controller"
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Dgcc-sar2130p.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021-2023, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/qcom,sar2130p-gcc.h>
15 #include "clk-alpha-pll.h"
16 #include "clk-branch.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap.h"
19 #include "clk-regmap-divider.h"
20 #include "clk-regmap-mux.h"
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/linux-6.15/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
15 - enum:
16 - qcom,ipq4019-dwc3
17 - qcom,ipq5018-dwc3
18 - qcom,ipq5332-dwc3
19 - qcom,ipq5424-dwc3
20 - qcom,ipq6018-dwc3
[all …]
/linux-6.15/Documentation/devicetree/bindings/nvmem/
Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5018-qfprom
[all …]
/linux-6.15/Documentation/devicetree/bindings/firmware/
Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
[all …]
/linux-6.15/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-qcom-hw.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-qcom-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
21 - description: v1 of CPUFREQ HW
23 - enum:
24 - qcom,qcm2290-cpufreq-hw
25 - qcom,sc7180-cpufreq-hw
26 - qcom,sc8180x-cpufreq-hw
[all …]
/linux-6.15/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
20 - enum:
21 - qcom,sdhci-msm-v4
23 - items:
[all …]
/linux-6.15/drivers/phy/qualcomm/
Dphy-qcom-qmp-pcie.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
25 #include <dt-bindings/phy/phy-qcom-qmp.h>
27 #include "phy-qcom-qmp-common.h"
29 #include "phy-qcom-qmp.h"
30 #include "phy-qcom-qmp-pcs-misc-v3.h"
31 #include "phy-qcom-qmp-pcs-pcie-v4.h"
32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h"
33 #include "phy-qcom-qmp-pcs-pcie-v5.h"
34 #include "phy-qcom-qmp-pcs-pcie-v5_20.h"
[all …]
Dphy-qcom-qmp-combo.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
24 #include <drm/bridge/aux-bridge.h>
26 #include <dt-bindings/phy/phy-qcom-qmp.h>
28 #include "phy-qcom-qmp-common.h"
30 #include "phy-qcom-qmp.h"
31 #include "phy-qcom-qmp-pcs-misc-v3.h"
32 #include "phy-qcom-qmp-pcs-usb-v4.h"
33 #include "phy-qcom-qmp-pcs-usb-v5.h"
34 #include "phy-qcom-qmp-pcs-usb-v6.h"
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