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/qemu/hw/gpio/
H A Dpca9552.c2 * PCA9552 I2C LED blinker
4 * https://www.nxp.com/docs/en/application-note/AN264.pdf
6 * Copyright (c) 2017-2018, IBM Corporation.
7 * Copyright (c) 2020 Philippe Mathieu-Daudé
9 * This work is licensed under the terms of the GNU GPL, version 2 or
10 * later. See the COPYING file in the top-level directory.
17 #include "hw/qdev-properties.h"
57 return extract32(s->regs[reg], shift, 2); in pca955x_pin_get_config()
63 return (s->regs[PCA9552_INPUT1] << 8) | s->regs[PCA9552_INPUT0]; in pca955x_pins_get_status()
81 for (i = 0; i < k->pin_count; i++) { in pca955x_display_pins_status()
[all …]
/qemu/hw/display/
H A Ddm163.c2 * QEMU DM163 8x3-channel constant current led driver
6 * Copyright (C) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
7 * Copyright (C) 2024 Inès Varhol <ines.varhol@telecom-paris.fr>
9 * SPDX-License-Identifier: GPL-2.0-or-later
14 * http://www.siti.com.tw/product/spec/LED/DM163.pdf
21 #include "hw/qdev-properties.h"
29 #define TURNED_OFF_ROW (COLOR_BUFFER_SIZE - 1)
61 s->sin = 0; in dm163_reset_hold()
62 s->dck = 0; in dm163_reset_hold()
63 s->rst_b = 0; in dm163_reset_hold()
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H A Djazz_led.c2 * QEMU JAZZ LED emulator.
4 * Copyright (c) 2007-2012 Herve Poussineau
35 REDRAW_NONE = 0, REDRAW_SEGMENTS = 1, REDRAW_BACKGROUND = 2,
38 #define TYPE_JAZZ_LED "jazz-led"
56 val = s->segments; in jazz_led_read()
70 s->segments = new_val; in jazz_led_write()
71 s->state |= REDRAW_SEGMENTS; in jazz_led_write()
101 case 2: in draw_horizontal_line()
104 d += 2; in draw_horizontal_line()
132 case 2: in draw_vertical_line()
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/qemu/hw/arm/
H A Dkzm.c5 * Written by Hans at OK-Labs
8 * This code is licensed under the GPL, version 2 or later.
12 * KZM-ARM11-01 evaluation board, with a Freescale
18 #include "hw/arm/fsl-imx31.h"
21 #include "qemu/error-report.h"
22 #include "system/address-spaces.h"
25 #include "hw/char/serial-mm.h"
31 * 0x00000000-0x7fffffff See i.MX31 SOC for support
32 * 0x80000000-0x8fffffff RAM EMULATED
33 * 0x90000000-0x9fffffff RAM EMULATED
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/qemu/hw/misc/
H A Dmps2-scc.c8 * it under the terms of the GNU General Public License version 2 or
29 #include "hw/misc/mps2-scc.h"
30 #include "hw/misc/led.h"
31 #include "hw/qdev-properties.h"
60 return extract32(s->id, 4, 8); in scc_partno()
116 if (function != 1 || device >= s->num_oscclk) { in scc_cfg_write()
123 s->oscclk[device] = value; in scc_cfg_write()
134 if (function != 1 || device >= s->num_oscclk) { in scc_cfg_read()
141 *value = s->oscclk[device]; in scc_cfg_read()
154 r = s->cfg0; in mps2_scc_read()
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H A Dmps2-fpgaio.c8 * it under the terms of the GNU General Public License version 2 or
26 #include "hw/misc/mps2-fpgaio.h"
27 #include "hw/misc/led.h"
28 #include "hw/qdev-properties.h"
44 return muldiv64(now - tick_offset, frq, NANOSECONDS_PER_SECOND); in counter_from_tickoff()
49 return now - muldiv64(count, NANOSECONDS_PER_SECOND, frq); in tickoff_from_counter()
55 * Update s->counter and s->pscntr to their true current values in resync_counter()
60 int64_t elapsed = now - s->pscntr_sync_ticks; in resync_counter()
66 uint64_t ticks = muldiv64(elapsed, s->prescale_clk, NANOSECONDS_PER_SECOND); in resync_counter()
70 * PSCNTR reloads from PRESCALE one tick-period after it hits zero, in resync_counter()
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H A Darm_integrator_debug.c2 * LED, Switch and Debug control registers for ARM Integrator Boards
9 …//developer.arm.com/documentation/dui0159/b/peripherals-and-interfaces/debug-leds-and-dip-switch-i…
13 * This work is licensed under the terms of the GNU GPL, version 2 or later.
14 * See the COPYING file in the top-level directory.
35 switch (offset >> 2) { in intdbg_control_read()
38 case 2: /* SWITCHES */ in intdbg_control_read()
54 switch (offset >> 2) { in intdbg_control_write()
56 case 2: /* LEDS */ in intdbg_control_write()
83 memory_region_init_io(&s->iomem, obj, &intdbg_control_ops, in intdbg_control_init()
84 NULL, "dbg-leds", 0x1000000); in intdbg_control_init()
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H A Dtrace-events3 # allwinner-cpucfg.c
8 # allwinner-h3-dramc.c
18 # allwinner-r40-dramc.c
32 # allwinner-sid.c
36 # allwinner-sramc.c
56 ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
65 ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
90 slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
91 slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
101 # mps2-scc.c
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H A Darm_sysctl.c4 * Copyright (c) 2006-2007 CodeSourcery.
12 #include "hw/qdev-properties.h"
68 VMSTATE_UINT32_V(sys_mci, arm_sysctl_state, 2),
69 VMSTATE_UINT32_V(sys_cfgdata, arm_sysctl_state, 2),
70 VMSTATE_UINT32_V(sys_cfgctrl, arm_sysctl_state, 2),
71 VMSTATE_UINT32_V(sys_cfgstat, arm_sysctl_state, 2),
93 return (s->sys_id >> 16) & 0xfff; in board_id()
101 s->leds = 0; in arm_sysctl_reset()
102 s->lockval = 0; in arm_sysctl_reset()
103 s->cfgdata1 = 0; in arm_sysctl_reset()
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/qemu/include/hw/misc/
H A Dmps2-fpgaio.h8 * it under the terms of the GNU General Public License version 2 or
25 #include "hw/misc/led.h"
28 #define TYPE_MPS2_FPGAIO "mps2-fpgaio"
39 LEDState *led[MPS2FPGAIO_MAX_LEDS]; member
H A Dmps2-scc.h8 * it under the terms of the GNU General Public License version 2 or
18 * + QOM property "scc-cfg4": value of the read-only CFG4 register
19 * + QOM property "scc-aid": value of the read-only SCC_AID register
20 * + QOM property "scc-id": value of the read-only SCC_ID register
21 * + QOM property "scc-cfg0": reset value of the CFG0 register
34 #include "hw/misc/led.h"
37 #define TYPE_MPS2_SCC "mps2-scc"
46 LEDState *led[8]; member
H A Darm_integrator_debug.h2 * ARM Integrator Board Debug, switch and LED section
6 …//developer.arm.com/documentation/dui0159/b/peripherals-and-interfaces/debug-leds-and-dip-switch-i…
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
/qemu/hw/net/
H A De1000_regs.h4 Copyright(c) 1999 - 2006 Intel Corporation.
8 version 2, as published by the Free Software Foundation.
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
37 #define E1000_ITR 0x000C4 /* Interrupt Throttling Rate - RW */
38 #define E1000_EIAC 0x000DC /* Ext. Interrupt Auto Clear - RW */
39 #define E1000_IVAR 0x000E4 /* Interrupt Vector Allocation Register - RW */
40 #define E1000_EITR 0x000E8 /* Extended Interrupt Throttling Rate - RW */
41 #define E1000_RDBAL1 0x02900 /* RX Descriptor Base Address Low (1) - RW */
42 #define E1000_RDBAH1 0x02904 /* RX Descriptor Base Address High (1) - RW */
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/qemu/include/hw/gpio/
H A Dpca9552.h2 * PCA9552 I2C LED blinker
4 * Copyright (c) 2017-2018, IBM Corporation.
6 * This work is licensed under the terms of the GNU GPL, version 2 or
7 * later. See the COPYING file in the top-level directory.
H A Dpca9552_regs.h2 * PCA9552 I2C LED blinker registers
4 * Copyright (c) 2017-2018, IBM Corporation.
6 * This work is licensed under the terms of the GNU GPL, version 2 or
7 * later. See the COPYING file in the top-level directory.
17 #define PCA9552_PSC0 2 /* read/write frequency prescaler 0 */
27 * Bit [4] is used to activate the Auto-Increment option of the
/qemu/hw/input/
H A Dhid.c77 return hs->n > 0 || hs->idle_pending; in hid_has_events()
84 hs->idle_pending = true; in hid_idle_timer()
85 hs->event(hs); in hid_idle_timer()
90 if (hs->idle_timer) { in hid_del_idle_timer()
91 timer_free(hs->idle_timer); in hid_del_idle_timer()
92 hs->idle_timer = NULL; in hid_del_idle_timer()
98 if (hs->idle) { in hid_set_next_idle()
100 NANOSECONDS_PER_SECOND * hs->idle * 4 / 1000; in hid_set_next_idle()
101 if (!hs->idle_timer) { in hid_set_next_idle()
102 hs->idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, hid_idle_timer, hs); in hid_set_next_idle()
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H A Dadb-kbd.c30 #include "hw/input/adb-keys.h"
31 #include "adb-internal.h"
182 if (s->count < sizeof(s->data)) { in adb_kbd_put_keycode()
183 s->data[s->wptr] = keycode; in adb_kbd_put_keycode()
184 if (++s->wptr == sizeof(s->data)) { in adb_kbd_put_keycode()
185 s->wptr = 0; in adb_kbd_put_keycode()
187 s->count++; in adb_kbd_put_keycode()
196 if (s->count == 0) { in adb_kbd_poll()
199 keycode = s->data[s->rptr]; in adb_kbd_poll()
200 s->rptr++; in adb_kbd_poll()
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/qemu/hw/pci/
H A Dshpc.c3 #include "qemu/host-utils.h"
5 #include "qemu/error-report.h"
7 #include "migration/qemu-file-types.h"
17 /* TODO: remove fully only on state DISABLED and LED off.
22 #define SHPC_SLOTS_33 0x04 /* 4 bytes. Also encodes PCI-X slots. */
26 #define SHPC_PHYS_SLOT 0x0E /* 2 byte */
31 #define SHPC_SEC_BUS 0x10 /* 2 bytes */
42 #define SHPC_CMD_STATUS 0x16 /* 2 bytes */
59 /* 2 bytes */
112 #define SHPC_SIZEOF(d) SHPC_SLOT_REG((d)->shpc->nslots)
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/qemu/tests/qtest/
H A Dpca9552-test.c2 * QTest testcase for the PCA9552 LED blinker
4 * Copyright (c) 2017-2018, IBM Corporation.
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
17 #define PCA9552_TEST_ID "pca9552-test"
88 qos_node_consumes("pca9552", "i2c-bus", &opts); in pca9552_register_nodes()
90 qos_add_test("tx-rx", "pca9552", send_and_receive, NULL); in pca9552_register_nodes()
91 qos_add_test("rx-autoinc", "pca9552", receive_autoinc, NULL); in pca9552_register_nodes()
/qemu/hw/m68k/
H A Dnext-cube.c5 * Copyright (c) 2024 Mark Cave-Ayland
9 * by the Free Software Foundation; either version 2 of the License,
15 #include "exec/cpu-interrupt.h"
19 #include "hw/m68k/next-cube.h"
28 #include "hw/qdev-properties.h"
30 #include "qemu/error-report.h"
48 #define TYPE_NEXT_RTC "next-rtc"
66 #define TYPE_NEXT_SCSI "next-scsi"
82 #define TYPE_NEXT_PC "next-pc"
102 uint32_t led; member
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/qemu/tests/qtest/fuzz/
H A Dvirtio_net_fuzz.c2 * virtio-net Fuzzing Target
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
15 #include "standard-headers/linux/virtio_config.h"
17 #include "tests/qtest/libqos/virtio-net.h"
25 #define QVIRTIO_CTRL_VQ 2
27 static int sockfds[2];
46 QVirtioDevice *dev = net_if->vdev; in virtio_net_fuzz_multi()
52 Size -= sizeof(vqa); in virtio_net_fuzz_multi()
54 q = net_if->queues[vqa.queue % 3]; in virtio_net_fuzz_multi()
[all …]
/qemu/hw/mips/
H A Djazz.c4 * Copyright (c) 2007-2008 Hervé Poussineau
31 #include "hw/char/serial-mm.h"
43 #include "hw/display/bochs-vbe.h"
50 #include "qemu/error-report.h"
53 #include "accel/tcg/cpu-ops.h"
132 qdev_prop_set_uint8(dev, "it_shift", 2); in mips_jazz_init_net()
145 prom[i] = nd->macaddr.a[i]; in mips_jazz_init_net()
151 prom[7] = 0xff - checksum; in mips_jazz_init_net()
197 [JAZZ_MAGNUM] = {50000000, 2}, in mips_jazz_init()
201 if (machine->ram_size > 256 * MiB) { in mips_jazz_init()
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/qemu/tests/qemu-iotests/
H A D2834 # Test for copy-before-write filter permission conflict
10 # the Free Software Foundation; either version 2 of the License, or
34 copy-before-write filter so it can copy all data to the target before it is
35 changed. copy-before-write filter is appended above source node, to achieve
37 side parents of source sub-tree with write permission is unsupported (we'd have
38 append several copy-before-write filter like nodes to handle such parents). The
40 not allowed (blockdev-backup command should fail).
60 copy-before-write filter wants to unshare write permission on its source child.
61 Write unsharing will be propagated to the "source->base" link and will conflict
69 preceding this test creation), starting backup on such configuration led to
[all …]
/qemu/hw/pci-bridge/
H A Dgen_pcie_root_port.c9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
18 #include "hw/qdev-properties.h"
19 #include "hw/qdev-properties-system.h"
23 #define TYPE_GEN_PCIE_ROOT_PORT "pcie-root-port"
56 assert(rc == -ENOTSUP); in gen_rp_interrupts_init()
73 return rp->migrate_msix; in gen_rp_test_migrate_msix()
84 rpc->parent_realize(dev, &local_err); in gen_rp_realize()
91 * reserving IO space led to worse issues in 6.1, when this hunk was in gen_rp_realize()
95 if (s->hide_native_hotplug_cap && grp->res_reserve.io == -1 && s->hotplug) { in gen_rp_realize()
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/qemu/include/hw/ppc/
H A Dspapr_drc.h9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
19 #include "hw/qdev-core.h"
22 #define TYPE_SPAPR_DR_CONNECTOR "spapr-dr-connector"
31 #define TYPE_SPAPR_DRC_PHYSICAL "spapr-drc-physical"
35 #define TYPE_SPAPR_DRC_LOGICAL "spapr-drc-logical"
37 #define TYPE_SPAPR_DRC_CPU "spapr-drc-cpu"
39 #define TYPE_SPAPR_DRC_PCI "spapr-drc-pci"
41 #define TYPE_SPAPR_DRC_LMB "spapr-drc-lmb"
43 #define TYPE_SPAPR_DRC_PHB "spapr-drc-phb"
[all …]

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