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/linux-3.3/drivers/isdn/hisax/
Ds0box.c33 static u_char nibtab[] = { 1, 9, 5, 0xd, 3, 0xb, 7, 0xf,
46 n1 = (inb_p(padr+1) >> 3) & 0x17; in readreg()
48 n2 = (inb_p(padr+1) >> 3) & 0x17; in readreg()
66 n1 = (inb_p(padr+1) >> 3) & 0x17; in read_fifo()
68 n2 = (inb_p(padr+1) >> 3) & 0x17; in read_fifo()
96 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
98 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset)); in ReadISAC()
102 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
104 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset, value); in WriteISAC()
108 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) in ReadISACfifo() argument
[all …]
Dhfc_2bds0.c29 dummyf(struct IsdnCardState *cs, u_char * data, int size) in dummyf() argument
35 ReadReg(struct IsdnCardState *cs, int data, u_char reg) in ReadReg() argument
40 if (cs->hw.hfcD.cip != reg) { in ReadReg()
41 cs->hw.hfcD.cip = reg; in ReadReg()
42 byteout(cs->hw.hfcD.addr | 1, reg); in ReadReg()
44 ret = bytein(cs->hw.hfcD.addr); in ReadReg()
46 if (cs->debug & L1_DEB_HSCX_FIFO && (data != 2)) in ReadReg()
47 debugl1(cs, "t3c RD %02x %02x", reg, ret); in ReadReg()
50 ret = bytein(cs->hw.hfcD.addr | 1); in ReadReg()
55 WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value) in WriteReg() argument
[all …]
Dsedlbauer.c6 * support for the Sedlbauer ISDN-Controller PC/104 and
11 * Copyright by Marcus Niemann <niemann@www-bib.fh-bielefeld.de>
24 * ---------------------------------------------------------------------
25 * Speed Card ISAC_HSCX DIP-SWITCH
30 * ISDN PC/104 IPAC DIP-SWITCH
66 #define SEDL_SPEED_FAX 3
77 #define SEDL_CHIP_IPAC 3
81 #define SEDL_BUS_PCMCIA 3
89 #define SEDL_HSCX_ISA_HSCX 3
154 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
[all …]
Delsa.c36 {"None", "PC", "PCC-8", "PCC-16", "PCF", "PCF-Pro",
38 "PCMCIA-IPAC" };
41 {"?0?", "?1?", "?2?", "?3?", "?4?", "V2.2",
51 #define ELSA_ALE 3
60 #define ELSA_PCC16 3
83 *** (mehrere Befehle werden durch Bit-Oderung kombiniert) ***
86 /* Config-Register (Read) */
87 #define ELIRQF_TIMER_RUN 0x02 /* Bit 1 des Config-Reg */
88 #define ELIRQF_TIMER_RUN_PCC8 0x01 /* Bit 0 des Config-Reg bei PCC */
89 #define ELSA_IRQ_IDX 0x38 /* Bit 3,4,5 des Config-Reg */
[all …]
Dsaphir.c29 #define IRQ_REG 3
68 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
70 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, offset)); in ReadISAC()
74 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
76 writereg(cs->hw.saphir.ale, cs->hw.saphir.isac, offset, value); in WriteISAC()
80 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) in ReadISACfifo() argument
82 readfifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size); in ReadISACfifo()
86 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) in WriteISACfifo() argument
88 writefifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size); in WriteISACfifo()
92 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
[all …]
Disar.c25 static const u_char faxmodulation[] = {3,24,48,72,73,74,96,97,98,121,122,145,146};
31 static void isar_setup(struct IsdnCardState *cs);
36 waitforHIA(struct IsdnCardState *cs, int timeout) in waitforHIA() argument
39 while ((cs->BC_Read_Reg(cs, 0, ISAR_HIA) & 1) && timeout) { in waitforHIA()
41 timeout--; in waitforHIA()
50 sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len, in sendmsg() argument
55 if (!waitforHIA(cs, 4000)) in sendmsg()
58 if (cs->debug & L1_DEB_HSCX) in sendmsg()
59 debugl1(cs, "sendmsg(%02x,%02x,%d)", his, creg, len); in sendmsg()
61 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_H, creg); in sendmsg()
[all …]
Dsportster.c11 * Thanks to Christian "naddy" Weisgerber (3Com, US Robotics) for documentation
36 return(base + ((off & 0xfc)<<8) + ((off & 3)<<1)); in calc_off()
54 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
56 return (bytein(calc_off(cs->hw.spt.isac, offset))); in ReadISAC()
60 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
62 byteout(calc_off(cs->hw.spt.isac, offset), value); in WriteISAC()
66 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) in ReadISACfifo() argument
68 read_fifo(cs->hw.spt.isac, data, size); in ReadISACfifo()
72 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) in WriteISACfifo() argument
74 write_fifo(cs->hw.spt.isac, data, size); in WriteISACfifo()
[all …]
Dteles3.c56 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
58 return (readreg(cs->hw.teles3.isac, offset)); in ReadISAC()
62 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
64 writereg(cs->hw.teles3.isac, offset, value); in WriteISAC()
68 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) in ReadISACfifo() argument
70 read_fifo(cs->hw.teles3.isacfifo, data, size); in ReadISACfifo()
74 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) in WriteISACfifo() argument
76 write_fifo(cs->hw.teles3.isacfifo, data, size); in WriteISACfifo()
80 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
82 return (readreg(cs->hw.teles3.hscx[hscx], offset)); in ReadHSCX()
[all …]
Dhfc_pci.c3 * low level driver for CCD's hfc-pci based cards
56 {PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_T_CONCEPT, "German telekom", "T-Concept"},
64 {PCI_VENDOR_ID_SITECOM, PCI_DEVICE_ID_SITECOM_DC105V2, "Sitecom Europe", "DC-105 ISDN PCI"},
73 release_io_hfcpci(struct IsdnCardState *cs) in release_io_hfcpci() argument
76 cs->hw.hfcpci.pci_io); in release_io_hfcpci()
77 cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */ in release_io_hfcpci()
78 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in release_io_hfcpci()
79 Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */ in release_io_hfcpci()
81 Write_hfc(cs, HFCPCI_CIRM, 0); /* Reset Off */ in release_io_hfcpci()
83 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in release_io_hfcpci()
[all …]
Dhscx.c22 {"A1", "?1", "A2", "?3", "A3", "V2.1", "?6", "?7",
26 HscxVersion(struct IsdnCardState *cs, char *s) in HscxVersion() argument
30 verA = cs->BC_Read_Reg(cs, 0, HSCX_VSTR) & 0xf; in HscxVersion()
31 verB = cs->BC_Read_Reg(cs, 1, HSCX_VSTR) & 0xf; in HscxVersion()
43 struct IsdnCardState *cs = bcs->cs; in modehscx() local
44 int hscx = bcs->hw.hscx.hscx; in modehscx()
46 if (cs->debug & L1_DEB_HSCX) in modehscx()
47 debugl1(cs, "hscx %c mode %d ichan %d", in modehscx()
49 bcs->mode = mode; in modehscx()
50 bcs->channel = bc; in modehscx()
[all …]
Disdnl1.c130 debugl1(struct IsdnCardState *cs, char *fmt, ...) in debugl1() argument
136 sprintf(tmp, "Card%d ", cs->cardnr + 1); in debugl1()
137 VHiSax_putstatus(cs, tmp, fmt, args); in debugl1()
145 struct PStack *st = fi->userdata; in l1m_debug()
146 struct IsdnCardState *cs = st->l1.hardware; in l1m_debug() local
150 sprintf(tmp, "Card%d ", cs->cardnr + 1); in l1m_debug()
151 VHiSax_putstatus(cs, tmp, fmt, args); in l1m_debug()
156 L1activated(struct IsdnCardState *cs) in L1activated() argument
160 st = cs->stlist; in L1activated()
162 if (test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags)) in L1activated()
[all …]
Dix1_micro.c3 * low level stuff for ITK ix1-micro Rev.2 isdn cards
6 * Author Klaus-Peter Nischke
7 * Copyright by Klaus-Peter Nischke, ITK AG
14 * Klaus-Peter Nischke
32 #define SPECIAL_PORT_OFFSET 3
76 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
78 return (readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset)); in ReadISAC()
82 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
84 writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset, value); in WriteISAC()
88 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) in ReadISACfifo() argument
[all …]
Dhfc_sx.c3 * level driver for Cologne Chip Designs hfc-s+/sp based cards
25 /* IRQ-table for CCDs demo board */
33 * ISA-SLOT Signal PIN
46 0,0,0,0,0,2,1,0,0,0,3,4,5,0,0,6
50 0,0,0,7,0,1,0,0,0,2,3,4,5,0,0,6
62 Write_hfc(struct IsdnCardState *cs, u_char regnum, u_char val) in Write_hfc() argument
64 byteout(cs->hw.hfcsx.base+1, regnum); in Write_hfc()
65 byteout(cs->hw.hfcsx.base, val); in Write_hfc()
69 Read_hfc(struct IsdnCardState *cs, u_char regnum) in Read_hfc() argument
73 byteout(cs->hw.hfcsx.base+1, regnum); in Read_hfc()
[all …]
Davm_a1.c56 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
58 return (readreg(cs->hw.avm.isac, offset)); in ReadISAC()
62 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
64 writereg(cs->hw.avm.isac, offset, value); in WriteISAC()
68 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) in ReadISACfifo() argument
70 read_fifo(cs->hw.avm.isacfifo, data, size); in ReadISACfifo()
74 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) in WriteISACfifo() argument
76 write_fifo(cs->hw.avm.isacfifo, data, size); in WriteISACfifo()
80 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
82 return (readreg(cs->hw.avm.hscx[hscx], offset)); in ReadHSCX()
[all …]
/linux-3.3/arch/arm/mach-omap2/
Dgpmc.c4 * Copyright (C) 2005-2006 Nokia Corporation
9 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
28 #include <asm/mach-types.h>
67 /* Structure to save gpmc cs context */
97 static unsigned int gpmc_cs_map; /* flag for cs which are initialized */
98 static int gpmc_ecc_used = -EINVAL; /* cs using ecc engine */
116 static void gpmc_cs_write_byte(int cs, int idx, u8 val) in gpmc_cs_write_byte() argument
120 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_write_byte()
124 static u8 gpmc_cs_read_byte(int cs, int idx) in gpmc_cs_read_byte() argument
128 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; in gpmc_cs_read_byte()
[all …]
Dboard-flash.c2 * board-flash.c
3 * Modified from mach-omap2/board-3430sdp-flash.c
26 #include "board-flash.h"
30 #define MAX_SUPPORTED_GPMC_CONFIG 3
47 .name = "physmap-flash",
57 __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs) in board_nor_init() argument
66 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1, in board_nor_init()
69 + FLASH_SIZE_SDPV2 - 1; in board_nor_init()
71 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1, in board_nor_init()
74 + FLASH_SIZE_SDPV1 - 1; in board_nor_init()
[all …]
/linux-3.3/arch/m68k/include/asm/
Dm5307sim.h4 * m5307sim.h -- ColdFire 5307 System Integration Module support.
18 #define CPU_INSTR_PER_JIFFY 3
40 #define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */
50 #define MCFSIM_CSAR0 0x80 /* CS 0 Address 0 reg (r/w) */
51 #define MCFSIM_CSMR0 0x84 /* CS 0 Mask 0 reg (r/w) */
52 #define MCFSIM_CSCR0 0x8a /* CS 0 Control reg (r/w) */
53 #define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */
54 #define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
55 #define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
58 #define MCFSIM_CSBAR 0x98 /* CS Base Address reg (r/w) */
[all …]
Dm5407sim.h4 * m5407sim.h -- ColdFire 5407 System Integration Module support.
18 #define CPU_INSTR_PER_JIFFY 3
40 #define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */
50 #define MCFSIM_CSAR0 0x80 /* CS 0 Address 0 reg (r/w) */
51 #define MCFSIM_CSMR0 0x84 /* CS 0 Mask 0 reg (r/w) */
52 #define MCFSIM_CSCR0 0x8a /* CS 0 Control reg (r/w) */
53 #define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */
54 #define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
55 #define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
57 #define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
[all …]
Dm5206sim.h4 * m5206sim.h -- ColdFire 5206 System Integration Module support.
16 #define CPU_INSTR_PER_JIFFY 3
27 #define MCFSIM_ICR3 0x16 /* Intr Ctrl reg 3 (r/w) */
61 #define MCFSIM_CSAR0 0x64 /* CS 0 Address 0 reg (r/w) */
62 #define MCFSIM_CSMR0 0x68 /* CS 0 Mask 0 reg (r/w) */
63 #define MCFSIM_CSCR0 0x6e /* CS 0 Control reg (r/w) */
64 #define MCFSIM_CSAR1 0x70 /* CS 1 Address reg (r/w) */
65 #define MCFSIM_CSMR1 0x74 /* CS 1 Mask reg (r/w) */
66 #define MCFSIM_CSCR1 0x7a /* CS 1 Control reg (r/w) */
67 #define MCFSIM_CSAR2 0x7c /* CS 2 Address reg (r/w) */
[all …]
/linux-3.3/drivers/s390/char/
Draw3270.h14 #define TUBICMD _IO('3', 3) /* set ccw command for fs reads. */
15 #define TUBOCMD _IO('3', 4) /* set ccw command for fs writes. */
16 #define TUBGETI _IO('3', 7) /* get ccw command for fs reads. */
17 #define TUBGETO _IO('3', 8) /* get ccw command for fs writes. */
18 #define TUBSETMOD _IO('3',12) /* FIXME: what does it do ?*/
19 #define TUBGETMOD _IO('3',13) /* FIXME: what does it do ?*/
43 #define TF_INMDT 0xc1 /* Visible, Set-MDT */
54 /* Extended-Highlighting Bytes */
122 return list_empty(&rq->list); in raw3270_request_final()
131 #define RAW3270_IO_STOP 3 /* kill current request */
[all …]
/linux-3.3/arch/arm/plat-omap/include/plat/
Dgpmc.h2 * General-Purpose Memory Controller for OMAP2
4 * Copyright (C) 2005-2006 Nokia Corporation
58 #define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25)
59 #define GPMC_CONFIG1_PAGE_LEN(val) ((val & 3) << 23)
62 #define GPMC_CONFIG1_WAIT_MON_IIME(val) ((val & 3) << 18)
63 #define GPMC_CONFIG1_WAIT_PIN_SEL(val) ((val & 3) << 16)
64 #define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12)
66 #define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
70 #define GPMC_CONFIG1_FCLK_DIV(val) (val & 3)
73 #define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3))
[all …]
/linux-3.3/drivers/isdn/gigaset/
Dcapi.c30 #define CAPI_CONNECT_ACTIVE_IND_BASELEN (CAPI_MSG_BASELEN+4+3*1)
71 #define MAX_HLC_OCTETS 3
75 /* values for bcs->apconnstate */
102 u8 cgpty_buf[MAX_NUMBER_DIGITS+3];
112 /* Speech (A-law) */
115 [3] = { "8990", NULL },
118 /* 3,1 kHz audio (A-law) */
132 /* Group 2/3 facsimile */
166 static inline void ignore_cstruct_param(struct cardstate *cs, _cstruct param, in ignore_cstruct_param() argument
170 dev_warn(cs->dev, "%s: ignoring unsupported parameter: %s\n", in ignore_cstruct_param()
[all …]
Dgigaset.h55 #define RING_TIMEOUT 3 /* for additional parameters to RING */
57 #define ATRDY_TIMEOUT 3 /* for HD_READY_SEND_ATDATA */
59 #define BAS_RETRY 3 /* max. retries for base USB ops */
61 #define MAXACT 3
75 DEBUG_TRANSCMD = 0x02000, /* AT-COMMANDS+RESPONSES */
118 #define ZSAU_ACTIVE 3
121 #define ZSAU_UNKNOWN -1
171 #define BAS_INURBS 3
172 #define BAS_OUTURBS 3
178 #define AT_BC 3
[all …]
Dev-layer.c37 #define RT_NUMBER 3
44 #define RSP_ZGCI 3
50 /* - numeric */
55 /* - string */
63 #define RSP_WRONG_CID -2 /* unknown cid in cmd */
64 #define RSP_INVAL -6 /* invalid response */
65 #define RSP_NODEV -9 /* device not connected */
67 #define RSP_NONE -19
68 #define RSP_STRING -20
69 #define RSP_NULL -21
[all …]
/linux-3.3/Documentation/scsi/
DNinjaSCSI.txt2 WorkBiT NinjaSCSI-3/32Bi driver for Linux
5 This is Workbit corp.'s(http://www.workbit.co.jp/) NinjaSCSI-3
10 pcmcia-cs: 3.1.27
11 gcc: gcc-2.95.4
12 PC card: I-O data PCSC-F (NinjaSCSI-3)
13 I-O data CBSC-II in 16 bit mode (NinjaSCSI-32Bi)
14 SCSI device: I-O data CDPS-PX24 (CD-ROM drive)
15 Media Intelligent MMO-640GT (Optical disk drive)
17 3. Install
18 [1] Check your PC card is true "NinjaSCSI-3" card.
[all …]

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