1 /*
2  * board-flash.c
3  * Modified from mach-omap2/board-3430sdp-flash.c
4  *
5  * Copyright (C) 2009 Nokia Corporation
6  * Copyright (C) 2009 Texas Instruments
7  *
8  * Vimal Singh <vimalsingh@ti.com>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14 
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/io.h>
19 #include <plat/irqs.h>
20 
21 #include <plat/gpmc.h>
22 #include <plat/nand.h>
23 #include <plat/onenand.h>
24 #include <plat/tc.h>
25 
26 #include "board-flash.h"
27 
28 #define REG_FPGA_REV			0x10
29 #define REG_FPGA_DIP_SWITCH_INPUT2	0x60
30 #define MAX_SUPPORTED_GPMC_CONFIG	3
31 
32 #define DEBUG_BASE		0x08000000 /* debug board */
33 
34 /* various memory sizes */
35 #define FLASH_SIZE_SDPV1	SZ_64M	/* NOR flash (64 Meg aligned) */
36 #define FLASH_SIZE_SDPV2	SZ_128M	/* NOR flash (256 Meg aligned) */
37 
38 static struct physmap_flash_data board_nor_data = {
39 	.width		= 2,
40 };
41 
42 static struct resource board_nor_resource = {
43 	.flags		= IORESOURCE_MEM,
44 };
45 
46 static struct platform_device board_nor_device = {
47 	.name		= "physmap-flash",
48 	.id		= 0,
49 	.dev		= {
50 			.platform_data = &board_nor_data,
51 	},
52 	.num_resources	= 1,
53 	.resource	= &board_nor_resource,
54 };
55 
56 static void
board_nor_init(struct mtd_partition * nor_parts,u8 nr_parts,u8 cs)57 __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
58 {
59 	int err;
60 
61 	board_nor_data.parts	= nor_parts;
62 	board_nor_data.nr_parts	= nr_parts;
63 
64 	/* Configure start address and size of NOR device */
65 	if (omap_rev() >= OMAP3430_REV_ES1_0) {
66 		err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
67 				(unsigned long *)&board_nor_resource.start);
68 		board_nor_resource.end = board_nor_resource.start
69 					+ FLASH_SIZE_SDPV2 - 1;
70 	} else {
71 		err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
72 				(unsigned long *)&board_nor_resource.start);
73 		board_nor_resource.end = board_nor_resource.start
74 					+ FLASH_SIZE_SDPV1 - 1;
75 	}
76 	if (err < 0) {
77 		pr_err("NOR: Can't request GPMC CS\n");
78 		return;
79 	}
80 	if (platform_device_register(&board_nor_device) < 0)
81 		pr_err("Unable to register NOR device\n");
82 }
83 
84 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
85 		defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
86 static struct omap_onenand_platform_data board_onenand_data = {
87 	.dma_channel	= -1,   /* disable DMA in OMAP OneNAND driver */
88 };
89 
90 static void
board_onenand_init(struct mtd_partition * onenand_parts,u8 nr_parts,u8 cs)91 __init board_onenand_init(struct mtd_partition *onenand_parts,
92 				u8 nr_parts, u8 cs)
93 {
94 	board_onenand_data.cs		= cs;
95 	board_onenand_data.parts	= onenand_parts;
96 	board_onenand_data.nr_parts	= nr_parts;
97 
98 	gpmc_onenand_init(&board_onenand_data);
99 }
100 #else
101 static void
board_onenand_init(struct mtd_partition * nor_parts,u8 nr_parts,u8 cs)102 __init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
103 {
104 }
105 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
106 
107 #if defined(CONFIG_MTD_NAND_OMAP2) || \
108 		defined(CONFIG_MTD_NAND_OMAP2_MODULE)
109 
110 /* Note that all values in this struct are in nanoseconds */
111 static struct gpmc_timings nand_timings = {
112 
113 	.sync_clk = 0,
114 
115 	.cs_on = 0,
116 	.cs_rd_off = 36,
117 	.cs_wr_off = 36,
118 
119 	.adv_on = 6,
120 	.adv_rd_off = 24,
121 	.adv_wr_off = 36,
122 
123 	.we_off = 30,
124 	.oe_off = 48,
125 
126 	.access = 54,
127 	.rd_cycle = 72,
128 	.wr_cycle = 72,
129 
130 	.wr_access = 30,
131 	.wr_data_mux_bus = 0,
132 };
133 
134 static struct omap_nand_platform_data board_nand_data = {
135 	.gpmc_t		= &nand_timings,
136 };
137 
138 void
board_nand_init(struct mtd_partition * nand_parts,u8 nr_parts,u8 cs,int nand_type)139 __init board_nand_init(struct mtd_partition *nand_parts,
140 			u8 nr_parts, u8 cs, int nand_type)
141 {
142 	board_nand_data.cs		= cs;
143 	board_nand_data.parts		= nand_parts;
144 	board_nand_data.nr_parts	= nr_parts;
145 	board_nand_data.devsize		= nand_type;
146 
147 	board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
148 	board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
149 	gpmc_nand_init(&board_nand_data);
150 }
151 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
152 
153 /**
154  * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
155  * the various cs values.
156  */
get_gpmc0_type(void)157 static u8 get_gpmc0_type(void)
158 {
159 	u8 cs = 0;
160 	void __iomem *fpga_map_addr;
161 
162 	fpga_map_addr = ioremap(DEBUG_BASE, 4096);
163 	if (!fpga_map_addr)
164 		return -ENOMEM;
165 
166 	if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
167 		/* we dont have an DEBUG FPGA??? */
168 		/* Depend on #defines!! default to strata boot return param */
169 		goto unmap;
170 
171 	/* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
172 	cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
173 
174 	/* ES2.0 SDP's onwards 4 dip switches are provided for CS */
175 	if (omap_rev() >= OMAP3430_REV_ES1_0)
176 		/* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
177 		cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
178 			((cs & 2) << 1) | ((cs & 1) << 3);
179 	else
180 		/* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
181 		cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
182 unmap:
183 	iounmap(fpga_map_addr);
184 	return cs;
185 }
186 
187 /**
188  * board_flash_init - Identify devices connected to GPMC and register.
189  *
190  * @return - void.
191  */
board_flash_init(struct flash_partitions partition_info[],char chip_sel_board[][GPMC_CS_NUM],int nand_type)192 void board_flash_init(struct flash_partitions partition_info[],
193 			char chip_sel_board[][GPMC_CS_NUM], int nand_type)
194 {
195 	u8		cs = 0;
196 	u8		norcs = GPMC_CS_NUM + 1;
197 	u8		nandcs = GPMC_CS_NUM + 1;
198 	u8		onenandcs = GPMC_CS_NUM + 1;
199 	u8		idx;
200 	unsigned char	*config_sel = NULL;
201 
202 	/* REVISIT: Is this return correct idx for 2430 SDP?
203 	 * for which cs configuration matches for 2430 SDP?
204 	 */
205 	idx = get_gpmc0_type();
206 	if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
207 		pr_err("%s: Invalid chip select: %d\n", __func__, cs);
208 		return;
209 	}
210 	config_sel = (unsigned char *)(chip_sel_board[idx]);
211 
212 	while (cs < GPMC_CS_NUM) {
213 		switch (config_sel[cs]) {
214 		case PDC_NOR:
215 			if (norcs > GPMC_CS_NUM)
216 				norcs = cs;
217 			break;
218 		case PDC_NAND:
219 			if (nandcs > GPMC_CS_NUM)
220 				nandcs = cs;
221 			break;
222 		case PDC_ONENAND:
223 			if (onenandcs > GPMC_CS_NUM)
224 				onenandcs = cs;
225 			break;
226 		};
227 		cs++;
228 	}
229 
230 	if (norcs > GPMC_CS_NUM)
231 		pr_err("NOR: Unable to find configuration in GPMC\n");
232 	else
233 		board_nor_init(partition_info[0].parts,
234 				partition_info[0].nr_parts, norcs);
235 
236 	if (onenandcs > GPMC_CS_NUM)
237 		pr_err("OneNAND: Unable to find configuration in GPMC\n");
238 	else
239 		board_onenand_init(partition_info[1].parts,
240 					partition_info[1].nr_parts, onenandcs);
241 
242 	if (nandcs > GPMC_CS_NUM)
243 		pr_err("NAND: Unable to find configuration in GPMC\n");
244 	else
245 		board_nand_init(partition_info[2].parts,
246 			partition_info[2].nr_parts, nandcs, nand_type);
247 }
248