Lines Matching +full:cs +full:- +full:3
3 * low level driver for CCD's hfc-pci based cards
56 {PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_T_CONCEPT, "German telekom", "T-Concept"},
64 {PCI_VENDOR_ID_SITECOM, PCI_DEVICE_ID_SITECOM_DC105V2, "Sitecom Europe", "DC-105 ISDN PCI"},
73 release_io_hfcpci(struct IsdnCardState *cs) in release_io_hfcpci() argument
76 cs->hw.hfcpci.pci_io); in release_io_hfcpci()
77 cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */ in release_io_hfcpci()
78 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in release_io_hfcpci()
79 Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */ in release_io_hfcpci()
81 Write_hfc(cs, HFCPCI_CIRM, 0); /* Reset Off */ in release_io_hfcpci()
83 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in release_io_hfcpci()
84 …pci_write_config_word(cs->hw.hfcpci.dev, PCI_COMMAND, 0); /* disable memory mapped ports + busmast… in release_io_hfcpci()
85 del_timer(&cs->hw.hfcpci.timer); in release_io_hfcpci()
86 pci_free_consistent(cs->hw.hfcpci.dev, 0x8000, in release_io_hfcpci()
87 cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma); in release_io_hfcpci()
88 cs->hw.hfcpci.fifos = NULL; in release_io_hfcpci()
89 iounmap((void *)cs->hw.hfcpci.pci_io); in release_io_hfcpci()
97 reset_hfcpci(struct IsdnCardState *cs) in reset_hfcpci() argument
99 …pci_write_config_word(cs->hw.hfcpci.dev, PCI_COMMAND, PCI_ENA_MEMIO); /* enable memory mapped port… in reset_hfcpci()
100 cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */ in reset_hfcpci()
101 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in reset_hfcpci()
104 …pci_write_config_word(cs->hw.hfcpci.dev, PCI_COMMAND, PCI_ENA_MEMIO + PCI_ENA_MASTER); /* enable m… in reset_hfcpci()
105 Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */ in reset_hfcpci()
107 Write_hfc(cs, HFCPCI_CIRM, 0); /* Reset Off */ in reset_hfcpci()
109 if (Read_hfc(cs, HFCPCI_STATUS) & 2) in reset_hfcpci()
110 printk(KERN_WARNING "HFC-PCI init bit busy\n"); in reset_hfcpci()
112 cs->hw.hfcpci.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci()
113 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in reset_hfcpci()
115 cs->hw.hfcpci.trm = 0 + HFCPCI_BTRANS_THRESMASK; /* no echo connect , threshold */ in reset_hfcpci()
116 Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm); in reset_hfcpci()
118 Write_hfc(cs, HFCPCI_CLKDEL, CLKDEL_TE); /* ST-Bit delay for TE-Mode */ in reset_hfcpci()
119 cs->hw.hfcpci.sctrl_e = HFCPCI_AUTO_AWAKE; in reset_hfcpci()
120 Write_hfc(cs, HFCPCI_SCTRL_E, cs->hw.hfcpci.sctrl_e); /* S/T Auto awake */ in reset_hfcpci()
121 cs->hw.hfcpci.bswapped = 0; /* no exchange */ in reset_hfcpci()
122 cs->hw.hfcpci.nt_mode = 0; /* we are in TE mode */ in reset_hfcpci()
123 cs->hw.hfcpci.ctmt = HFCPCI_TIM3_125 | HFCPCI_AUTO_TIMER; in reset_hfcpci()
124 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt); in reset_hfcpci()
126 cs->hw.hfcpci.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC | in reset_hfcpci()
128 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in reset_hfcpci()
131 if (Read_hfc(cs, HFCPCI_INT_S1)); in reset_hfcpci()
133 Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 2); /* HFC ST 2 */ in reset_hfcpci()
135 Write_hfc(cs, HFCPCI_STATES, 2); /* HFC ST 2 */ in reset_hfcpci()
136 cs->hw.hfcpci.mst_m = HFCPCI_MASTER; /* HFC Master Mode */ in reset_hfcpci()
138 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in reset_hfcpci()
139 cs->hw.hfcpci.sctrl = 0x40; /* set tx_lo mode, error in datasheet ! */ in reset_hfcpci()
140 Write_hfc(cs, HFCPCI_SCTRL, cs->hw.hfcpci.sctrl); in reset_hfcpci()
141 cs->hw.hfcpci.sctrl_r = 0; in reset_hfcpci()
142 Write_hfc(cs, HFCPCI_SCTRL_R, cs->hw.hfcpci.sctrl_r); in reset_hfcpci()
145 /* Slots 0 and 1 are set for B-chan 1 and 2 */ in reset_hfcpci()
146 /* D- and monitor/CI channel are not enabled */ in reset_hfcpci()
147 /* STIO1 is used as output for data, B1+B2 from ST->IOM+HFC */ in reset_hfcpci()
148 /* STIO2 is used as data input, B1+B2 from IOM->ST */ in reset_hfcpci()
149 /* ST B-channel send disabled -> continuous 1s */ in reset_hfcpci()
151 cs->hw.hfcpci.conn = 0x36; /* set data flow directions */ in reset_hfcpci()
152 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in reset_hfcpci()
153 Write_hfc(cs, HFCPCI_B1_SSL, 0x80); /* B1-Slot 0 STIO1 out enabled */ in reset_hfcpci()
154 Write_hfc(cs, HFCPCI_B2_SSL, 0x81); /* B2-Slot 1 STIO1 out enabled */ in reset_hfcpci()
155 Write_hfc(cs, HFCPCI_B1_RSL, 0x80); /* B1-Slot 0 STIO2 in enabled */ in reset_hfcpci()
156 Write_hfc(cs, HFCPCI_B2_RSL, 0x81); /* B2-Slot 1 STIO2 in enabled */ in reset_hfcpci()
159 cs->hw.hfcpci.int_m2 = HFCPCI_IRQ_ENABLE; in reset_hfcpci()
160 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in reset_hfcpci()
161 if (Read_hfc(cs, HFCPCI_INT_S1)); in reset_hfcpci()
168 hfcpci_Timer(struct IsdnCardState *cs) in hfcpci_Timer() argument
170 cs->hw.hfcpci.timer.expires = jiffies + 75; in hfcpci_Timer()
172 /* WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcpci.ctmt | 0x80); in hfcpci_Timer()
173 add_timer(&cs->hw.hfcpci.timer); in hfcpci_Timer()
179 /* schedule a new D-channel task */
182 sched_event_D_pci(struct IsdnCardState *cs, int event) in sched_event_D_pci() argument
184 test_and_set_bit(event, &cs->event); in sched_event_D_pci()
185 schedule_work(&cs->tqueue); in sched_event_D_pci()
194 test_and_set_bit(event, &bcs->event); in hfcpci_sched_event()
195 schedule_work(&bcs->tqueue); in hfcpci_sched_event()
199 /* select a b-channel entry matching and active */
203 Sel_BCS(struct IsdnCardState *cs, int channel) in Sel_BCS() argument
205 if (cs->bcs[0].mode && (cs->bcs[0].channel == channel)) in Sel_BCS()
206 return (&cs->bcs[0]); in Sel_BCS()
207 else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel)) in Sel_BCS()
208 return (&cs->bcs[1]); in Sel_BCS()
214 /* clear the desired B-channel rx fifo */
216 static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo) in hfcpci_clear_fifo_rx() argument
221 bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx()
222 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2RX; in hfcpci_clear_fifo_rx()
224 bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx()
225 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1RX; in hfcpci_clear_fifo_rx()
228 cs->hw.hfcpci.fifo_en ^= fifo_state; in hfcpci_clear_fifo_rx()
229 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_clear_fifo_rx()
230 cs->hw.hfcpci.last_bfifo_cnt[fifo] = 0; in hfcpci_clear_fifo_rx()
231 bzr->za[MAX_B_FRAMES].z1 = B_FIFO_SIZE + B_SUB_VAL - 1; in hfcpci_clear_fifo_rx()
232 bzr->za[MAX_B_FRAMES].z2 = bzr->za[MAX_B_FRAMES].z1; in hfcpci_clear_fifo_rx()
233 bzr->f1 = MAX_B_FRAMES; in hfcpci_clear_fifo_rx()
234 bzr->f2 = bzr->f1; /* init F pointers to remain constant */ in hfcpci_clear_fifo_rx()
236 cs->hw.hfcpci.fifo_en |= fifo_state; in hfcpci_clear_fifo_rx()
237 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_clear_fifo_rx()
241 /* clear the desired B-channel tx fifo */
243 static void hfcpci_clear_fifo_tx(struct IsdnCardState *cs, int fifo) in hfcpci_clear_fifo_tx() argument
248 bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx()
249 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2TX; in hfcpci_clear_fifo_tx()
251 bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx()
252 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1TX; in hfcpci_clear_fifo_tx()
255 cs->hw.hfcpci.fifo_en ^= fifo_state; in hfcpci_clear_fifo_tx()
256 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_clear_fifo_tx()
257 bzt->za[MAX_B_FRAMES].z1 = B_FIFO_SIZE + B_SUB_VAL - 1; in hfcpci_clear_fifo_tx()
258 bzt->za[MAX_B_FRAMES].z2 = bzt->za[MAX_B_FRAMES].z1; in hfcpci_clear_fifo_tx()
259 bzt->f1 = MAX_B_FRAMES; in hfcpci_clear_fifo_tx()
260 bzt->f2 = bzt->f1; /* init F pointers to remain constant */ in hfcpci_clear_fifo_tx()
262 cs->hw.hfcpci.fifo_en |= fifo_state; in hfcpci_clear_fifo_tx()
263 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_clear_fifo_tx()
267 /* read a complete B-frame out of the buffer */
275 struct IsdnCardState *cs = bcs->cs; in hfcpci_empty_fifo() local
279 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) in hfcpci_empty_fifo()
280 debugl1(cs, "hfcpci_empty_fifo"); in hfcpci_empty_fifo()
281 zp = &bz->za[bz->f2]; /* point to Z-Regs */ in hfcpci_empty_fifo()
282 new_z2 = zp->z2 + count; /* new position in fifo */ in hfcpci_empty_fifo()
284 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_empty_fifo()
285 new_f2 = (bz->f2 + 1) & MAX_B_FRAMES; in hfcpci_empty_fifo()
286 if ((count > HSCX_BUFMAX + 3) || (count < 4) || in hfcpci_empty_fifo()
287 (*(bdata + (zp->z1 - B_SUB_VAL)))) { in hfcpci_empty_fifo()
288 if (cs->debug & L1_DEB_WARN) in hfcpci_empty_fifo()
289 debugl1(cs, "hfcpci_empty_fifo: incoming packet invalid length %d or crc", count); in hfcpci_empty_fifo()
291 bcs->err_inv++; in hfcpci_empty_fifo()
293 bz->za[new_f2].z2 = new_z2; in hfcpci_empty_fifo()
294 bz->f2 = new_f2; /* next buffer */ in hfcpci_empty_fifo()
296 } else if (!(skb = dev_alloc_skb(count - 3))) in hfcpci_empty_fifo()
300 count -= 3; in hfcpci_empty_fifo()
303 if (zp->z2 + count <= B_FIFO_SIZE + B_SUB_VAL) in hfcpci_empty_fifo()
306 maxlen = B_FIFO_SIZE + B_SUB_VAL - zp->z2; /* maximum */ in hfcpci_empty_fifo()
308 ptr1 = bdata + (zp->z2 - B_SUB_VAL); /* start of data */ in hfcpci_empty_fifo()
310 count -= maxlen; in hfcpci_empty_fifo()
317 bz->za[new_f2].z2 = new_z2; in hfcpci_empty_fifo()
318 bz->f2 = new_f2; /* next buffer */ in hfcpci_empty_fifo()
325 /* D-channel receive procedure */
329 receive_dmsg(struct IsdnCardState *cs) in receive_dmsg() argument
339 df = &((fifo_area *) (cs->hw.hfcpci.fifos))->d_chan.d_rx; in receive_dmsg()
340 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in receive_dmsg()
341 debugl1(cs, "rec_dmsg blocked"); in receive_dmsg()
344 while (((df->f1 & D_FREG_MASK) != (df->f2 & D_FREG_MASK)) && count--) { in receive_dmsg()
345 zp = &df->za[df->f2 & D_FREG_MASK]; in receive_dmsg()
346 rcnt = zp->z1 - zp->z2; in receive_dmsg()
350 if (cs->debug & L1_DEB_ISAC) in receive_dmsg()
351 debugl1(cs, "hfcpci recd f1(%d) f2(%d) z1(%x) z2(%x) cnt(%d)", in receive_dmsg()
352 df->f1, df->f2, zp->z1, zp->z2, rcnt); in receive_dmsg()
354 if ((rcnt > MAX_DFRAME_LEN + 3) || (rcnt < 4) || in receive_dmsg()
355 (df->data[zp->z1])) { in receive_dmsg()
356 if (cs->debug & L1_DEB_WARN) in receive_dmsg()
357 debugl1(cs, "empty_fifo hfcpci paket inv. len %d or crc %d", rcnt, df->data[zp->z1]); in receive_dmsg()
359 cs->err_rx++; in receive_dmsg()
361 df->f2 = ((df->f2 + 1) & MAX_D_FRAMES) | (MAX_D_FRAMES + 1); /* next buffer */ in receive_dmsg()
362 df->za[df->f2 & D_FREG_MASK].z2 = (zp->z2 + rcnt) & (D_FIFO_SIZE - 1); in receive_dmsg()
363 } else if ((skb = dev_alloc_skb(rcnt - 3))) { in receive_dmsg()
365 rcnt -= 3; in receive_dmsg()
368 if (zp->z2 + rcnt <= D_FIFO_SIZE) in receive_dmsg()
371 maxlen = D_FIFO_SIZE - zp->z2; /* maximum */ in receive_dmsg()
373 ptr1 = df->data + zp->z2; /* start of data */ in receive_dmsg()
375 rcnt -= maxlen; in receive_dmsg()
379 ptr1 = df->data; /* start of buffer */ in receive_dmsg()
382 df->f2 = ((df->f2 + 1) & MAX_D_FRAMES) | (MAX_D_FRAMES + 1); /* next buffer */ in receive_dmsg()
383 df->za[df->f2 & D_FREG_MASK].z2 = (zp->z2 + total) & (D_FIFO_SIZE - 1); in receive_dmsg()
385 skb_queue_tail(&cs->rq, skb); in receive_dmsg()
386 sched_event_D_pci(cs, D_RCVBUFREADY); in receive_dmsg()
388 printk(KERN_WARNING "HFC-PCI: D receive out of memory\n"); in receive_dmsg()
390 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in receive_dmsg()
405 z1r = &bz->za[MAX_B_FRAMES].z1; /* pointer to z reg */ in hfcpci_empty_fifo_trans()
408 if (!(fcnt = *z1r - *z2r)) in hfcpci_empty_fifo_trans()
418 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_empty_fifo_trans()
427 maxlen = B_FIFO_SIZE + B_SUB_VAL - *z2r; /* maximum */ in hfcpci_empty_fifo_trans()
429 ptr1 = bdata + (*z2r - B_SUB_VAL); /* start of data */ in hfcpci_empty_fifo_trans()
431 fcnt -= maxlen; in hfcpci_empty_fifo_trans()
438 skb_queue_tail(&bcs->rqueue, skb); in hfcpci_empty_fifo_trans()
447 /* B-channel main receive routine */
452 struct IsdnCardState *cs = bcs->cs; in main_rec_hfcpci() local
461 if ((bcs->channel) && (!cs->hw.hfcpci.bswapped)) { in main_rec_hfcpci()
462 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci()
463 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2; in main_rec_hfcpci()
466 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b1; in main_rec_hfcpci()
467 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b1; in main_rec_hfcpci()
471 count--; in main_rec_hfcpci()
472 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in main_rec_hfcpci()
473 debugl1(cs, "rec_data %d blocked", bcs->channel); in main_rec_hfcpci()
476 if (bz->f1 != bz->f2) { in main_rec_hfcpci()
477 if (cs->debug & L1_DEB_HSCX) in main_rec_hfcpci()
478 debugl1(cs, "hfcpci rec %d f1(%d) f2(%d)", in main_rec_hfcpci()
479 bcs->channel, bz->f1, bz->f2); in main_rec_hfcpci()
480 zp = &bz->za[bz->f2]; in main_rec_hfcpci()
482 rcnt = zp->z1 - zp->z2; in main_rec_hfcpci()
486 if (cs->debug & L1_DEB_HSCX) in main_rec_hfcpci()
487 debugl1(cs, "hfcpci rec %d z1(%x) z2(%x) cnt(%d)", in main_rec_hfcpci()
488 bcs->channel, zp->z1, zp->z2, rcnt); in main_rec_hfcpci()
490 skb_queue_tail(&bcs->rqueue, skb); in main_rec_hfcpci()
493 rcnt = bz->f1 - bz->f2; in main_rec_hfcpci()
496 if (cs->hw.hfcpci.last_bfifo_cnt[real_fifo] > rcnt + 1) { in main_rec_hfcpci()
498 hfcpci_clear_fifo_rx(cs, real_fifo); in main_rec_hfcpci()
500 cs->hw.hfcpci.last_bfifo_cnt[real_fifo] = rcnt; in main_rec_hfcpci()
505 } else if (bcs->mode == L1_MODE_TRANS) in main_rec_hfcpci()
509 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in main_rec_hfcpci()
515 /* D-channel send routine */
518 hfcpci_fill_dfifo(struct IsdnCardState *cs) in hfcpci_fill_dfifo() argument
525 if (!cs->tx_skb) in hfcpci_fill_dfifo()
527 if (cs->tx_skb->len <= 0) in hfcpci_fill_dfifo()
530 df = &((fifo_area *) (cs->hw.hfcpci.fifos))->d_chan.d_tx; in hfcpci_fill_dfifo()
532 if (cs->debug & L1_DEB_ISAC) in hfcpci_fill_dfifo()
533 debugl1(cs, "hfcpci_fill_Dfifo f1(%d) f2(%d) z1(f1)(%x)", in hfcpci_fill_dfifo()
534 df->f1, df->f2, in hfcpci_fill_dfifo()
535 df->za[df->f1 & D_FREG_MASK].z1); in hfcpci_fill_dfifo()
536 fcnt = df->f1 - df->f2; /* frame count actually buffered */ in hfcpci_fill_dfifo()
539 if (fcnt > (MAX_D_FRAMES - 1)) { in hfcpci_fill_dfifo()
540 if (cs->debug & L1_DEB_ISAC) in hfcpci_fill_dfifo()
541 debugl1(cs, "hfcpci_fill_Dfifo more as 14 frames"); in hfcpci_fill_dfifo()
543 cs->err_tx++; in hfcpci_fill_dfifo()
548 count = df->za[df->f2 & D_FREG_MASK].z2 - df->za[df->f1 & D_FREG_MASK].z1 - 1; in hfcpci_fill_dfifo()
552 if (cs->debug & L1_DEB_ISAC) in hfcpci_fill_dfifo()
553 debugl1(cs, "hfcpci_fill_Dfifo count(%u/%d)", in hfcpci_fill_dfifo()
554 cs->tx_skb->len, count); in hfcpci_fill_dfifo()
555 if (count < cs->tx_skb->len) { in hfcpci_fill_dfifo()
556 if (cs->debug & L1_DEB_ISAC) in hfcpci_fill_dfifo()
557 debugl1(cs, "hfcpci_fill_Dfifo no fifo mem"); in hfcpci_fill_dfifo()
560 count = cs->tx_skb->len; /* get frame len */ in hfcpci_fill_dfifo()
561 new_z1 = (df->za[df->f1 & D_FREG_MASK].z1 + count) & (D_FIFO_SIZE - 1); in hfcpci_fill_dfifo()
562 new_f1 = ((df->f1 + 1) & D_FREG_MASK) | (D_FREG_MASK + 1); in hfcpci_fill_dfifo()
563 src = cs->tx_skb->data; /* source pointer */ in hfcpci_fill_dfifo()
564 dst = df->data + df->za[df->f1 & D_FREG_MASK].z1; in hfcpci_fill_dfifo()
565 maxlen = D_FIFO_SIZE - df->za[df->f1 & D_FREG_MASK].z1; /* end fifo */ in hfcpci_fill_dfifo()
570 count -= maxlen; /* remaining bytes */ in hfcpci_fill_dfifo()
572 dst = df->data; /* start of buffer */ in hfcpci_fill_dfifo()
576 df->za[new_f1 & D_FREG_MASK].z1 = new_z1; /* for next buffer */ in hfcpci_fill_dfifo()
577 df->za[df->f1 & D_FREG_MASK].z1 = new_z1; /* new pos actual buffer */ in hfcpci_fill_dfifo()
578 df->f1 = new_f1; /* next frame */ in hfcpci_fill_dfifo()
580 dev_kfree_skb_any(cs->tx_skb); in hfcpci_fill_dfifo()
581 cs->tx_skb = NULL; in hfcpci_fill_dfifo()
585 /* B-channel send routine */
590 struct IsdnCardState *cs = bcs->cs; in hfcpci_fill_fifo() local
598 if (!bcs->tx_skb) in hfcpci_fill_fifo()
600 if (bcs->tx_skb->len <= 0) in hfcpci_fill_fifo()
603 if ((bcs->channel) && (!cs->hw.hfcpci.bswapped)) { in hfcpci_fill_fifo()
604 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2; in hfcpci_fill_fifo()
605 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txdat_b2; in hfcpci_fill_fifo()
607 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b1; in hfcpci_fill_fifo()
608 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txdat_b1; in hfcpci_fill_fifo()
611 if (bcs->mode == L1_MODE_TRANS) { in hfcpci_fill_fifo()
612 z1t = &bz->za[MAX_B_FRAMES].z1; in hfcpci_fill_fifo()
614 if (cs->debug & L1_DEB_HSCX) in hfcpci_fill_fifo()
615 debugl1(cs, "hfcpci_fill_fifo_trans %d z1(%x) z2(%x)", in hfcpci_fill_fifo()
616 bcs->channel, *z1t, *z2t); in hfcpci_fill_fifo()
617 fcnt = *z2t - *z1t; in hfcpci_fill_fifo()
620 fcnt = B_FIFO_SIZE - fcnt; /* remaining bytes to send */ in hfcpci_fill_fifo()
622 while ((fcnt < 2 * HFCPCI_BTRANS_THRESHOLD) && (bcs->tx_skb)) { in hfcpci_fill_fifo()
623 if (bcs->tx_skb->len < B_FIFO_SIZE - fcnt) { in hfcpci_fill_fifo()
625 count = bcs->tx_skb->len; in hfcpci_fill_fifo()
629 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
630 src = bcs->tx_skb->data; /* source pointer */ in hfcpci_fill_fifo()
631 dst = bdata + (*z1t - B_SUB_VAL); in hfcpci_fill_fifo()
632 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - *z1t; /* end of fifo */ in hfcpci_fill_fifo()
637 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
643 bcs->tx_cnt -= bcs->tx_skb->len; in hfcpci_fill_fifo()
644 fcnt += bcs->tx_skb->len; in hfcpci_fill_fifo()
646 } else if (cs->debug & L1_DEB_HSCX) in hfcpci_fill_fifo()
647 debugl1(cs, "hfcpci_fill_fifo_trans %d frame length %d discarded", in hfcpci_fill_fifo()
648 bcs->channel, bcs->tx_skb->len); in hfcpci_fill_fifo()
650 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && in hfcpci_fill_fifo()
651 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { in hfcpci_fill_fifo()
653 spin_lock_irqsave(&bcs->aclock, flags); in hfcpci_fill_fifo()
654 bcs->ackcnt += bcs->tx_skb->len; in hfcpci_fill_fifo()
655 spin_unlock_irqrestore(&bcs->aclock, flags); in hfcpci_fill_fifo()
659 dev_kfree_skb_any(bcs->tx_skb); in hfcpci_fill_fifo()
660 bcs->tx_skb = skb_dequeue(&bcs->squeue); /* fetch next data */ in hfcpci_fill_fifo()
662 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in hfcpci_fill_fifo()
665 if (cs->debug & L1_DEB_HSCX) in hfcpci_fill_fifo()
666 debugl1(cs, "hfcpci_fill_fifo_hdlc %d f1(%d) f2(%d) z1(f1)(%x)", in hfcpci_fill_fifo()
667 bcs->channel, bz->f1, bz->f2, in hfcpci_fill_fifo()
668 bz->za[bz->f1].z1); in hfcpci_fill_fifo()
670 fcnt = bz->f1 - bz->f2; /* frame count actually buffered */ in hfcpci_fill_fifo()
673 if (fcnt > (MAX_B_FRAMES - 1)) { in hfcpci_fill_fifo()
674 if (cs->debug & L1_DEB_HSCX) in hfcpci_fill_fifo()
675 debugl1(cs, "hfcpci_fill_Bfifo more as 14 frames"); in hfcpci_fill_fifo()
679 count = bz->za[bz->f2].z2 - bz->za[bz->f1].z1 - 1; in hfcpci_fill_fifo()
683 if (cs->debug & L1_DEB_HSCX) in hfcpci_fill_fifo()
684 debugl1(cs, "hfcpci_fill_fifo %d count(%u/%d),%lx", in hfcpci_fill_fifo()
685 bcs->channel, bcs->tx_skb->len, in hfcpci_fill_fifo()
686 count, current->state); in hfcpci_fill_fifo()
688 if (count < bcs->tx_skb->len) { in hfcpci_fill_fifo()
689 if (cs->debug & L1_DEB_HSCX) in hfcpci_fill_fifo()
690 debugl1(cs, "hfcpci_fill_fifo no fifo mem"); in hfcpci_fill_fifo()
693 count = bcs->tx_skb->len; /* get frame len */ in hfcpci_fill_fifo()
694 new_z1 = bz->za[bz->f1].z1 + count; /* new buffer Position */ in hfcpci_fill_fifo()
696 new_z1 -= B_FIFO_SIZE; /* buffer wrap */ in hfcpci_fill_fifo()
698 new_f1 = ((bz->f1 + 1) & MAX_B_FRAMES); in hfcpci_fill_fifo()
699 src = bcs->tx_skb->data; /* source pointer */ in hfcpci_fill_fifo()
700 dst = bdata + (bz->za[bz->f1].z1 - B_SUB_VAL); in hfcpci_fill_fifo()
701 maxlen = (B_FIFO_SIZE + B_SUB_VAL) - bz->za[bz->f1].z1; /* end fifo */ in hfcpci_fill_fifo()
706 count -= maxlen; /* remaining bytes */ in hfcpci_fill_fifo()
712 bcs->tx_cnt -= bcs->tx_skb->len; in hfcpci_fill_fifo()
713 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && in hfcpci_fill_fifo()
714 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { in hfcpci_fill_fifo()
716 spin_lock_irqsave(&bcs->aclock, flags); in hfcpci_fill_fifo()
717 bcs->ackcnt += bcs->tx_skb->len; in hfcpci_fill_fifo()
718 spin_unlock_irqrestore(&bcs->aclock, flags); in hfcpci_fill_fifo()
722 bz->za[new_f1].z1 = new_z1; /* for next buffer */ in hfcpci_fill_fifo()
723 bz->f1 = new_f1; /* next frame */ in hfcpci_fill_fifo()
725 dev_kfree_skb_any(bcs->tx_skb); in hfcpci_fill_fifo()
726 bcs->tx_skb = NULL; in hfcpci_fill_fifo()
727 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in hfcpci_fill_fifo()
731 /* D-channel l1 state call for leased NT-mode */
736 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; in dch_nt_l2l1() local
742 st->l1.l1hw(st, pr, arg); in dch_nt_l2l1()
745 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); in dch_nt_l2l1()
749 debugl1(cs, "PH_TEST_LOOP B1"); in dch_nt_l2l1()
751 debugl1(cs, "PH_TEST_LOOP B2"); in dch_nt_l2l1()
752 if (!(3 & (long) arg)) in dch_nt_l2l1()
753 debugl1(cs, "PH_TEST_LOOP DISABLED"); in dch_nt_l2l1()
754 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg); in dch_nt_l2l1()
757 if (cs->debug) in dch_nt_l2l1()
758 debugl1(cs, "dch_nt_l2l1 msg %04X unhandled", pr); in dch_nt_l2l1()
769 hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic) in hfcpci_auxcmd() argument
772 int i = *(unsigned int *) ic->parm.num; in hfcpci_auxcmd()
774 if ((ic->arg == 98) && in hfcpci_auxcmd()
775 …(!(cs->hw.hfcpci.int_m1 & (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC + HFCPCI_INTS_B1TRANS + HFCPCI_… in hfcpci_auxcmd()
776 spin_lock_irqsave(&cs->lock, flags); in hfcpci_auxcmd()
777 Write_hfc(cs, HFCPCI_CLKDEL, CLKDEL_NT); /* ST-Bit delay for NT-Mode */ in hfcpci_auxcmd()
778 Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 0); /* HFC ST G0 */ in hfcpci_auxcmd()
780 cs->hw.hfcpci.sctrl |= SCTRL_MODE_NT; in hfcpci_auxcmd()
781 Write_hfc(cs, HFCPCI_SCTRL, cs->hw.hfcpci.sctrl); /* set NT-mode */ in hfcpci_auxcmd()
783 Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 1); /* HFC ST G1 */ in hfcpci_auxcmd()
785 Write_hfc(cs, HFCPCI_STATES, 1 | HFCPCI_ACTIVATE | HFCPCI_DO_ACTION); in hfcpci_auxcmd()
786 cs->dc.hfcpci.ph_state = 1; in hfcpci_auxcmd()
787 cs->hw.hfcpci.nt_mode = 1; in hfcpci_auxcmd()
788 cs->hw.hfcpci.nt_timer = 0; in hfcpci_auxcmd()
789 cs->stlist->l2.l2l1 = dch_nt_l2l1; in hfcpci_auxcmd()
790 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_auxcmd()
791 debugl1(cs, "NT mode activated"); in hfcpci_auxcmd()
794 if ((cs->chanlimit > 1) || (cs->hw.hfcpci.bswapped) || in hfcpci_auxcmd()
795 (cs->hw.hfcpci.nt_mode) || (ic->arg != 12)) in hfcpci_auxcmd()
796 return (-EINVAL); in hfcpci_auxcmd()
798 spin_lock_irqsave(&cs->lock, flags); in hfcpci_auxcmd()
800 cs->logecho = 1; in hfcpci_auxcmd()
801 cs->hw.hfcpci.trm |= 0x20; /* enable echo chan */ in hfcpci_auxcmd()
802 cs->hw.hfcpci.int_m1 |= HFCPCI_INTS_B2REC; in hfcpci_auxcmd()
803 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2RX; in hfcpci_auxcmd()
805 cs->logecho = 0; in hfcpci_auxcmd()
806 cs->hw.hfcpci.trm &= ~0x20; /* disable echo chan */ in hfcpci_auxcmd()
807 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_B2REC; in hfcpci_auxcmd()
808 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2RX; in hfcpci_auxcmd()
810 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B2_ENA; in hfcpci_auxcmd()
811 cs->hw.hfcpci.sctrl &= ~SCTRL_B2_ENA; in hfcpci_auxcmd()
812 cs->hw.hfcpci.conn |= 0x10; /* B2-IOM -> B2-ST */ in hfcpci_auxcmd()
813 cs->hw.hfcpci.ctmt &= ~2; in hfcpci_auxcmd()
814 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt); in hfcpci_auxcmd()
815 Write_hfc(cs, HFCPCI_SCTRL_R, cs->hw.hfcpci.sctrl_r); in hfcpci_auxcmd()
816 Write_hfc(cs, HFCPCI_SCTRL, cs->hw.hfcpci.sctrl); in hfcpci_auxcmd()
817 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in hfcpci_auxcmd()
818 Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm); in hfcpci_auxcmd()
819 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_auxcmd()
820 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_auxcmd()
821 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_auxcmd()
826 /* E-channel receive routine */
829 receive_emsg(struct IsdnCardState *cs) in receive_emsg() argument
840 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2; in receive_emsg()
841 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2; in receive_emsg()
843 count--; in receive_emsg()
844 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in receive_emsg()
845 debugl1(cs, "echo_rec_data blocked"); in receive_emsg()
848 if (bz->f1 != bz->f2) { in receive_emsg()
849 if (cs->debug & L1_DEB_ISAC) in receive_emsg()
850 debugl1(cs, "hfcpci e_rec f1(%d) f2(%d)", in receive_emsg()
851 bz->f1, bz->f2); in receive_emsg()
852 zp = &bz->za[bz->f2]; in receive_emsg()
854 rcnt = zp->z1 - zp->z2; in receive_emsg()
858 if (cs->debug & L1_DEB_ISAC) in receive_emsg()
859 debugl1(cs, "hfcpci e_rec z1(%x) z2(%x) cnt(%d)", in receive_emsg()
860 zp->z1, zp->z2, rcnt); in receive_emsg()
861 new_z2 = zp->z2 + rcnt; /* new position in fifo */ in receive_emsg()
863 new_z2 -= B_FIFO_SIZE; /* buffer wrap */ in receive_emsg()
864 new_f2 = (bz->f2 + 1) & MAX_B_FRAMES; in receive_emsg()
865 if ((rcnt > 256 + 3) || (count < 4) || in receive_emsg()
866 (*(bdata + (zp->z1 - B_SUB_VAL)))) { in receive_emsg()
867 if (cs->debug & L1_DEB_WARN) in receive_emsg()
868 debugl1(cs, "hfcpci_empty_echan: incoming packet invalid length %d or crc", rcnt); in receive_emsg()
869 bz->za[new_f2].z2 = new_z2; in receive_emsg()
870 bz->f2 = new_f2; /* next buffer */ in receive_emsg()
873 rcnt -= 3; in receive_emsg()
876 if (zp->z2 <= B_FIFO_SIZE + B_SUB_VAL) in receive_emsg()
879 maxlen = B_FIFO_SIZE + B_SUB_VAL - zp->z2; /* maximum */ in receive_emsg()
881 ptr1 = bdata + (zp->z2 - B_SUB_VAL); /* start of data */ in receive_emsg()
883 rcnt -= maxlen; in receive_emsg()
890 bz->za[new_f2].z2 = new_z2; in receive_emsg()
891 bz->f2 = new_f2; /* next buffer */ in receive_emsg()
892 if (cs->debug & DEB_DLOG_HEX) { in receive_emsg()
893 ptr = cs->dlog; in receive_emsg()
894 if ((total - 3) < MAX_DLOG_SPACE / 3 - 10) { in receive_emsg()
900 ptr += QuickHex(ptr, e_buffer, total - 3); in receive_emsg()
901 ptr--; in receive_emsg()
904 HiSax_putstatus(cs, NULL, cs->dlog); in receive_emsg()
906 HiSax_putstatus(cs, "LogEcho: ", "warning Frame too big (%d)", total - 3); in receive_emsg()
910 rcnt = bz->f1 - bz->f2; in receive_emsg()
919 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in receive_emsg()
931 struct IsdnCardState *cs = dev_id; in hfcpci_interrupt() local
937 if (!(cs->hw.hfcpci.int_m2 & 0x08)) { in hfcpci_interrupt()
938 debugl1(cs, "HFC-PCI: int_m2 %x not initialised", cs->hw.hfcpci.int_m2); in hfcpci_interrupt()
941 spin_lock_irqsave(&cs->lock, flags); in hfcpci_interrupt()
942 if (HFCPCI_ANYINT & (stat = Read_hfc(cs, HFCPCI_STATUS))) { in hfcpci_interrupt()
943 val = Read_hfc(cs, HFCPCI_INT_S1); in hfcpci_interrupt()
944 if (cs->debug & L1_DEB_ISAC) in hfcpci_interrupt()
945 debugl1(cs, "HFC-PCI: stat(%02x) s1(%02x)", stat, val); in hfcpci_interrupt()
947 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_interrupt()
950 if (cs->debug & L1_DEB_ISAC) in hfcpci_interrupt()
951 debugl1(cs, "HFC-PCI irq %x %s", val, in hfcpci_interrupt()
952 test_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags) ? in hfcpci_interrupt()
954 val &= cs->hw.hfcpci.int_m1; in hfcpci_interrupt()
956 exval = Read_hfc(cs, HFCPCI_STATES) & 0xf; in hfcpci_interrupt()
957 if (cs->debug & L1_DEB_ISAC) in hfcpci_interrupt()
958 debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcpci.ph_state, in hfcpci_interrupt()
960 cs->dc.hfcpci.ph_state = exval; in hfcpci_interrupt()
961 sched_event_D_pci(cs, D_L1STATECHANGE); in hfcpci_interrupt()
965 if (cs->hw.hfcpci.nt_mode) { in hfcpci_interrupt()
966 if ((--cs->hw.hfcpci.nt_timer) < 0) in hfcpci_interrupt()
967 sched_event_D_pci(cs, D_L1STATECHANGE); in hfcpci_interrupt()
970 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER); in hfcpci_interrupt()
973 if (test_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in hfcpci_interrupt()
974 cs->hw.hfcpci.int_s1 |= val; in hfcpci_interrupt()
975 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_interrupt()
978 if (cs->hw.hfcpci.int_s1 & 0x18) { in hfcpci_interrupt()
980 val = cs->hw.hfcpci.int_s1; in hfcpci_interrupt()
981 cs->hw.hfcpci.int_s1 = exval; in hfcpci_interrupt()
984 if (!(bcs = Sel_BCS(cs, cs->hw.hfcpci.bswapped ? 1 : 0))) { in hfcpci_interrupt()
985 if (cs->debug) in hfcpci_interrupt()
986 debugl1(cs, "hfcpci spurious 0x08 IRQ"); in hfcpci_interrupt()
991 if (cs->logecho) in hfcpci_interrupt()
992 receive_emsg(cs); in hfcpci_interrupt()
993 else if (!(bcs = Sel_BCS(cs, 1))) { in hfcpci_interrupt()
994 if (cs->debug) in hfcpci_interrupt()
995 debugl1(cs, "hfcpci spurious 0x10 IRQ"); in hfcpci_interrupt()
1000 if (!(bcs = Sel_BCS(cs, cs->hw.hfcpci.bswapped ? 1 : 0))) { in hfcpci_interrupt()
1001 if (cs->debug) in hfcpci_interrupt()
1002 debugl1(cs, "hfcpci spurious 0x01 IRQ"); in hfcpci_interrupt()
1004 if (bcs->tx_skb) { in hfcpci_interrupt()
1005 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in hfcpci_interrupt()
1007 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in hfcpci_interrupt()
1009 debugl1(cs, "fill_data %d blocked", bcs->channel); in hfcpci_interrupt()
1011 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { in hfcpci_interrupt()
1012 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in hfcpci_interrupt()
1014 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in hfcpci_interrupt()
1016 debugl1(cs, "fill_data %d blocked", bcs->channel); in hfcpci_interrupt()
1024 if (!(bcs = Sel_BCS(cs, 1))) { in hfcpci_interrupt()
1025 if (cs->debug) in hfcpci_interrupt()
1026 debugl1(cs, "hfcpci spurious 0x02 IRQ"); in hfcpci_interrupt()
1028 if (bcs->tx_skb) { in hfcpci_interrupt()
1029 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in hfcpci_interrupt()
1031 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in hfcpci_interrupt()
1033 debugl1(cs, "fill_data %d blocked", bcs->channel); in hfcpci_interrupt()
1035 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { in hfcpci_interrupt()
1036 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in hfcpci_interrupt()
1038 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in hfcpci_interrupt()
1040 debugl1(cs, "fill_data %d blocked", bcs->channel); in hfcpci_interrupt()
1048 receive_dmsg(cs); in hfcpci_interrupt()
1051 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) in hfcpci_interrupt()
1052 del_timer(&cs->dbusytimer); in hfcpci_interrupt()
1053 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) in hfcpci_interrupt()
1054 sched_event_D_pci(cs, D_CLEARBUSY); in hfcpci_interrupt()
1055 if (cs->tx_skb) { in hfcpci_interrupt()
1056 if (cs->tx_skb->len) { in hfcpci_interrupt()
1057 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in hfcpci_interrupt()
1058 hfcpci_fill_dfifo(cs); in hfcpci_interrupt()
1059 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in hfcpci_interrupt()
1061 debugl1(cs, "hfcpci_fill_dfifo irq blocked"); in hfcpci_interrupt()
1065 dev_kfree_skb_irq(cs->tx_skb); in hfcpci_interrupt()
1066 cs->tx_cnt = 0; in hfcpci_interrupt()
1067 cs->tx_skb = NULL; in hfcpci_interrupt()
1070 if ((cs->tx_skb = skb_dequeue(&cs->sq))) { in hfcpci_interrupt()
1071 cs->tx_cnt = 0; in hfcpci_interrupt()
1072 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in hfcpci_interrupt()
1073 hfcpci_fill_dfifo(cs); in hfcpci_interrupt()
1074 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in hfcpci_interrupt()
1076 debugl1(cs, "hfcpci_fill_dfifo irq blocked"); in hfcpci_interrupt()
1079 sched_event_D_pci(cs, D_XMTBUFREADY); in hfcpci_interrupt()
1082 if (cs->hw.hfcpci.int_s1 && count--) { in hfcpci_interrupt()
1083 val = cs->hw.hfcpci.int_s1; in hfcpci_interrupt()
1084 cs->hw.hfcpci.int_s1 = 0; in hfcpci_interrupt()
1085 if (cs->debug & L1_DEB_ISAC) in hfcpci_interrupt()
1086 debugl1(cs, "HFC-PCI irq %x loop %d", val, 15 - count); in hfcpci_interrupt()
1090 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_interrupt()
1095 /* timer callback for D-chan busy resolution. Currently no function */
1098 hfcpci_dbusy_timer(struct IsdnCardState *cs) in hfcpci_dbusy_timer() argument
1103 /* Layer 1 D-channel hardware access */
1109 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; in HFCPCI_l1hw() local
1114 if (cs->debug & DEB_DLOG_HEX) in HFCPCI_l1hw()
1115 LogFrame(cs, skb->data, skb->len); in HFCPCI_l1hw()
1116 if (cs->debug & DEB_DLOG_VERBOSE) in HFCPCI_l1hw()
1117 dlogframe(cs, skb, 0); in HFCPCI_l1hw()
1118 spin_lock_irqsave(&cs->lock, flags); in HFCPCI_l1hw()
1119 if (cs->tx_skb) { in HFCPCI_l1hw()
1120 skb_queue_tail(&cs->sq, skb); in HFCPCI_l1hw()
1122 if (cs->debug & L1_DEB_LAPD) in HFCPCI_l1hw()
1123 Logl2Frame(cs, skb, "PH_DATA Queued", 0); in HFCPCI_l1hw()
1126 cs->tx_skb = skb; in HFCPCI_l1hw()
1127 cs->tx_cnt = 0; in HFCPCI_l1hw()
1129 if (cs->debug & L1_DEB_LAPD) in HFCPCI_l1hw()
1130 Logl2Frame(cs, skb, "PH_DATA", 0); in HFCPCI_l1hw()
1132 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in HFCPCI_l1hw()
1133 hfcpci_fill_dfifo(cs); in HFCPCI_l1hw()
1134 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in HFCPCI_l1hw()
1136 debugl1(cs, "hfcpci_fill_dfifo blocked"); in HFCPCI_l1hw()
1139 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1142 spin_lock_irqsave(&cs->lock, flags); in HFCPCI_l1hw()
1143 if (cs->tx_skb) { in HFCPCI_l1hw()
1144 if (cs->debug & L1_DEB_WARN) in HFCPCI_l1hw()
1145 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); in HFCPCI_l1hw()
1146 skb_queue_tail(&cs->sq, skb); in HFCPCI_l1hw()
1147 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1150 if (cs->debug & DEB_DLOG_HEX) in HFCPCI_l1hw()
1151 LogFrame(cs, skb->data, skb->len); in HFCPCI_l1hw()
1152 if (cs->debug & DEB_DLOG_VERBOSE) in HFCPCI_l1hw()
1153 dlogframe(cs, skb, 0); in HFCPCI_l1hw()
1154 cs->tx_skb = skb; in HFCPCI_l1hw()
1155 cs->tx_cnt = 0; in HFCPCI_l1hw()
1157 if (cs->debug & L1_DEB_LAPD) in HFCPCI_l1hw()
1158 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); in HFCPCI_l1hw()
1160 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in HFCPCI_l1hw()
1161 hfcpci_fill_dfifo(cs); in HFCPCI_l1hw()
1162 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in HFCPCI_l1hw()
1164 debugl1(cs, "hfcpci_fill_dfifo blocked"); in HFCPCI_l1hw()
1165 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1169 if (cs->debug & L1_DEB_LAPD) in HFCPCI_l1hw()
1170 debugl1(cs, "-> PH_REQUEST_PULL"); in HFCPCI_l1hw()
1172 if (!cs->tx_skb) { in HFCPCI_l1hw()
1173 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); in HFCPCI_l1hw()
1174 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); in HFCPCI_l1hw()
1176 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); in HFCPCI_l1hw()
1179 spin_lock_irqsave(&cs->lock, flags); in HFCPCI_l1hw()
1180 Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 3); /* HFC ST 3 */ in HFCPCI_l1hw()
1182 Write_hfc(cs, HFCPCI_STATES, 3); /* HFC ST 2 */ in HFCPCI_l1hw()
1183 cs->hw.hfcpci.mst_m |= HFCPCI_MASTER; in HFCPCI_l1hw()
1184 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in HFCPCI_l1hw()
1185 Write_hfc(cs, HFCPCI_STATES, HFCPCI_ACTIVATE | HFCPCI_DO_ACTION); in HFCPCI_l1hw()
1186 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1187 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); in HFCPCI_l1hw()
1190 spin_lock_irqsave(&cs->lock, flags); in HFCPCI_l1hw()
1191 Write_hfc(cs, HFCPCI_STATES, HFCPCI_DO_ACTION); in HFCPCI_l1hw()
1192 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1195 spin_lock_irqsave(&cs->lock, flags); in HFCPCI_l1hw()
1196 cs->hw.hfcpci.mst_m &= ~HFCPCI_MASTER; in HFCPCI_l1hw()
1197 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in HFCPCI_l1hw()
1198 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1201 spin_lock_irqsave(&cs->lock, flags); in HFCPCI_l1hw()
1202 cs->hw.hfcpci.mst_m |= HFCPCI_MASTER; in HFCPCI_l1hw()
1203 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in HFCPCI_l1hw()
1204 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1207 spin_lock_irqsave(&cs->lock, flags); in HFCPCI_l1hw()
1210 Write_hfc(cs, HFCPCI_B1_SSL, 0x80); /* tx slot */ in HFCPCI_l1hw()
1211 Write_hfc(cs, HFCPCI_B1_RSL, 0x80); /* rx slot */ in HFCPCI_l1hw()
1212 cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~7) | 1; in HFCPCI_l1hw()
1213 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in HFCPCI_l1hw()
1217 Write_hfc(cs, HFCPCI_B2_SSL, 0x81); /* tx slot */ in HFCPCI_l1hw()
1218 Write_hfc(cs, HFCPCI_B2_RSL, 0x81); /* rx slot */ in HFCPCI_l1hw()
1219 cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~0x38) | 0x08; in HFCPCI_l1hw()
1220 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in HFCPCI_l1hw()
1224 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1225 if (cs->debug & L1_DEB_WARN) in HFCPCI_l1hw()
1226 debugl1(cs, "hfcpci_l1hw loop invalid %4lx", (long) arg); in HFCPCI_l1hw()
1229 cs->hw.hfcpci.trm |= 0x80; /* enable IOM-loop */ in HFCPCI_l1hw()
1230 Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm); in HFCPCI_l1hw()
1231 spin_unlock_irqrestore(&cs->lock, flags); in HFCPCI_l1hw()
1234 if (cs->debug & L1_DEB_WARN) in HFCPCI_l1hw()
1235 debugl1(cs, "hfcpci_l1hw unknown pr %4x", pr); in HFCPCI_l1hw()
1244 setstack_hfcpci(struct PStack *st, struct IsdnCardState *cs) in setstack_hfcpci() argument
1246 st->l1.l1hw = HFCPCI_l1hw; in setstack_hfcpci()
1250 /* send B-channel data if not blocked */
1255 struct IsdnCardState *cs = bcs->cs; in hfcpci_send_data() local
1257 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { in hfcpci_send_data()
1259 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); in hfcpci_send_data()
1261 debugl1(cs, "send_data %d blocked", bcs->channel); in hfcpci_send_data()
1270 struct IsdnCardState *cs = bcs->cs; in mode_hfcpci() local
1273 if (cs->debug & L1_DEB_HSCX) in mode_hfcpci()
1274 debugl1(cs, "HFCPCI bchannel mode %d bchan %d/%d", in mode_hfcpci()
1275 mode, bc, bcs->channel); in mode_hfcpci()
1276 bcs->mode = mode; in mode_hfcpci()
1277 bcs->channel = bc; in mode_hfcpci()
1279 if (cs->chanlimit > 1) { in mode_hfcpci()
1280 cs->hw.hfcpci.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1281 cs->hw.hfcpci.sctrl_e &= ~0x80; in mode_hfcpci()
1285 cs->hw.hfcpci.bswapped = 1; /* B1 and B2 exchanged */ in mode_hfcpci()
1286 cs->hw.hfcpci.sctrl_e |= 0x80; in mode_hfcpci()
1288 cs->hw.hfcpci.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1289 cs->hw.hfcpci.sctrl_e &= ~0x80; in mode_hfcpci()
1293 cs->hw.hfcpci.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1294 cs->hw.hfcpci.sctrl_e &= ~0x80; in mode_hfcpci()
1300 cs->hw.hfcpci.sctrl &= ~SCTRL_B2_ENA; in mode_hfcpci()
1301 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B2_ENA; in mode_hfcpci()
1303 cs->hw.hfcpci.sctrl &= ~SCTRL_B1_ENA; in mode_hfcpci()
1304 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B1_ENA; in mode_hfcpci()
1307 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2; in mode_hfcpci()
1308 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); in mode_hfcpci()
1310 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1; in mode_hfcpci()
1311 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); in mode_hfcpci()
1315 hfcpci_clear_fifo_rx(cs, fifo2); in mode_hfcpci()
1316 hfcpci_clear_fifo_tx(cs, fifo2); in mode_hfcpci()
1318 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1319 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1321 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1322 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1325 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1326 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); in mode_hfcpci()
1327 cs->hw.hfcpci.ctmt |= 2; in mode_hfcpci()
1328 cs->hw.hfcpci.conn &= ~0x18; in mode_hfcpci()
1330 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1331 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); in mode_hfcpci()
1332 cs->hw.hfcpci.ctmt |= 1; in mode_hfcpci()
1333 cs->hw.hfcpci.conn &= ~0x03; in mode_hfcpci()
1337 hfcpci_clear_fifo_rx(cs, fifo2); in mode_hfcpci()
1338 hfcpci_clear_fifo_tx(cs, fifo2); in mode_hfcpci()
1340 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1341 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1343 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1344 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1347 cs->hw.hfcpci.last_bfifo_cnt[1] = 0; in mode_hfcpci()
1348 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1349 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); in mode_hfcpci()
1350 cs->hw.hfcpci.ctmt &= ~2; in mode_hfcpci()
1351 cs->hw.hfcpci.conn &= ~0x18; in mode_hfcpci()
1353 cs->hw.hfcpci.last_bfifo_cnt[0] = 0; in mode_hfcpci()
1354 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1355 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); in mode_hfcpci()
1356 cs->hw.hfcpci.ctmt &= ~1; in mode_hfcpci()
1357 cs->hw.hfcpci.conn &= ~0x03; in mode_hfcpci()
1362 cs->hw.hfcpci.conn |= 0x10; in mode_hfcpci()
1363 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1364 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1365 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2; in mode_hfcpci()
1366 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); in mode_hfcpci()
1368 cs->hw.hfcpci.conn |= 0x02; in mode_hfcpci()
1369 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1370 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1371 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1; in mode_hfcpci()
1372 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); in mode_hfcpci()
1376 Write_hfc(cs, HFCPCI_SCTRL_E, cs->hw.hfcpci.sctrl_e); in mode_hfcpci()
1377 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in mode_hfcpci()
1378 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in mode_hfcpci()
1379 Write_hfc(cs, HFCPCI_SCTRL, cs->hw.hfcpci.sctrl); in mode_hfcpci()
1380 Write_hfc(cs, HFCPCI_SCTRL_R, cs->hw.hfcpci.sctrl_r); in mode_hfcpci()
1381 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt); in mode_hfcpci()
1382 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in mode_hfcpci()
1386 /* Layer2 -> Layer 1 Transfer */
1391 struct BCState *bcs = st->l1.bcs; in hfcpci_l2l1()
1397 spin_lock_irqsave(&bcs->cs->lock, flags); in hfcpci_l2l1()
1398 if (bcs->tx_skb) { in hfcpci_l2l1()
1399 skb_queue_tail(&bcs->squeue, skb); in hfcpci_l2l1()
1401 bcs->tx_skb = skb; in hfcpci_l2l1()
1402 // test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); in hfcpci_l2l1()
1403 bcs->cs->BC_Send_Data(bcs); in hfcpci_l2l1()
1405 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hfcpci_l2l1()
1408 spin_lock_irqsave(&bcs->cs->lock, flags); in hfcpci_l2l1()
1409 if (bcs->tx_skb) { in hfcpci_l2l1()
1410 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hfcpci_l2l1()
1414 // test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); in hfcpci_l2l1()
1415 bcs->tx_skb = skb; in hfcpci_l2l1()
1416 bcs->cs->BC_Send_Data(bcs); in hfcpci_l2l1()
1417 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hfcpci_l2l1()
1420 if (!bcs->tx_skb) { in hfcpci_l2l1()
1421 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); in hfcpci_l2l1()
1422 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); in hfcpci_l2l1()
1424 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); in hfcpci_l2l1()
1427 spin_lock_irqsave(&bcs->cs->lock, flags); in hfcpci_l2l1()
1428 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); in hfcpci_l2l1()
1429 mode_hfcpci(bcs, st->l1.mode, st->l1.bc); in hfcpci_l2l1()
1430 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hfcpci_l2l1()
1437 spin_lock_irqsave(&bcs->cs->lock, flags); in hfcpci_l2l1()
1438 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); in hfcpci_l2l1()
1439 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in hfcpci_l2l1()
1440 mode_hfcpci(bcs, 0, st->l1.bc); in hfcpci_l2l1()
1441 spin_unlock_irqrestore(&bcs->cs->lock, flags); in hfcpci_l2l1()
1442 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); in hfcpci_l2l1()
1448 /* deactivate B-channel access and queues */
1453 mode_hfcpci(bcs, 0, bcs->channel); in close_hfcpci()
1454 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) { in close_hfcpci()
1455 skb_queue_purge(&bcs->rqueue); in close_hfcpci()
1456 skb_queue_purge(&bcs->squeue); in close_hfcpci()
1457 if (bcs->tx_skb) { in close_hfcpci()
1458 dev_kfree_skb_any(bcs->tx_skb); in close_hfcpci()
1459 bcs->tx_skb = NULL; in close_hfcpci()
1460 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in close_hfcpci()
1466 /* init B-channel queues and control */
1469 open_hfcpcistate(struct IsdnCardState *cs, struct BCState *bcs) in open_hfcpcistate() argument
1471 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) { in open_hfcpcistate()
1472 skb_queue_head_init(&bcs->rqueue); in open_hfcpcistate()
1473 skb_queue_head_init(&bcs->squeue); in open_hfcpcistate()
1475 bcs->tx_skb = NULL; in open_hfcpcistate()
1476 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in open_hfcpcistate()
1477 bcs->event = 0; in open_hfcpcistate()
1478 bcs->tx_cnt = 0; in open_hfcpcistate()
1483 /* inits the stack for B-channel */
1488 bcs->channel = st->l1.bc; in setstack_2b()
1489 if (open_hfcpcistate(st->l1.hardware, bcs)) in setstack_2b()
1490 return (-1); in setstack_2b()
1491 st->l1.bcs = bcs; in setstack_2b()
1492 st->l2.l2l1 = hfcpci_l2l1; in setstack_2b()
1494 bcs->st = st; in setstack_2b()
1505 struct IsdnCardState *cs = in hfcpci_bh() local
1510 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) { in hfcpci_bh()
1511 if (!cs->hw.hfcpci.nt_mode) in hfcpci_bh()
1512 switch (cs->dc.hfcpci.ph_state) { in hfcpci_bh()
1514 l1_msg(cs, HW_RESET | INDICATION, NULL); in hfcpci_bh()
1516 case (3): in hfcpci_bh()
1517 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); in hfcpci_bh()
1520 l1_msg(cs, HW_RSYNC | INDICATION, NULL); in hfcpci_bh()
1523 l1_msg(cs, HW_INFO2 | INDICATION, NULL); in hfcpci_bh()
1526 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); in hfcpci_bh()
1531 spin_lock_irqsave(&cs->lock, flags); in hfcpci_bh()
1532 switch (cs->dc.hfcpci.ph_state) { in hfcpci_bh()
1534 if (cs->hw.hfcpci.nt_timer < 0) { in hfcpci_bh()
1535 cs->hw.hfcpci.nt_timer = 0; in hfcpci_bh()
1536 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER; in hfcpci_bh()
1537 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_bh()
1539 if (Read_hfc(cs, HFCPCI_INT_S1)); in hfcpci_bh()
1540 Write_hfc(cs, HFCPCI_STATES, 4 | HFCPCI_LOAD_STATE); in hfcpci_bh()
1542 Write_hfc(cs, HFCPCI_STATES, 4); in hfcpci_bh()
1543 cs->dc.hfcpci.ph_state = 4; in hfcpci_bh()
1545 cs->hw.hfcpci.int_m1 |= HFCPCI_INTS_TIMER; in hfcpci_bh()
1546 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_bh()
1547 cs->hw.hfcpci.ctmt &= ~HFCPCI_AUTO_TIMER; in hfcpci_bh()
1548 cs->hw.hfcpci.ctmt |= HFCPCI_TIM3_125; in hfcpci_bh()
1549 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER); in hfcpci_bh()
1550 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER); in hfcpci_bh()
1551 cs->hw.hfcpci.nt_timer = NT_T1_COUNT; in hfcpci_bh()
1552 Write_hfc(cs, HFCPCI_STATES, 2 | HFCPCI_NT_G2_G3); /* allow G2 -> G3 transition */ in hfcpci_bh()
1556 case (3): in hfcpci_bh()
1558 cs->hw.hfcpci.nt_timer = 0; in hfcpci_bh()
1559 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER; in hfcpci_bh()
1560 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_bh()
1565 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_bh()
1568 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event)) in hfcpci_bh()
1569 DChannel_proc_rcv(cs); in hfcpci_bh()
1570 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) in hfcpci_bh()
1571 DChannel_proc_xmt(cs); in hfcpci_bh()
1579 inithfcpci(struct IsdnCardState *cs) in inithfcpci() argument
1581 cs->bcs[0].BC_SetStack = setstack_2b; in inithfcpci()
1582 cs->bcs[1].BC_SetStack = setstack_2b; in inithfcpci()
1583 cs->bcs[0].BC_Close = close_hfcpci; in inithfcpci()
1584 cs->bcs[1].BC_Close = close_hfcpci; in inithfcpci()
1585 cs->dbusytimer.function = (void *) hfcpci_dbusy_timer; in inithfcpci()
1586 cs->dbusytimer.data = (long) cs; in inithfcpci()
1587 init_timer(&cs->dbusytimer); in inithfcpci()
1588 mode_hfcpci(cs->bcs, 0, 0); in inithfcpci()
1589 mode_hfcpci(cs->bcs + 1, 0, 1); in inithfcpci()
1598 hfcpci_card_msg(struct IsdnCardState *cs, int mt, void *arg) in hfcpci_card_msg() argument
1602 if (cs->debug & L1_DEB_ISAC) in hfcpci_card_msg()
1603 debugl1(cs, "HFCPCI: card_msg %x", mt); in hfcpci_card_msg()
1606 spin_lock_irqsave(&cs->lock, flags); in hfcpci_card_msg()
1607 reset_hfcpci(cs); in hfcpci_card_msg()
1608 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_card_msg()
1611 release_io_hfcpci(cs); in hfcpci_card_msg()
1614 spin_lock_irqsave(&cs->lock, flags); in hfcpci_card_msg()
1615 inithfcpci(cs); in hfcpci_card_msg()
1616 reset_hfcpci(cs); in hfcpci_card_msg()
1617 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_card_msg()
1620 spin_lock_irqsave(&cs->lock, flags); in hfcpci_card_msg()
1621 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER; in hfcpci_card_msg()
1622 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_card_msg()
1624 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in hfcpci_card_msg()
1625 spin_unlock_irqrestore(&cs->lock, flags); in hfcpci_card_msg()
1641 struct IsdnCardState *cs = card->cs; in setup_hfcpci() local
1651 printk(KERN_INFO "HiSax: HFC-PCI driver Rev. %s\n", HiSax_getrev(tmp)); in setup_hfcpci()
1653 cs->hw.hfcpci.int_s1 = 0; in setup_hfcpci()
1654 cs->dc.hfcpci.ph_state = 0; in setup_hfcpci()
1655 cs->hw.hfcpci.fifo = 255; in setup_hfcpci()
1656 if (cs->typ != ISDN_CTYPE_HFC_PCI) in setup_hfcpci()
1680 …if ((card->para[0]) && (card->para[0] != (tmp_hfcpci->resource[ 0].start & PCI_BASE_ADDRESS_IO_MAS… in setup_hfcpci()
1688 printk(KERN_WARNING "HFC-PCI: No PCI card found\n"); in setup_hfcpci()
1692 i--; in setup_hfcpci()
1694 cs->hw.hfcpci.dev = dev_hfcpci; in setup_hfcpci()
1695 cs->irq = dev_hfcpci->irq; in setup_hfcpci()
1696 if (!cs->irq) { in setup_hfcpci()
1697 printk(KERN_WARNING "HFC-PCI: No IRQ for PCI card found\n"); in setup_hfcpci()
1700 cs->hw.hfcpci.pci_io = (char *)(unsigned long)dev_hfcpci->resource[1].start; in setup_hfcpci()
1701 …printk(KERN_INFO "HiSax: HFC-PCI card manufacturer: %s card name: %s\n", id_list[i].vendor_name, i… in setup_hfcpci()
1703 if (!cs->hw.hfcpci.pci_io) { in setup_hfcpci()
1704 printk(KERN_WARNING "HFC-PCI: No IO-Mem for PCI card found\n"); in setup_hfcpci()
1709 cs->hw.hfcpci.fifos = pci_alloc_consistent(cs->hw.hfcpci.dev, in setup_hfcpci()
1710 0x8000, &cs->hw.hfcpci.dma); in setup_hfcpci()
1711 if (!cs->hw.hfcpci.fifos) { in setup_hfcpci()
1712 printk(KERN_WARNING "HFC-PCI: Error allocating FIFO memory!\n"); in setup_hfcpci()
1715 if (cs->hw.hfcpci.dma & 0x7fff) { in setup_hfcpci()
1717 "HFC-PCI: Error DMA memory not on 32K boundary (%lx)\n", in setup_hfcpci()
1718 (u_long)cs->hw.hfcpci.dma); in setup_hfcpci()
1719 pci_free_consistent(cs->hw.hfcpci.dev, 0x8000, in setup_hfcpci()
1720 cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma); in setup_hfcpci()
1723 pci_write_config_dword(cs->hw.hfcpci.dev, 0x80, (u32)cs->hw.hfcpci.dma); in setup_hfcpci()
1724 cs->hw.hfcpci.pci_io = ioremap((ulong) cs->hw.hfcpci.pci_io, 256); in setup_hfcpci()
1726 "HFC-PCI: defined at mem %p fifo %p(%lx) IRQ %d HZ %d\n", in setup_hfcpci()
1727 cs->hw.hfcpci.pci_io, in setup_hfcpci()
1728 cs->hw.hfcpci.fifos, in setup_hfcpci()
1729 (u_long)cs->hw.hfcpci.dma, in setup_hfcpci()
1730 cs->irq, HZ); in setup_hfcpci()
1732 spin_lock_irqsave(&cs->lock, flags); in setup_hfcpci()
1734 …pci_write_config_word(cs->hw.hfcpci.dev, PCI_COMMAND, PCI_ENA_MEMIO); /* enable memory mapped port… in setup_hfcpci()
1735 cs->hw.hfcpci.int_m2 = 0; /* disable alle interrupts */ in setup_hfcpci()
1736 cs->hw.hfcpci.int_m1 = 0; in setup_hfcpci()
1737 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in setup_hfcpci()
1738 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in setup_hfcpci()
1742 INIT_WORK(&cs->tqueue, hfcpci_bh); in setup_hfcpci()
1743 cs->setstack_d = setstack_hfcpci; in setup_hfcpci()
1744 cs->BC_Send_Data = &hfcpci_send_data; in setup_hfcpci()
1745 cs->readisac = NULL; in setup_hfcpci()
1746 cs->writeisac = NULL; in setup_hfcpci()
1747 cs->readisacfifo = NULL; in setup_hfcpci()
1748 cs->writeisacfifo = NULL; in setup_hfcpci()
1749 cs->BC_Read_Reg = NULL; in setup_hfcpci()
1750 cs->BC_Write_Reg = NULL; in setup_hfcpci()
1751 cs->irq_func = &hfcpci_interrupt; in setup_hfcpci()
1752 cs->irq_flags |= IRQF_SHARED; in setup_hfcpci()
1753 cs->hw.hfcpci.timer.function = (void *) hfcpci_Timer; in setup_hfcpci()
1754 cs->hw.hfcpci.timer.data = (long) cs; in setup_hfcpci()
1755 init_timer(&cs->hw.hfcpci.timer); in setup_hfcpci()
1756 cs->cardmsg = &hfcpci_card_msg; in setup_hfcpci()
1757 cs->auxcmd = &hfcpci_auxcmd; in setup_hfcpci()
1759 spin_unlock_irqrestore(&cs->lock, flags); in setup_hfcpci()