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/linux-5.10/arch/alpha/include/asm/
Dxor.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-alpha/xor.h
5 * Optimized RAID-5 checksumming functions for alpha EV5 and EV6
37 ldq $1,0($18) \n\
39 ldq $3,8($18) \n\
42 ldq $5,16($18) \n\
44 ldq $7,24($18) \n\
47 ldq $20,32($18) \n\
49 ldq $22,40($18) \n\
52 ldq $24,48($18) \n\
[all …]
Dpal.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 :"$1", "$16", "$22", "$23", "$24", "$25"); \
38 : "$1", "$22", "$23", "$24", "$25"); \
50 : "$1", "$22", "$23", "$24", "$25"); \
62 : "$1", "$22", "$23", "$24", "$25"); \
76 : "$1", "$22", "$23", "$24", "$25"); \
106 :"$0", "$1", "$22", "$23", "$24", "$25"); \
113 #define tbiap() __tbi(-1, /* no second argument */)
114 #define tbia() __tbi(-2, /* no second argument */)
129 : "$17", "$18", "$19", "$20", "$21"); in qemu_get_walltime()
[all …]
/linux-5.10/arch/arm64/crypto/
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
37 * The SHA-512 round constants
117 0: ld1 {v8.2d-v11.2d}, [x19]
121 ld1 {v20.2d-v23.2d}, [x3], #64
124 1: ld1 {v12.2d-v15.2d}, [x20], #64
125 ld1 {v16.2d-v19.2d}, [x20], #64
144 // v0 ab cd -- ef gh ab
145 // v1 cd -- ef gh ab cd
[all …]
/linux-5.10/Documentation/core-api/
Dpacking.rst6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[all …]
/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7603/
Dmac.h1 /* SPDX-License-Identifier: ISC */
12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
28 #define MT_RXD1_NORMAL_PAYLOAD_FORMAT GENMASK(25, 24)
47 #define MT_RXD2_NORMAL_LLC_MIS BIT(25)
54 #define MT_RXD2_NORMAL_CM BIT(18)
64 #define MT_RXD3_NORMAL_WOL GENMASK(18, 14)
77 #define MT_RXV1_HT_AGGR BIT(18)
108 #define MT_RXV5_LTF_PROC_TIME GENMASK(25, 19)
109 #define MT_RXV5_FOE GENMASK(18, 7)
115 #define MT_RXV6_NS_TS_FIELD GENMASK(27, 25)
[all …]
/linux-5.10/security/apparmor/include/
Dsig_names.h18 [SIGTRAP] = 5, /* -, 5, - */
19 [SIGABRT] = 6, /* SIGIOT: -, 6, - */
30 [SIGSTKFLT] = 16, /* -, 16, - */
32 [SIGCHLD] = 17, /* 20, 17, 18. SIGCHLD -, -, 18 */
33 [SIGCONT] = 18, /* 19, 18, 25 */
35 [SIGTSTP] = 20, /* 18, 20, 24 */
40 [SIGXFSZ] = 25, /* 25, 25, 31 */
45 [SIGPWR] = 30, /* 29, 30, 19. SIGINFO 29, -, - */
50 [SIGEMT] = 32, /* 7, - , 7 */
57 [SIGUNUSED] = 34, /* -, 31, - */
/linux-5.10/arch/alpha/lib/
Dfpreg.c1 // SPDX-License-Identifier: GPL-2.0
41 case 18: STT(18, val); break; in alpha_read_fp_reg()
48 case 25: STT(25, val); break; in alpha_read_fp_reg()
89 case 18: LDT(18, val); break; in alpha_write_fp_reg()
96 case 25: LDT(25, val); break; in alpha_write_fp_reg()
137 case 18: STS(18, val); break; in alpha_read_fp_reg_s()
144 case 25: STS(25, val); break; in alpha_read_fp_reg_s()
185 case 18: LDS(18, val); break; in alpha_write_fp_reg_s()
192 case 25: LDS(25, val); break; in alpha_write_fp_reg_s()
/linux-5.10/arch/arm/crypto/
Dsha512-core.S_shipped1 @ SPDX-License-Identifier: GPL-2.0
21 @ by gcc 3.4 and it spends ~72 clock cycles per byte [on single-issue
26 @ Rescheduling for dual-issue pipeline resulted in 6% improvement on
31 @ Profiler-assisted and platform-specific optimization resulted in 7%
37 @ one byte in 23.3 cycles or ~60% faster than integer-only code.
43 @ Technical writers asserted that 3-way S4 pipeline can sustain
45 @ not be observed, see https://www.openssl.org/~appro/Snapdragon-S4.html
46 @ for further details. On side note Cortex-A15 processes one byte in
52 @ h[0-7], namely with most significant dword at *lower* address, which
54 @ expected to maintain native byte order for whole 64-bit values.
[all …]
/linux-5.10/drivers/staging/media/rkvdec/
Drkvdec-h264.c1 // SPDX-License-Identifier: GPL-2.0
9 * Jeffy Chen <jeffy.chen@rock-chips.com>
12 #include <media/v4l2-h264.h>
13 #include <media/v4l2-mem2mem.h>
16 #include "rkvdec-regs.h"
48 #define BIT_DEPTH_CHROMA PS_FIELD(18, 3)
135 /* Table 9-12 – Values of variables m and n for ctxIdx from 0 to 10 */
136 CABAC_ENTRY(0, 20, -15, 20, -15, 20, -15, 20, -15),
139 CABAC_ENTRY(3, 20, -15, 20, -15, 20, -15, 20, -15),
142 CABAC_ENTRY(6, -28, 127, -28, 127, -28, 127, -28, 127),
[all …]
/linux-5.10/include/dt-bindings/clock/
Dexynos5433.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 #define CLK_MOUT_ACLK_CAM1_552_B 18
29 #define CLK_MOUT_ACLK_GSCL_333 25
223 #define CLK_MOUT_CLK2X_PHY_C 18
230 #define CLK_MOUT_ACLK_MIFNM_400 25
419 #define CLK_PCLK_I2C0 18
426 #define CLK_PCLK_HSI2C7 25
491 #define CLK_PCLK_TZPC8 18
498 #define CLK_PCLK_TZPC1 25
536 #define CLK_MOUT_PHYCLK_UFS_RX1_SYMBOL_USER 18
[all …]
Dr8a7793-clock.h1 /* SPDX-License-Identifier: GPL-2.0
34 #define R8A7793_CLK_FDP1_1 18
39 #define R8A7793_CLK_TMU0 25
53 #define R8A7793_CLK_SYS_DMAC1 18
62 #define R8A7793_CLK_IIC0 18
89 #define R8A7793_CLK_SCIF3 18
118 #define R8A7793_CLK_I2C5 25
139 #define R8A7793_CLK_SCU_DVC1 18
146 #define R8A7793_CLK_SCU_SRC6 25
Dr8a7791-clock.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
33 #define R8A7791_CLK_FDP1_1 18
38 #define R8A7791_CLK_TMU0 25
52 #define R8A7791_CLK_SYS_DMAC1 18
61 #define R8A7791_CLK_IIC0 18
88 #define R8A7791_CLK_SCIF3 18
120 #define R8A7791_CLK_I2C5 25
141 #define R8A7791_CLK_SCU_DVC1 18
148 #define R8A7791_CLK_SCU_SRC6 25
Dexynos5260-clk.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 #define TOP_MOUT_SCLK_PERI_UART0_UCLK 18
40 #define TOP_MOUT_BUS2_BUSTOP_400 25
193 #define MIF_DOUT_MEDIA_PLL 18
200 #define MIF_CLK_INTMEM 25
266 #define GSCL_CLK_SMMU3_LITE_D 18
273 #define GSCL_SCLK_CSIS1_WRAP 25
297 #define FSYS_PHYCLK_USBHOST20 18
320 #define PERI_CLK_I2C5 18
327 #define PERI_CLK_EFUSE_WRITER 25
[all …]
Dr8a7794-clock.h1 /* SPDX-License-Identifier: GPL-2.0+
34 #define R8A7794_CLK_TMU0 25
47 #define R8A7794_CLK_SYS_DMAC1 18
55 #define R8A7794_CLK_IIC0 18
77 #define R8A7794_CLK_SCIF3 18
101 #define R8A7794_CLK_I2C5 25
121 #define R8A7794_CLK_SCU_DVC1 18
125 #define R8A7794_CLK_SCU_SRC6 25
Dsprd,sc9860-clk.h1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
28 #define CLK_RPLL0_GATE 18
52 #define CLK_TWPLL_12M 18
59 #define CLK_TWPLL_76M8 25
101 #define CLK_IIS1 18
124 #define CLK_PWM0 18
131 #define CLK_THM 25
182 #define CLK_AP_INTC1_EB 18
189 #define CLK_PIN_EB 25
327 #define CLK_ISP_PCLK_EB 18
[all …]
Dr8a7790-clock.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
37 #define R8A7790_CLK_FDP1_1 18
42 #define R8A7790_CLK_TMU0 25
58 #define R8A7790_CLK_SYS_DMAC1 18
71 #define R8A7790_CLK_IIC0 18
100 #define R8A7790_CLK_LVDS1 25
143 #define R8A7790_CLK_SCU_DVC1 18
150 #define R8A7790_CLK_SCU_SRC6 25
/linux-5.10/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/
Dpci-6602.c1 // SPDX-License-Identifier: GPL-2.0+
4 * comedi/drivers/ni_routing/ni_device_routes/pci-6602.c
7 * COMEDI - Linux Control and Measurement Device Interface
32 .device = "pci-6602",
276 .dest = NI_PFI(18),
396 .dest = NI_PFI(25),
447 NI_PFI(18),
479 NI_PFI(18),
526 NI_PFI(25),
558 NI_PFI(25),
[all …]
/linux-5.10/include/linux/netfilter/
Dnf_conntrack_h323_types.h1 /* SPDX-License-Identifier: GPL-2.0-only */
147 eH2250LogicalChannelParameters_silenceSuppression = (1 << 25),
259 eSetup_UUIE_callServices = (1 << 25),
266 eSetup_UUIE_fastStart = (1 << 18),
305 eCallProceeding_UUIE_multipleCalls = (1 << 25),
327 eConnect_UUIE_multipleCalls = (1 << 25),
334 eConnect_UUIE_serviceControl = (1 << 18),
355 eAlerting_UUIE_multipleCalls = (1 << 25),
362 eAlerting_UUIE_capacity = (1 << 18),
398 eFacility_UUIE_tokens = (1 << 25),
[all …]
/linux-5.10/drivers/video/fbdev/
Dau1200fb.h64 uint32 reserved2[(0x0100-0x0058)/4];
77 uint32 reserved3[(0x0400-0x0180)/4];
79 volatile uint32 palette[(0x0800-0x0400)/4];
92 #define LCD_SCREEN_SX_N(WIDTH) ((WIDTH-1)<<19)
93 #define LCD_SCREEN_SY_N(HEIGHT) ((HEIGHT-1)<<8)
141 #define LCD_WINCTRL1_FRM (0xF<<25)
146 #define LCD_WINCTRL1_FRM_1BPP (0<<25)
147 #define LCD_WINCTRL1_FRM_2BPP (1<<25)
148 #define LCD_WINCTRL1_FRM_4BPP (2<<25)
149 #define LCD_WINCTRL1_FRM_8BPP (3<<25)
[all …]
/linux-5.10/drivers/usb/dwc2/
Dhw.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * hw.h - DesignWare HS OTG Controller hardware definitions
5 * Copyright 2004-2013 Synopsys, Inc.
16 * 3. The names of the above-listed copyright holders may not be used
49 #define GOTGCTL_ASESVLD BIT(18)
68 #define GOTGINT_A_DEV_TOUT_CHG BIT(18)
100 #define GUSBCFG_ULPI_INT_PROT_DIS BIT(25)
107 #define GUSBCFG_ULPI_AUTO_RES BIT(18)
149 #define GINTSTS_HCHINT BIT(25)
157 #define GINTSTS_IEPINT BIT(18)
[all …]
/linux-5.10/arch/mips/include/asm/
Dmipsregs.h19 #include <asm/isa-rev.h>
84 #define CP0_WATCHLO $18
92 #define CP0_PERFORMANCE $25
111 #define CP0_IWATCH $18
152 #define MIPS_ENTRYLO_XI (_ULCAST_(1) << (BITS_PER_LONG - 2))
153 #define MIPS_ENTRYLO_RI (_ULCAST_(1) << (BITS_PER_LONG - 1))
248 #define PL_256K 18
392 /* in-kernel enabled CUs */
470 #define EXCCODE_TLBRI 19 /* TLB Read-Inhibit exception */
471 #define EXCCODE_TLBXI 20 /* TLB Execution-Inhibit exception */
[all …]
/linux-5.10/include/dt-bindings/reset/
Dnuvoton,npcm7xx-reset.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 #define NPCM7XX_RESET_PWM_M0 18
32 #define NPCM7XX_RESET_UDC3 25
56 #define NPCM7XX_RESET_SIOX1 18
61 #define NPCM7XX_RESET_GMAC2 25
82 #define NPCM7XX_RESET_SMB15 18
89 #define NPCM7XX_RESET_USB_PHY_2 25
/linux-5.10/arch/alpha/kernel/
Dentry.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Kernel entry-points.
8 #include <asm/asm-offsets.h>
34 .cfi_rel_offset $18, 40
39 .size \func, . - \func
43 * This defines the normal kernel pt-regs layout.
45 * regs 9-15 preserved by C code
46 * regs 16-18 saved by PAL-code
47 * regs 29-30 saved and set up by PAL-code
48 * JRP - Save regs 16-18 in a special area of the stack, so that
[all …]
/linux-5.10/include/dt-bindings/pinctrl/
Dmt6397-pinfunc.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <dt-bindings/pinctrl/mt65xx.h>
94 #define MT6397_PIN_18_COL6__FUNC_GPIO18 (MTK_PIN_NO(18) | 0)
95 #define MT6397_PIN_18_COL6__FUNC_COL6 (MTK_PIN_NO(18) | 1)
96 #define MT6397_PIN_18_COL6__FUNC_EINT16_1X (MTK_PIN_NO(18) | 2)
97 #define MT6397_PIN_18_COL6__FUNC_SDA2_2X (MTK_PIN_NO(18) | 3)
98 #define MT6397_PIN_18_COL6__FUNC_GPIO32K_0 (MTK_PIN_NO(18) | 4)
99 #define MT6397_PIN_18_COL6__FUNC_GPIO26M_0 (MTK_PIN_NO(18) | 5)
100 #define MT6397_PIN_18_COL6__FUNC_TEST_IN9 (MTK_PIN_NO(18) | 6)
101 #define MT6397_PIN_18_COL6__FUNC_TEST_OUT9 (MTK_PIN_NO(18) | 7)
[all …]
/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Ddwmac4_descs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
24 #define TDES3_IVTIR_MASK GENMASK(19, 18)
25 #define TDES3_IVTIR_SHIFT 18
39 #define TDES3_TCP_SEGMENTATION_ENABLE BIT(18)
42 #define TDES3_SA_INSERT_CTRL_MASK GENMASK(25, 23)
112 #define RDES2_HASH_FILTER_STATUS BIT(18)
124 #define RDES3_PACKET_LEN_TYPE_MASK GENMASK(18, 16)
131 #define RDES3_RDES0_VALID BIT(25)
141 #define RDES3_BUFFER2_VALID_ADDR BIT(25)

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