| /qemu/hw/arm/ |
| H A D | stm32f100_soc.c | 51 object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M); in stm32f100_soc_initfn()
69 DeviceState *dev, *armv7m; in stm32f100_soc_realize() local
116 armv7m = DEVICE(&s->armv7m); in stm32f100_soc_realize()
117 qdev_prop_set_uint32(armv7m, "num-irq", 61); in stm32f100_soc_realize()
118 qdev_prop_set_uint8(armv7m, "num-prio-bits", 4); in stm32f100_soc_realize()
119 qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); in stm32f100_soc_realize()
120 qdev_prop_set_bit(armv7m, "enable-bitband", true); in stm32f100_soc_realize()
121 qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk); in stm32f100_soc_realize()
122 qdev_connect_clock_in(armv7m, "refclk", s->refclk); in stm32f100_soc_realize()
123 object_property_set_link(OBJECT(&s->armv7m), "memory", in stm32f100_soc_realize()
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| H A D | stm32f205_soc.c | 55 object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M); in stm32f205_soc_initfn()
86 DeviceState *dev, *armv7m; in stm32f205_soc_realize() local
128 armv7m = DEVICE(&s->armv7m); in stm32f205_soc_realize()
129 qdev_prop_set_uint32(armv7m, "num-irq", 96); in stm32f205_soc_realize()
130 qdev_prop_set_uint8(armv7m, "num-prio-bits", 4); in stm32f205_soc_realize()
131 qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); in stm32f205_soc_realize()
132 qdev_prop_set_bit(armv7m, "enable-bitband", true); in stm32f205_soc_realize()
133 qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk); in stm32f205_soc_realize()
134 qdev_connect_clock_in(armv7m, "refclk", s->refclk); in stm32f205_soc_realize()
135 object_property_set_link(OBJECT(&s->armv7m), "memory", in stm32f205_soc_realize()
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| H A D | msf2-soc.c | 66 object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M); in m2sxxx_soc_initfn()
85 DeviceState *dev, *armv7m; in m2sxxx_soc_realize() local
135 armv7m = DEVICE(&s->armv7m); in m2sxxx_soc_realize()
136 qdev_prop_set_uint32(armv7m, "num-irq", 81); in m2sxxx_soc_realize()
137 qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); in m2sxxx_soc_realize()
138 qdev_prop_set_bit(armv7m, "enable-bitband", true); in m2sxxx_soc_realize()
139 qdev_connect_clock_in(armv7m, "cpuclk", s->m3clk); in m2sxxx_soc_realize()
140 qdev_connect_clock_in(armv7m, "refclk", s->refclk); in m2sxxx_soc_realize()
141 object_property_set_link(OBJECT(&s->armv7m), "memory", in m2sxxx_soc_realize()
143 if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), errp)) { in m2sxxx_soc_realize()
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| H A D | stm32f405_soc.c | 61 object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M); in stm32f405_soc_initfn()
95 DeviceState *dev, *armv7m; in stm32f405_soc_realize() local
153 armv7m = DEVICE(&s->armv7m); in stm32f405_soc_realize()
154 qdev_prop_set_uint32(armv7m, "num-irq", 96); in stm32f405_soc_realize()
155 qdev_prop_set_uint8(armv7m, "num-prio-bits", 4); in stm32f405_soc_realize()
156 qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4")); in stm32f405_soc_realize()
157 qdev_prop_set_bit(armv7m, "enable-bitband", true); in stm32f405_soc_realize()
158 qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk); in stm32f405_soc_realize()
159 qdev_connect_clock_in(armv7m, "refclk", s->refclk); in stm32f405_soc_realize()
160 object_property_set_link(OBJECT(&s->armv7m), "memory", in stm32f405_soc_realize()
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| H A D | mps2.c | 73 ARMv7MState armv7m; member
141 DeviceState *armv7m, *sccdev; in mps2_common_init() local
222 object_initialize_child(OBJECT(mms), "armv7m", &mms->armv7m, TYPE_ARMV7M); in mps2_common_init()
223 armv7m = DEVICE(&mms->armv7m); in mps2_common_init()
228 qdev_prop_set_uint32(armv7m, "num-irq", 32); in mps2_common_init()
231 qdev_prop_set_uint32(armv7m, "num-irq", 64); in mps2_common_init()
236 qdev_connect_clock_in(armv7m, "cpuclk", mms->sysclk); in mps2_common_init()
237 qdev_connect_clock_in(armv7m, "refclk", mms->refclk); in mps2_common_init()
238 qdev_prop_set_string(armv7m, "cpu-type", machine->cpu_type); in mps2_common_init()
239 qdev_prop_set_bit(armv7m, "enable-bitband", true); in mps2_common_init()
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| H A D | stm32l4x5_soc.c | 172 DeviceState *armv7m, *dev; in stm32l4x5_soc_realize() local
199 object_initialize_child(OBJECT(dev_soc), "armv7m", &s->armv7m, TYPE_ARMV7M); in stm32l4x5_soc_realize()
200 armv7m = DEVICE(&s->armv7m); in stm32l4x5_soc_realize()
201 qdev_prop_set_uint32(armv7m, "num-irq", 96); in stm32l4x5_soc_realize()
202 qdev_prop_set_uint32(armv7m, "num-prio-bits", 4); in stm32l4x5_soc_realize()
203 qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4")); in stm32l4x5_soc_realize()
204 qdev_prop_set_bit(armv7m, "enable-bitband", true); in stm32l4x5_soc_realize()
205 qdev_connect_clock_in(armv7m, "cpuclk", in stm32l4x5_soc_realize()
207 qdev_connect_clock_in(armv7m, "refclk", in stm32l4x5_soc_realize()
209 object_property_set_link(OBJECT(&s->armv7m), "memory", in stm32l4x5_soc_realize()
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| H A D | aspeed_ast27x0-ssp.c | 126 return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]); in aspeed_soc_ast27x0ssp_get_irq()
136 object_initialize_child(obj, "armv7m", &a->armv7m, TYPE_ARMV7M); in aspeed_soc_ast27x0ssp_init()
165 DeviceState *armv7m; in aspeed_soc_ast27x0ssp_realize() local
175 armv7m = DEVICE(&a->armv7m); in aspeed_soc_ast27x0ssp_realize()
176 qdev_prop_set_uint32(armv7m, "num-irq", 256); in aspeed_soc_ast27x0ssp_realize()
177 qdev_prop_set_string(armv7m, "cpu-type", aspeed_soc_cpu_type(sc)); in aspeed_soc_ast27x0ssp_realize()
178 qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk); in aspeed_soc_ast27x0ssp_realize()
179 object_property_set_link(OBJECT(&a->armv7m), "memory", in aspeed_soc_ast27x0ssp_realize()
181 sysbus_realize(SYS_BUS_DEVICE(&a->armv7m), &error_abort); in aspeed_soc_ast27x0ssp_realize()
184 CPU(a->armv7m.cpu)->cpu_index); in aspeed_soc_ast27x0ssp_realize()
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| H A D | aspeed_ast27x0-tsp.c | 126 return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]); in aspeed_soc_ast27x0tsp_get_irq()
136 object_initialize_child(obj, "armv7m", &a->armv7m, TYPE_ARMV7M); in aspeed_soc_ast27x0tsp_init()
165 DeviceState *armv7m; in aspeed_soc_ast27x0tsp_realize() local
175 armv7m = DEVICE(&a->armv7m); in aspeed_soc_ast27x0tsp_realize()
176 qdev_prop_set_uint32(armv7m, "num-irq", 256); in aspeed_soc_ast27x0tsp_realize()
177 qdev_prop_set_string(armv7m, "cpu-type", aspeed_soc_cpu_type(sc)); in aspeed_soc_ast27x0tsp_realize()
178 qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk); in aspeed_soc_ast27x0tsp_realize()
179 object_property_set_link(OBJECT(&a->armv7m), "memory", in aspeed_soc_ast27x0tsp_realize()
181 sysbus_realize(SYS_BUS_DEVICE(&a->armv7m), &error_abort); in aspeed_soc_ast27x0tsp_realize()
184 CPU(a->armv7m.cpu)->cpu_index); in aspeed_soc_ast27x0tsp_realize()
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| H A D | aspeed_ast10x0.c | 107 return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]); in aspeed_soc_ast1030_get_irq()
123 object_initialize_child(obj, "armv7m", &a->armv7m, TYPE_ARMV7M); in aspeed_soc_ast1030_init()
193 DeviceState *armv7m; in aspeed_soc_ast1030_realize() local
212 armv7m = DEVICE(&a->armv7m); in aspeed_soc_ast1030_realize()
213 qdev_prop_set_uint32(armv7m, "num-irq", 256); in aspeed_soc_ast1030_realize()
214 qdev_prop_set_string(armv7m, "cpu-type", aspeed_soc_cpu_type(sc)); in aspeed_soc_ast1030_realize()
215 qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk); in aspeed_soc_ast1030_realize()
216 object_property_set_link(OBJECT(&a->armv7m), "memory", in aspeed_soc_ast1030_realize()
218 sysbus_realize(SYS_BUS_DEVICE(&a->armv7m), &error_abort); in aspeed_soc_ast1030_realize()
222 CPU(a->armv7m.cpu)->cpu_index); in aspeed_soc_ast1030_realize()
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| H A D | nrf51_soc.c | 79 qdev_connect_clock_in(DEVICE(&s->armv7m), "cpuclk", s->sysclk); in nrf51_soc_realize()
86 object_property_set_link(OBJECT(&s->armv7m), "memory", OBJECT(&s->container), in nrf51_soc_realize()
88 if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), errp)) { in nrf51_soc_realize()
107 qdev_get_gpio_in(DEVICE(&s->armv7m), in nrf51_soc_realize()
118 qdev_get_gpio_in(DEVICE(&s->armv7m), in nrf51_soc_realize()
164 qdev_get_gpio_in(DEVICE(&s->armv7m), in nrf51_soc_realize()
188 object_initialize_child(OBJECT(s), "armv6m", &s->armv7m, TYPE_ARMV7M); in nrf51_soc_init()
189 qdev_prop_set_string(DEVICE(&s->armv7m), "cpu-type", in nrf51_soc_init()
191 qdev_prop_set_uint32(DEVICE(&s->armv7m), "num-irq", 32); in nrf51_soc_init()
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| H A D | stellaris.c | 1061 DeviceState *gpio_dev[NUM_GPIO], *armv7m, *nvic; in stellaris_init() local
1125 armv7m = qdev_new(TYPE_ARMV7M); in stellaris_init()
1126 object_property_add_child(soc_container, "v7m", OBJECT(armv7m)); in stellaris_init()
1127 qdev_prop_set_uint32(armv7m, "num-irq", NUM_IRQ_LINES); in stellaris_init()
1128 qdev_prop_set_uint8(armv7m, "num-prio-bits", NUM_PRIO_BITS); in stellaris_init()
1129 qdev_prop_set_string(armv7m, "cpu-type", ms->cpu_type); in stellaris_init()
1130 qdev_prop_set_bit(armv7m, "enable-bitband", true); in stellaris_init()
1131 qdev_connect_clock_in(armv7m, "cpuclk", in stellaris_init()
1134 object_property_set_link(OBJECT(armv7m), "memory", in stellaris_init()
1137 sysbus_realize_and_unref(SYS_BUS_DEVICE(armv7m), &error_fatal); in stellaris_init()
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| H A D | stm32vldiscovery.c | 54 armv7m_load_kernel(STM32F100_SOC(dev)->armv7m.cpu, in stm32vldiscovery_init()
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| H A D | netduinoplus2.c | 51 armv7m_load_kernel(STM32F405_SOC(dev)->armv7m.cpu, in netduinoplus2_init()
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| H A D | netduino2.c | 51 armv7m_load_kernel(STM32F205_SOC(dev)->armv7m.cpu, machine->kernel_filename, in netduino2_init()
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| H A D | olimex-stm32-h405.c | 54 armv7m_load_kernel(STM32F405_SOC(dev)->armv7m.cpu, in olimex_stm32_h405_init()
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| H A D | microbit.c | 59 armv7m_load_kernel(s->nrf51.armv7m.cpu, machine->kernel_filename, in OBJECT_DECLARE_SIMPLE_TYPE()
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| H A D | armsse.c | 730 object_initialize_child(OBJECT(&s->cluster[i]), name, &s->armv7m[i], in armsse_init()
732 qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type", info->cpu_type); in armsse_init()
903 return qdev_get_gpio_in(DEVICE(&s->armv7m[0]), irqno); in armsse_get_common_irq_in()
989 DeviceState *cpudev = DEVICE(&s->armv7m[i]); in armsse_realize()
990 Object *cpuobj = OBJECT(&s->armv7m[i]); in armsse_realize()
1103 DeviceState *cpudev = DEVICE(&s->armv7m[cpunum]); in armsse_realize()
1206 qdev_get_gpio_in_named(DEVICE(&s->armv7m), "NMI", 0)); in armsse_realize()
1405 DeviceState *cpudev = DEVICE(&s->armv7m[cpunum]); in armsse_realize()
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| H A D | msf2-som.c | 95 armv7m_load_kernel(soc->armv7m.cpu, machine->kernel_filename, in emcraft_sf2_s2s010_init()
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| /qemu/include/hw/arm/ |
| H A D | aspeed_soc.h | 146 ARMv7MState armv7m; member
155 ARMv7MState armv7m; member
167 ARMv7MState armv7m; member
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| H A D | stm32f100_soc.h | 48 ARMv7MState armv7m; member
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| H A D | msf2-soc.h | 52 ARMv7MState armv7m; member
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| H A D | nrf51_soc.h | 33 ARMv7MState armv7m; member
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| H A D | stm32f205_soc.h | 54 ARMv7MState armv7m; member
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| H A D | stm32l4x5_soc.h | 51 ARMv7MState armv7m; member
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| H A D | stm32f405_soc.h | 57 ARMv7MState armv7m; member
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