xref: /qemu/hw/arm/aspeed_ast10x0.c (revision 06b40d250ecfa1633209c2e431a7a38acfd03a98)
1356b230eSSteven Lee /*
2356b230eSSteven Lee  * ASPEED Ast10x0 SoC
3356b230eSSteven Lee  *
4356b230eSSteven Lee  * Copyright (C) 2022 ASPEED Technology Inc.
5356b230eSSteven Lee  *
6356b230eSSteven Lee  * This code is licensed under the GPL version 2 or later.  See
7356b230eSSteven Lee  * the COPYING file in the top-level directory.
8356b230eSSteven Lee  *
9356b230eSSteven Lee  * Implementation extracted from the AST2600 and adapted for Ast10x0.
10356b230eSSteven Lee  */
11356b230eSSteven Lee 
12356b230eSSteven Lee #include "qemu/osdep.h"
13356b230eSSteven Lee #include "qapi/error.h"
14dfc56946SRichard Henderson #include "system/address-spaces.h"
1532cad1ffSPhilippe Mathieu-Daudé #include "system/system.h"
16356b230eSSteven Lee #include "hw/qdev-clock.h"
17356b230eSSteven Lee #include "hw/misc/unimp.h"
18356b230eSSteven Lee #include "hw/arm/aspeed_soc.h"
19356b230eSSteven Lee 
20356b230eSSteven Lee #define ASPEED_SOC_IOMEM_SIZE 0x00200000
21356b230eSSteven Lee 
22356b230eSSteven Lee static const hwaddr aspeed_soc_ast1030_memmap[] = {
23356b230eSSteven Lee     [ASPEED_DEV_SRAM]      = 0x00000000,
246ba3dc25SPhilippe Mathieu-Daudé     [ASPEED_DEV_SECSRAM]   = 0x79000000,
25356b230eSSteven Lee     [ASPEED_DEV_IOMEM]     = 0x7E600000,
26356b230eSSteven Lee     [ASPEED_DEV_PWM]       = 0x7E610000,
27356b230eSSteven Lee     [ASPEED_DEV_FMC]       = 0x7E620000,
28356b230eSSteven Lee     [ASPEED_DEV_SPI1]      = 0x7E630000,
29356b230eSSteven Lee     [ASPEED_DEV_SPI2]      = 0x7E640000,
3072006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_UDC]       = 0x7E6A2000,
3198fb9678SPhilippe Mathieu-Daudé     [ASPEED_DEV_HACE]      = 0x7E6D0000,
32356b230eSSteven Lee     [ASPEED_DEV_SCU]       = 0x7E6E2000,
3372006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_JTAG0]     = 0x7E6E4000,
3472006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_JTAG1]     = 0x7E6E4100,
35356b230eSSteven Lee     [ASPEED_DEV_ADC]       = 0x7E6E9000,
3672006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_ESPI]      = 0x7E6EE000,
37356b230eSSteven Lee     [ASPEED_DEV_SBC]       = 0x7E6F2000,
38356b230eSSteven Lee     [ASPEED_DEV_GPIO]      = 0x7E780000,
3972006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_SGPIOM]    = 0x7E780500,
40356b230eSSteven Lee     [ASPEED_DEV_TIMER1]    = 0x7E782000,
41ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART1]     = 0x7E783000,
42ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART2]     = 0x7E78D000,
43ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART3]     = 0x7E78E000,
44ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART4]     = 0x7E78F000,
45356b230eSSteven Lee     [ASPEED_DEV_UART5]     = 0x7E784000,
46ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART6]     = 0x7E790000,
47ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART7]     = 0x7E790100,
48ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART8]     = 0x7E790200,
49ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART9]     = 0x7E790300,
50ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART10]    = 0x7E790400,
51ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART11]    = 0x7E790500,
52ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART12]    = 0x7E790600,
53ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART13]    = 0x7E790700,
54356b230eSSteven Lee     [ASPEED_DEV_WDT]       = 0x7E785000,
55356b230eSSteven Lee     [ASPEED_DEV_LPC]       = 0x7E789000,
5655c57023SPeter Delevoryas     [ASPEED_DEV_PECI]      = 0x7E78B000,
5729c4f060SPhilippe Mathieu-Daudé     [ASPEED_DEV_I3C]       = 0x7E7A0000,
58356b230eSSteven Lee     [ASPEED_DEV_I2C]       = 0x7E7B0000,
59356b230eSSteven Lee };
60356b230eSSteven Lee 
61356b230eSSteven Lee static const int aspeed_soc_ast1030_irqmap[] = {
62ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART1]     = 47,
63ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART2]     = 48,
64ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART3]     = 49,
65ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART4]     = 50,
66356b230eSSteven Lee     [ASPEED_DEV_UART5]     = 8,
67ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART6]     = 57,
68ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART7]     = 58,
69ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART8]     = 59,
70ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART9]     = 60,
71ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART10]    = 61,
72ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART11]    = 62,
73ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART12]    = 63,
74ab5e8605SPeter Delevoryas     [ASPEED_DEV_UART13]    = 64,
75356b230eSSteven Lee     [ASPEED_DEV_GPIO]      = 11,
76356b230eSSteven Lee     [ASPEED_DEV_TIMER1]    = 16,
77356b230eSSteven Lee     [ASPEED_DEV_TIMER2]    = 17,
78356b230eSSteven Lee     [ASPEED_DEV_TIMER3]    = 18,
79356b230eSSteven Lee     [ASPEED_DEV_TIMER4]    = 19,
80356b230eSSteven Lee     [ASPEED_DEV_TIMER5]    = 20,
81356b230eSSteven Lee     [ASPEED_DEV_TIMER6]    = 21,
82356b230eSSteven Lee     [ASPEED_DEV_TIMER7]    = 22,
83356b230eSSteven Lee     [ASPEED_DEV_TIMER8]    = 23,
84356b230eSSteven Lee     [ASPEED_DEV_WDT]       = 24,
85356b230eSSteven Lee     [ASPEED_DEV_LPC]       = 35,
8655c57023SPeter Delevoryas     [ASPEED_DEV_PECI]      = 38,
87356b230eSSteven Lee     [ASPEED_DEV_FMC]       = 39,
8872006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_ESPI]      = 42,
89356b230eSSteven Lee     [ASPEED_DEV_PWM]       = 44,
90356b230eSSteven Lee     [ASPEED_DEV_ADC]       = 46,
91356b230eSSteven Lee     [ASPEED_DEV_SPI1]      = 65,
92356b230eSSteven Lee     [ASPEED_DEV_SPI2]      = 66,
9329c4f060SPhilippe Mathieu-Daudé     [ASPEED_DEV_I3C]       = 102, /* 102 -> 105 */
94356b230eSSteven Lee     [ASPEED_DEV_I2C]       = 110, /* 110 ~ 123 */
95356b230eSSteven Lee     [ASPEED_DEV_KCS]       = 138, /* 138 -> 142 */
9672006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_UDC]       = 9,
9772006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_SGPIOM]    = 51,
9872006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_JTAG0]     = 27,
9972006c61SPhilippe Mathieu-Daudé     [ASPEED_DEV_JTAG1]     = 53,
100356b230eSSteven Lee };
101356b230eSSteven Lee 
aspeed_soc_ast1030_get_irq(AspeedSoCState * s,int dev)102699db715SCédric Le Goater static qemu_irq aspeed_soc_ast1030_get_irq(AspeedSoCState *s, int dev)
103356b230eSSteven Lee {
104a0c21030SPhilippe Mathieu-Daudé     Aspeed10x0SoCState *a = ASPEED10X0_SOC(s);
105356b230eSSteven Lee     AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
106356b230eSSteven Lee 
107a0c21030SPhilippe Mathieu-Daudé     return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]);
108356b230eSSteven Lee }
109356b230eSSteven Lee 
aspeed_soc_ast1030_init(Object * obj)110356b230eSSteven Lee static void aspeed_soc_ast1030_init(Object *obj)
111356b230eSSteven Lee {
112a0c21030SPhilippe Mathieu-Daudé     Aspeed10x0SoCState *a = ASPEED10X0_SOC(obj);
113356b230eSSteven Lee     AspeedSoCState *s = ASPEED_SOC(obj);
114356b230eSSteven Lee     AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
115356b230eSSteven Lee     char socname[8];
116356b230eSSteven Lee     char typename[64];
117356b230eSSteven Lee     int i;
118356b230eSSteven Lee 
119a5b96210SCédric Le Goater     if (sscanf(object_get_typename(obj), "%7s", socname) != 1) {
120356b230eSSteven Lee         g_assert_not_reached();
121356b230eSSteven Lee     }
122356b230eSSteven Lee 
123a0c21030SPhilippe Mathieu-Daudé     object_initialize_child(obj, "armv7m", &a->armv7m, TYPE_ARMV7M);
124356b230eSSteven Lee 
125356b230eSSteven Lee     s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0);
126356b230eSSteven Lee 
127356b230eSSteven Lee     snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
128356b230eSSteven Lee     object_initialize_child(obj, "scu", &s->scu, typename);
129356b230eSSteven Lee     qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", sc->silicon_rev);
130356b230eSSteven Lee 
131356b230eSSteven Lee     object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu), "hw-strap1");
132356b230eSSteven Lee     object_property_add_alias(obj, "hw-strap2", OBJECT(&s->scu), "hw-strap2");
133356b230eSSteven Lee 
1344c70ab16STroy Lee     snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname);
1354c70ab16STroy Lee     object_initialize_child(obj, "i2c", &s->i2c, typename);
1364c70ab16STroy Lee 
13729c4f060SPhilippe Mathieu-Daudé     object_initialize_child(obj, "i3c", &s->i3c, TYPE_ASPEED_I3C);
13829c4f060SPhilippe Mathieu-Daudé 
139356b230eSSteven Lee     snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname);
140356b230eSSteven Lee     object_initialize_child(obj, "timerctrl", &s->timerctrl, typename);
141356b230eSSteven Lee 
142356b230eSSteven Lee     snprintf(typename, sizeof(typename), "aspeed.adc-%s", socname);
143356b230eSSteven Lee     object_initialize_child(obj, "adc", &s->adc, typename);
144356b230eSSteven Lee 
145356b230eSSteven Lee     snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname);
146356b230eSSteven Lee     object_initialize_child(obj, "fmc", &s->fmc, typename);
147356b230eSSteven Lee 
148356b230eSSteven Lee     for (i = 0; i < sc->spis_num; i++) {
149356b230eSSteven Lee         snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname);
150356b230eSSteven Lee         object_initialize_child(obj, "spi[*]", &s->spi[i], typename);
151356b230eSSteven Lee     }
152356b230eSSteven Lee 
153356b230eSSteven Lee     object_initialize_child(obj, "lpc", &s->lpc, TYPE_ASPEED_LPC);
154356b230eSSteven Lee 
15555c57023SPeter Delevoryas     object_initialize_child(obj, "peci", &s->peci, TYPE_ASPEED_PECI);
15655c57023SPeter Delevoryas 
157356b230eSSteven Lee     object_initialize_child(obj, "sbc", &s->sbc, TYPE_ASPEED_SBC);
158356b230eSSteven Lee 
159356b230eSSteven Lee     for (i = 0; i < sc->wdts_num; i++) {
160356b230eSSteven Lee         snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname);
161356b230eSSteven Lee         object_initialize_child(obj, "wdt[*]", &s->wdt[i], typename);
162356b230eSSteven Lee     }
16317075ef2SJamin Lin 
164d2b3eaefSPeter Delevoryas     for (i = 0; i < sc->uarts_num; i++) {
165d2b3eaefSPeter Delevoryas         object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_SERIAL_MM);
166d2b3eaefSPeter Delevoryas     }
167d2b3eaefSPeter Delevoryas 
16817075ef2SJamin Lin     snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname);
16917075ef2SJamin Lin     object_initialize_child(obj, "gpio", &s->gpio, typename);
17080beb085SPeter Delevoryas 
17198fb9678SPhilippe Mathieu-Daudé     snprintf(typename, sizeof(typename), "aspeed.hace-%s", socname);
17298fb9678SPhilippe Mathieu-Daudé     object_initialize_child(obj, "hace", &s->hace, typename);
17398fb9678SPhilippe Mathieu-Daudé 
17480beb085SPeter Delevoryas     object_initialize_child(obj, "iomem", &s->iomem, TYPE_UNIMPLEMENTED_DEVICE);
17580beb085SPeter Delevoryas     object_initialize_child(obj, "sbc-unimplemented", &s->sbc_unimplemented,
17680beb085SPeter Delevoryas                             TYPE_UNIMPLEMENTED_DEVICE);
17772006c61SPhilippe Mathieu-Daudé     object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE);
17872006c61SPhilippe Mathieu-Daudé     object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE);
17972006c61SPhilippe Mathieu-Daudé     object_initialize_child(obj, "udc", &s->udc, TYPE_UNIMPLEMENTED_DEVICE);
18072006c61SPhilippe Mathieu-Daudé     object_initialize_child(obj, "sgpiom", &s->sgpiom,
18172006c61SPhilippe Mathieu-Daudé                             TYPE_UNIMPLEMENTED_DEVICE);
18272006c61SPhilippe Mathieu-Daudé     object_initialize_child(obj, "jtag[0]", &s->jtag[0],
18372006c61SPhilippe Mathieu-Daudé                             TYPE_UNIMPLEMENTED_DEVICE);
18472006c61SPhilippe Mathieu-Daudé     object_initialize_child(obj, "jtag[1]", &s->jtag[1],
18572006c61SPhilippe Mathieu-Daudé                             TYPE_UNIMPLEMENTED_DEVICE);
186356b230eSSteven Lee }
187356b230eSSteven Lee 
aspeed_soc_ast1030_realize(DeviceState * dev_soc,Error ** errp)188356b230eSSteven Lee static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp)
189356b230eSSteven Lee {
190a0c21030SPhilippe Mathieu-Daudé     Aspeed10x0SoCState *a = ASPEED10X0_SOC(dev_soc);
191356b230eSSteven Lee     AspeedSoCState *s = ASPEED_SOC(dev_soc);
192356b230eSSteven Lee     AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
193356b230eSSteven Lee     DeviceState *armv7m;
194356b230eSSteven Lee     Error *err = NULL;
195356b230eSSteven Lee     int i;
19672a7c473SPeter Delevoryas     g_autofree char *sram_name = NULL;
197356b230eSSteven Lee 
198356b230eSSteven Lee     if (!clock_has_source(s->sysclk)) {
199356b230eSSteven Lee         error_setg(errp, "sysclk clock must be wired up by the board code");
200356b230eSSteven Lee         return;
201356b230eSSteven Lee     }
202356b230eSSteven Lee 
203356b230eSSteven Lee     /* General I/O memory space to catch all unimplemented device */
20480beb085SPeter Delevoryas     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->iomem), "aspeed.io",
205356b230eSSteven Lee                                   sc->memmap[ASPEED_DEV_IOMEM],
206356b230eSSteven Lee                                   ASPEED_SOC_IOMEM_SIZE);
20780beb085SPeter Delevoryas     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->sbc_unimplemented),
20880beb085SPeter Delevoryas                                   "aspeed.sbc", sc->memmap[ASPEED_DEV_SBC],
20980beb085SPeter Delevoryas                                   0x40000);
210356b230eSSteven Lee 
211356b230eSSteven Lee     /* AST1030 CPU Core */
212a0c21030SPhilippe Mathieu-Daudé     armv7m = DEVICE(&a->armv7m);
213356b230eSSteven Lee     qdev_prop_set_uint32(armv7m, "num-irq", 256);
214d815649cSPhilippe Mathieu-Daudé     qdev_prop_set_string(armv7m, "cpu-type", aspeed_soc_cpu_type(sc));
215356b230eSSteven Lee     qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk);
216a0c21030SPhilippe Mathieu-Daudé     object_property_set_link(OBJECT(&a->armv7m), "memory",
2174dd9d554SPeter Delevoryas                              OBJECT(s->memory), &error_abort);
218a0c21030SPhilippe Mathieu-Daudé     sysbus_realize(SYS_BUS_DEVICE(&a->armv7m), &error_abort);
219356b230eSSteven Lee 
220356b230eSSteven Lee     /* Internal SRAM */
22172a7c473SPeter Delevoryas     sram_name = g_strdup_printf("aspeed.sram.%d",
222a0c21030SPhilippe Mathieu-Daudé                                 CPU(a->armv7m.cpu)->cpu_index);
22372a7c473SPeter Delevoryas     memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size, &err);
224356b230eSSteven Lee     if (err != NULL) {
225356b230eSSteven Lee         error_propagate(errp, err);
226356b230eSSteven Lee         return;
227356b230eSSteven Lee     }
2284dd9d554SPeter Delevoryas     memory_region_add_subregion(s->memory,
229356b230eSSteven Lee                                 sc->memmap[ASPEED_DEV_SRAM],
230356b230eSSteven Lee                                 &s->sram);
2316ba3dc25SPhilippe Mathieu-Daudé     memory_region_init_ram(&s->secsram, OBJECT(s), "sec.sram",
2326ba3dc25SPhilippe Mathieu-Daudé                            sc->secsram_size, &err);
2336ba3dc25SPhilippe Mathieu-Daudé     if (err != NULL) {
2346ba3dc25SPhilippe Mathieu-Daudé         error_propagate(errp, err);
2356ba3dc25SPhilippe Mathieu-Daudé         return;
2366ba3dc25SPhilippe Mathieu-Daudé     }
2376ba3dc25SPhilippe Mathieu-Daudé     memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SECSRAM],
2386ba3dc25SPhilippe Mathieu-Daudé                                 &s->secsram);
239356b230eSSteven Lee 
240356b230eSSteven Lee     /* SCU */
241356b230eSSteven Lee     if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
242356b230eSSteven Lee         return;
243356b230eSSteven Lee     }
2445bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]);
245356b230eSSteven Lee 
2464c70ab16STroy Lee     /* I2C */
2474c70ab16STroy Lee 
2484c70ab16STroy Lee     object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(&s->sram),
2494c70ab16STroy Lee                              &error_abort);
2504c70ab16STroy Lee     if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) {
2514c70ab16STroy Lee         return;
2524c70ab16STroy Lee     }
2535bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);
2544c70ab16STroy Lee     for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {
255a0c21030SPhilippe Mathieu-Daudé         qemu_irq irq = qdev_get_gpio_in(DEVICE(&a->armv7m),
2564c70ab16STroy Lee                                         sc->irqmap[ASPEED_DEV_I2C] + i);
2574c70ab16STroy Lee         /* The AST1030 I2C controller has one IRQ per bus. */
2584c70ab16STroy Lee         sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq);
2594c70ab16STroy Lee     }
2604c70ab16STroy Lee 
26129c4f060SPhilippe Mathieu-Daudé     /* I3C */
26229c4f060SPhilippe Mathieu-Daudé     if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
26329c4f060SPhilippe Mathieu-Daudé         return;
26429c4f060SPhilippe Mathieu-Daudé     }
26529c4f060SPhilippe Mathieu-Daudé     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
26629c4f060SPhilippe Mathieu-Daudé     for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) {
267a0c21030SPhilippe Mathieu-Daudé         qemu_irq irq = qdev_get_gpio_in(DEVICE(&a->armv7m),
26829c4f060SPhilippe Mathieu-Daudé                                         sc->irqmap[ASPEED_DEV_I3C] + i);
26929c4f060SPhilippe Mathieu-Daudé         /* The AST1030 I3C controller has one IRQ per bus. */
27029c4f060SPhilippe Mathieu-Daudé         sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c.devices[i]), 0, irq);
27129c4f060SPhilippe Mathieu-Daudé     }
27229c4f060SPhilippe Mathieu-Daudé 
27355c57023SPeter Delevoryas     /* PECI */
27455c57023SPeter Delevoryas     if (!sysbus_realize(SYS_BUS_DEVICE(&s->peci), errp)) {
27555c57023SPeter Delevoryas         return;
27655c57023SPeter Delevoryas     }
27755c57023SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->peci), 0,
27855c57023SPeter Delevoryas                     sc->memmap[ASPEED_DEV_PECI]);
27955c57023SPeter Delevoryas     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0,
28055c57023SPeter Delevoryas                        aspeed_soc_get_irq(s, ASPEED_DEV_PECI));
28155c57023SPeter Delevoryas 
282356b230eSSteven Lee     /* LPC */
283356b230eSSteven Lee     if (!sysbus_realize(SYS_BUS_DEVICE(&s->lpc), errp)) {
284356b230eSSteven Lee         return;
285356b230eSSteven Lee     }
2865bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->lpc), 0, sc->memmap[ASPEED_DEV_LPC]);
287356b230eSSteven Lee 
288356b230eSSteven Lee     /* Connect the LPC IRQ to the GIC. It is otherwise unused. */
289356b230eSSteven Lee     sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0,
290356b230eSSteven Lee                        aspeed_soc_get_irq(s, ASPEED_DEV_LPC));
291356b230eSSteven Lee 
292356b230eSSteven Lee     /*
293356b230eSSteven Lee      * On the AST1030 LPC subdevice IRQs are connected straight to the GIC.
294356b230eSSteven Lee      */
295356b230eSSteven Lee     sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 1 + aspeed_lpc_kcs_1,
296a0c21030SPhilippe Mathieu-Daudé                        qdev_get_gpio_in(DEVICE(&a->armv7m),
297356b230eSSteven Lee                                 sc->irqmap[ASPEED_DEV_KCS] + aspeed_lpc_kcs_1));
298356b230eSSteven Lee 
299356b230eSSteven Lee     sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 1 + aspeed_lpc_kcs_2,
300a0c21030SPhilippe Mathieu-Daudé                        qdev_get_gpio_in(DEVICE(&a->armv7m),
301356b230eSSteven Lee                                 sc->irqmap[ASPEED_DEV_KCS] + aspeed_lpc_kcs_2));
302356b230eSSteven Lee 
303356b230eSSteven Lee     sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 1 + aspeed_lpc_kcs_3,
304a0c21030SPhilippe Mathieu-Daudé                        qdev_get_gpio_in(DEVICE(&a->armv7m),
305356b230eSSteven Lee                                 sc->irqmap[ASPEED_DEV_KCS] + aspeed_lpc_kcs_3));
306356b230eSSteven Lee 
307356b230eSSteven Lee     sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 1 + aspeed_lpc_kcs_4,
308a0c21030SPhilippe Mathieu-Daudé                        qdev_get_gpio_in(DEVICE(&a->armv7m),
309356b230eSSteven Lee                                 sc->irqmap[ASPEED_DEV_KCS] + aspeed_lpc_kcs_4));
310356b230eSSteven Lee 
311470253b6SPeter Delevoryas     /* UART */
312d2b3eaefSPeter Delevoryas     if (!aspeed_soc_uart_realize(s, errp)) {
313d2b3eaefSPeter Delevoryas         return;
314d2b3eaefSPeter Delevoryas     }
315356b230eSSteven Lee 
316356b230eSSteven Lee     /* Timer */
317356b230eSSteven Lee     object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu),
318356b230eSSteven Lee                              &error_abort);
319356b230eSSteven Lee     if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), errp)) {
320356b230eSSteven Lee         return;
321356b230eSSteven Lee     }
3225bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0,
323356b230eSSteven Lee                     sc->memmap[ASPEED_DEV_TIMER1]);
324356b230eSSteven Lee     for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
325356b230eSSteven Lee         qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
326356b230eSSteven Lee         sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
327356b230eSSteven Lee     }
328356b230eSSteven Lee 
329356b230eSSteven Lee     /* ADC */
330356b230eSSteven Lee     if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
331356b230eSSteven Lee         return;
332356b230eSSteven Lee     }
3335bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]);
334356b230eSSteven Lee     sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
335356b230eSSteven Lee                        aspeed_soc_get_irq(s, ASPEED_DEV_ADC));
336356b230eSSteven Lee 
337356b230eSSteven Lee     /* FMC, The number of CS is set at the board level */
338356b230eSSteven Lee     object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(&s->sram),
339356b230eSSteven Lee             &error_abort);
340356b230eSSteven Lee     if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) {
341356b230eSSteven Lee         return;
342356b230eSSteven Lee     }
3435bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]);
3445bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 1,
345356b230eSSteven Lee                     ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base);
346356b230eSSteven Lee     sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0,
347356b230eSSteven Lee                        aspeed_soc_get_irq(s, ASPEED_DEV_FMC));
348356b230eSSteven Lee 
349356b230eSSteven Lee     /* SPI */
350356b230eSSteven Lee     for (i = 0; i < sc->spis_num; i++) {
351356b230eSSteven Lee         object_property_set_link(OBJECT(&s->spi[i]), "dram",
352356b230eSSteven Lee                                  OBJECT(&s->sram), &error_abort);
353356b230eSSteven Lee         if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) {
354356b230eSSteven Lee             return;
355356b230eSSteven Lee         }
3565bfcbda7SPeter Delevoryas         aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0,
357356b230eSSteven Lee                         sc->memmap[ASPEED_DEV_SPI1 + i]);
3585bfcbda7SPeter Delevoryas         aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1,
359356b230eSSteven Lee                         ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_base);
360356b230eSSteven Lee     }
361356b230eSSteven Lee 
362356b230eSSteven Lee     /* Secure Boot Controller */
363356b230eSSteven Lee     if (!sysbus_realize(SYS_BUS_DEVICE(&s->sbc), errp)) {
364356b230eSSteven Lee         return;
365356b230eSSteven Lee     }
3665bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sbc), 0, sc->memmap[ASPEED_DEV_SBC]);
367356b230eSSteven Lee 
36898fb9678SPhilippe Mathieu-Daudé     /* HACE */
36998fb9678SPhilippe Mathieu-Daudé     object_property_set_link(OBJECT(&s->hace), "dram", OBJECT(&s->sram),
37098fb9678SPhilippe Mathieu-Daudé                              &error_abort);
37198fb9678SPhilippe Mathieu-Daudé     if (!sysbus_realize(SYS_BUS_DEVICE(&s->hace), errp)) {
37298fb9678SPhilippe Mathieu-Daudé         return;
37398fb9678SPhilippe Mathieu-Daudé     }
37498fb9678SPhilippe Mathieu-Daudé     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->hace), 0,
37598fb9678SPhilippe Mathieu-Daudé                     sc->memmap[ASPEED_DEV_HACE]);
37698fb9678SPhilippe Mathieu-Daudé     sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0,
37798fb9678SPhilippe Mathieu-Daudé                        aspeed_soc_get_irq(s, ASPEED_DEV_HACE));
37898fb9678SPhilippe Mathieu-Daudé 
379356b230eSSteven Lee     /* Watch dog */
380356b230eSSteven Lee     for (i = 0; i < sc->wdts_num; i++) {
381356b230eSSteven Lee         AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]);
3826fdb4381SPhilippe Mathieu-Daudé         hwaddr wdt_offset = sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize;
383356b230eSSteven Lee 
384356b230eSSteven Lee         object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu),
385356b230eSSteven Lee                                  &error_abort);
386356b230eSSteven Lee         if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) {
387356b230eSSteven Lee             return;
388356b230eSSteven Lee         }
3896fdb4381SPhilippe Mathieu-Daudé         aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
390356b230eSSteven Lee     }
39117075ef2SJamin Lin 
39217075ef2SJamin Lin     /* GPIO */
39317075ef2SJamin Lin     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
39417075ef2SJamin Lin         return;
39517075ef2SJamin Lin     }
3965bfcbda7SPeter Delevoryas     aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0,
3975bfcbda7SPeter Delevoryas                     sc->memmap[ASPEED_DEV_GPIO]);
39817075ef2SJamin Lin     sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
39917075ef2SJamin Lin                        aspeed_soc_get_irq(s, ASPEED_DEV_GPIO));
40072006c61SPhilippe Mathieu-Daudé 
40172006c61SPhilippe Mathieu-Daudé     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->pwm), "aspeed.pwm",
40272006c61SPhilippe Mathieu-Daudé                                   sc->memmap[ASPEED_DEV_PWM], 0x100);
40372006c61SPhilippe Mathieu-Daudé 
40472006c61SPhilippe Mathieu-Daudé     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->espi), "aspeed.espi",
40572006c61SPhilippe Mathieu-Daudé                                   sc->memmap[ASPEED_DEV_ESPI], 0x800);
40672006c61SPhilippe Mathieu-Daudé 
40772006c61SPhilippe Mathieu-Daudé     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->udc), "aspeed.udc",
40872006c61SPhilippe Mathieu-Daudé                                   sc->memmap[ASPEED_DEV_UDC], 0x1000);
40972006c61SPhilippe Mathieu-Daudé     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->sgpiom), "aspeed.sgpiom",
41072006c61SPhilippe Mathieu-Daudé                                   sc->memmap[ASPEED_DEV_SGPIOM], 0x100);
41172006c61SPhilippe Mathieu-Daudé 
41272006c61SPhilippe Mathieu-Daudé     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->jtag[0]), "aspeed.jtag",
41372006c61SPhilippe Mathieu-Daudé                                   sc->memmap[ASPEED_DEV_JTAG0], 0x20);
41472006c61SPhilippe Mathieu-Daudé     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->jtag[1]), "aspeed.jtag",
41572006c61SPhilippe Mathieu-Daudé                                   sc->memmap[ASPEED_DEV_JTAG1], 0x20);
416356b230eSSteven Lee }
417356b230eSSteven Lee 
aspeed_soc_ast1030_class_init(ObjectClass * klass,const void * data)418*12d1a768SPhilippe Mathieu-Daudé static void aspeed_soc_ast1030_class_init(ObjectClass *klass, const void *data)
419356b230eSSteven Lee {
420dc13909eSPhilippe Mathieu-Daudé     static const char * const valid_cpu_types[] = {
421dc13909eSPhilippe Mathieu-Daudé         ARM_CPU_TYPE_NAME("cortex-m4"), /* TODO cortex-m4f */
422dc13909eSPhilippe Mathieu-Daudé         NULL
423dc13909eSPhilippe Mathieu-Daudé     };
424356b230eSSteven Lee     DeviceClass *dc = DEVICE_CLASS(klass);
425356b230eSSteven Lee     AspeedSoCClass *sc = ASPEED_SOC_CLASS(dc);
426356b230eSSteven Lee 
4271967e9e0SCédric Le Goater     /* Reason: The Aspeed SoC can only be instantiated from a board */
4281967e9e0SCédric Le Goater     dc->user_creatable = false;
429356b230eSSteven Lee     dc->realize = aspeed_soc_ast1030_realize;
430356b230eSSteven Lee 
431dc13909eSPhilippe Mathieu-Daudé     sc->valid_cpu_types = valid_cpu_types;
432356b230eSSteven Lee     sc->silicon_rev = AST1030_A1_SILICON_REV;
433356b230eSSteven Lee     sc->sram_size = 0xc0000;
4346ba3dc25SPhilippe Mathieu-Daudé     sc->secsram_size = 0x40000; /* 256 * KiB */
435356b230eSSteven Lee     sc->spis_num = 2;
436356b230eSSteven Lee     sc->ehcis_num = 0;
437356b230eSSteven Lee     sc->wdts_num = 4;
438356b230eSSteven Lee     sc->macs_num = 1;
439c5e1bdb9SPeter Delevoryas     sc->uarts_num = 13;
440944128eeSJamin Lin     sc->uarts_base = ASPEED_DEV_UART1;
441356b230eSSteven Lee     sc->irqmap = aspeed_soc_ast1030_irqmap;
442356b230eSSteven Lee     sc->memmap = aspeed_soc_ast1030_memmap;
443356b230eSSteven Lee     sc->num_cpus = 1;
444699db715SCédric Le Goater     sc->get_irq = aspeed_soc_ast1030_get_irq;
445356b230eSSteven Lee }
446356b230eSSteven Lee 
447df4ab076SPhilippe Mathieu-Daudé static const TypeInfo aspeed_soc_ast10x0_types[] = {
448df4ab076SPhilippe Mathieu-Daudé     {
449df4ab076SPhilippe Mathieu-Daudé         .name           = TYPE_ASPEED10X0_SOC,
450356b230eSSteven Lee         .parent         = TYPE_ASPEED_SOC,
451df4ab076SPhilippe Mathieu-Daudé         .instance_size  = sizeof(Aspeed10x0SoCState),
452df4ab076SPhilippe Mathieu-Daudé         .abstract       = true,
453df4ab076SPhilippe Mathieu-Daudé     }, {
454df4ab076SPhilippe Mathieu-Daudé         .name           = "ast1030-a1",
455df4ab076SPhilippe Mathieu-Daudé         .parent         = TYPE_ASPEED10X0_SOC,
456356b230eSSteven Lee         .instance_init  = aspeed_soc_ast1030_init,
457356b230eSSteven Lee         .class_init     = aspeed_soc_ast1030_class_init,
458df4ab076SPhilippe Mathieu-Daudé     },
459356b230eSSteven Lee };
460356b230eSSteven Lee 
461df4ab076SPhilippe Mathieu-Daudé DEFINE_TYPES(aspeed_soc_ast10x0_types)
462