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/linux-6.8/arch/parisc/kernel/
Dperf_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /* low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
46 sync ; follow ERS
91 ;* arg0 : rdr to be read
98 ;* arg0 : rdr to be read
100 ;* %r24 - original DR2 value
101 ;* %r1 - scratch
102 ;* %r29 - scratch
[all …]
/linux-6.8/drivers/staging/pi433/Documentation/
Dpi433.txt13 until something gets received terminates the read request.
50 as described for the transmission cycle the read out of the hardware fifo is done
52 read. So also for reception it is possible to receive more data than the hardware
60 the calls open, ioctl, read, write and close.
64 ----------------
67 PI433_IOC_RD_TX_CFG - get the transmission parameters from the driver
68 PI433_IOC_WR_TX_CFG - set the transmission parameters
69 PI433_IOC_RD_RX_CFG - get the receiving parameters from the driver
70 PI433_IOC_WR_RX_CFG - set the receiving parameters
86 FSK - frequency shift key
[all …]
/linux-6.8/Documentation/sound/cards/
Dhdspm.rst2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
40 Note: Choosing the 56-channel mode for
41 transmission/receive-mode , only 28 are transmitted/received
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/linux-6.8/drivers/net/hamradio/
Dz8530.h1 /* SPDX-License-Identifier: GPL-2.0 */
57 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
72 #define SYNC_ENAB 0 /* Sync Modes Enable */
77 #define MONSYNC 0 /* 8 Bit Sync character */
78 #define BISYNC 0x10 /* 16 bit sync character */
79 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
80 #define EXTSYNC 0x30 /* External Sync Mode */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
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/linux-6.8/drivers/tty/serial/
Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
82 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
98 #define SYNC_ENAB 0 /* Sync Modes Enable */
103 #define MONSYNC 0 /* 8 Bit Sync character */
104 #define BISYNC 0x10 /* 16 bit sync character */
105 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
106 #define EXTSYNC 0x30 /* External Sync Mode */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
128 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
[all …]
Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
90 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
106 #define SYNC_ENAB 0 /* Sync Modes Enable */
111 #define MONSYNC 0 /* 8 Bit Sync character */
112 #define BISYNC 0x10 /* 16 bit sync character */
113 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
114 #define EXTSYNC 0x30 /* External Sync Mode */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
[all …]
Dzs.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
109 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
124 #define SYNC_ENAB 0 /* Sync Modes Enable */
130 #define MONSYNC 0 /* 8 Bit Sync character */
131 #define BISYNC 0x10 /* 16 bit sync character */
132 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
133 #define EXTSYNC 0x30 /* External Sync Mode */
144 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
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Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
66 return uap->mate; in pmz_get_port_A()
78 writeb(reg, port->control_reg); in read_zsreg()
79 return readb(port->control_reg); in read_zsreg()
85 writeb(reg, port->control_reg); in write_zsreg()
86 writeb(value, port->control_reg); in write_zsreg()
91 return readb(port->data_reg); in read_zsdata()
96 writeb(data, port->data_reg); in write_zsdata()
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/linux-6.8/include/uapi/linux/
Ddma-buf.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
26 * struct dma_buf_sync - Synchronize with CPU access.
29 * possible to guarantee coherency between the CPU-visible map and underlying
35 * with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
37 * DMA_BUF_SYNC_END and the same read/write flags.
45 * follow-up work is not submitted to GPU or other device driver until
65 * Indicates that the mapped DMA buffer will be read by the
89 * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
92 * current set of fences on a dma-buf file descriptor as a sync_file. CPU
93 * waits via poll() or other driver-specific mechanisms typically wait on
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/linux-6.8/Documentation/admin-guide/cgroup-v1/
Dblkio-controller.rst22 -----------------------------
33 mount -t cgroup -o blkio none /sys/fs/cgroup/blkio
43 Run dd to read a file and see if rate is throttled to 1MB/s or not::
98 --------------------------------
106 see Documentation/block/bfq-iosched.rst.
110 weight. For more details, see Documentation/block/bfq-iosched.rst.
152 are further divided by the type of operation - read or write, sync
159 are further divided by the type of operation - read or write, sync
173 the type of operation - read or write, sync or async. First two fields
186 (there might be a time lag here due to re-ordering of requests by the
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/linux-6.8/Documentation/driver-api/memory-devices/
Dti-gpmc.rst1 .. SPDX-License-Identifier: GPL-2.0
14 * Pseudo-SRAM devices
65 2. sync common
74 3. read async muxed
85 4. read async non-muxed
96 5. read sync muxed
107 6. read sync non-muxed
131 8. write async non-muxed
144 9. write sync muxed
157 10. write sync non-muxed
/linux-6.8/drivers/power/supply/
Dda9150-fg.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DA9150 Fuel-Gauge Driver
22 #include <linux/devm-helpers.h>
61 /* QIF Sync Timeout */
96 /* Set QIF code (READ mode) */ in da9150_fg_read_attr()
99 da9150_read_qif(fg->da9150, read_addr, size, buf); in da9150_fg_read_attr()
121 da9150_write_qif(fg->da9150, write_addr, size, buf); in da9150_fg_write_attr()
124 /* Trigger QIF Sync to update QIF readable data */
130 mutex_lock(&fg->io_lock); in da9150_fg_read_sync_start()
132 /* Check if QIF sync already requested, and write to sync if not */ in da9150_fg_read_sync_start()
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/linux-6.8/arch/powerpc/platforms/powermac/
Dcache.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * This file contains low-level cache management functions
5 * (In fact the only thing that is Apple-specific is that we assume
6 * that we can read from ROM at physical address 0xfff00000.)
15 #include <asm/feature-fixups.h>
45 sync
52 sync
58 sync
60 sync
62 /* Disp-flush L1. We have a weird problem here that I never
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/linux-6.8/tools/testing/selftests/arm64/mte/
Dcheck_user_mem.c1 // SPDX-License-Identifier: GPL-2.0
49 if (fd == -1) in check_usermem_access_fault()
62 syscall_len = read(fd, ptr, len); in check_usermem_access_fault()
66 /* Verify same pattern is read */ in check_usermem_access_fault()
74 tag_len = len - tag_offset; in check_usermem_access_fault()
89 syscall_len = read(fd, ptr + ptroff, size); in check_usermem_access_fault()
114 * Accessing user memory in kernel with invalid tag should fail in sync in check_usermem_access_fault()
142 void format_test_name(char* name, int name_len, int type, int sync, int map, int len, int offset) { in format_test_name() argument
149 test_type = "read"; in format_test_name()
165 switch (sync) { in format_test_name()
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/linux-6.8/arch/sparc/kernel/
Dspiterrs.S1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* We need to carefully read the error status, ACK the errors,
6 * We pass the AFAR in as-is, and we encode the status
7 * information as described in asm-sparc64/sfafsr.h
15 membar #Sync
39 /* Read in the UDB error register state, clearing the sticky
40 * error bits as-needed. We only clear them if the UE bit is
44 * NOTE: UltraSparc-I/II have high and low UDB error
46 * present on those chips. UltraSparc-IIi only
60 membar #Sync
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/linux-6.8/arch/csky/include/asm/
Dbarrier.h1 /* SPDX-License-Identifier: GPL-2.0 */
21 * r: read
69 * sync: completion barrier, all sync.xx instructions
71 * made by ld/st instructions before sync.s
72 * sync.s: inherit from sync, but also shareable to other cores
73 * sync.i: inherit from sync, but also flush cpu pipeline
74 * sync.is: the same with sync.i + sync.s
76 #define mb() asm volatile ("sync\n":::"memory")
80 * Using three sync.is to prevent speculative PTW
82 #define sync_is() asm volatile ("sync.is\nsync.is\nsync.is\n":::"memory")
[all …]
/linux-6.8/drivers/net/ethernet/ti/
Dcpts.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * TI Common Platform Time Sync
26 u32 control; /* Time sync control */
32 u32 intstat_raw; /* Time sync interrupt status raw */
33 u32 intstat_masked; /* Time sync interrupt status masked */
34 u32 int_enable; /* Time sync interrupt enable */
57 #define CPTS_EN (1<<0) /* Time Sync Enable */
65 #define TS_PEND_RAW (1<<0) /* int read (before enable) */
66 #define TS_PEND (1<<0) /* masked interrupt read (after enable) */
73 #define EVENT_TYPE_SHIFT (20) /* Time sync event type */
[all …]
/linux-6.8/drivers/net/ethernet/qualcomm/
Dqca_spi.c21 * kernel-based SPI device; it is essentially an Ethernet-to-SPI
57 MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000.");
63 MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000.");
75 MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3.");
87 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); in start_spi_intr_handling()
100 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); in end_spi_intr_handling()
122 ret = spi_sync(qca->spi_dev, &msg); in qcaspi_write_burst()
146 ret = spi_sync(qca->spi_dev, &msg); in qcaspi_write_legacy()
175 ret = spi_sync(qca->spi_dev, &msg); in qcaspi_read_burst()
199 ret = spi_sync(qca->spi_dev, &msg); in qcaspi_read_legacy()
[all …]
/linux-6.8/arch/powerpc/kernel/
Dl2cr_6xx.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 Copyright © 1997-1998 by PowerLogix R & D, Inc.
9 - First public release, contributed by PowerLogix.
12 - Terry: Made sure code disabled interrupts before running. (Previously
14 - Terry: Updated for tentative G4 support. 4MB of memory is now flushed
16 - Terry: Updated for workaround to HID0[DPM] processor bug
20 - Terry: Added isync to correct for an errata.
23 - DanM: Finally added the 7450 patch I've had for the past
29 Please e-mail updates to this file to me, thanks!
36 #include <asm/feature-fixups.h>
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/linux-6.8/drivers/gpu/host1x/
Dsyncpt.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
53 /* Initialize sync point array */
56 /* Free sync point array */
59 /* Return number of sync point supported. */
69 * Check sync point sanity. If max is larger than min, there have too many
70 * sync point increments.
72 * Client managed sync point are not tracked.
77 if (sp->client_managed) in host1x_syncpt_check_max()
80 return (s32)(max - real) >= 0; in host1x_syncpt_check_max()
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/linux-6.8/Documentation/litmus-tests/
DREADME9 tools/memory-model/README.
13 --------------------------
15 Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus
17 stronger than a normal acquire: both the read and write parts of
20 Atomic-RMW-ops-are-atomic-WRT-atomic_set.litmus
26 --------------------
28 MP+onceassign+derefonce.litmus (under tools/memory-model/litmus-tests/)
30 ensure that an RCU reader will not see pre-initialization garbage.
32 RCU+sync+read.litmus
33 RCU+sync+free.litmus
[all …]
/linux-6.8/drivers/md/
Ddm-raid1.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2005-2008 Red Hat, Inc. All rights reserved.
9 #include "dm-bio-record.h"
17 #include <linux/device-mapper.h>
18 #include <linux/dm-io.h>
19 #include <linux/dm-dirty-log.h>
20 #include <linux/dm-kcopyd.h>
21 #include <linux/dm-region-hash.h>
33 #define errors_handled(p) ((p)->features & DM_RAID1_HANDLE_ERRORS)
34 #define keep_log(p) ((p)->features & DM_RAID1_KEEP_LOG)
[all …]
/linux-6.8/sound/drivers/vx/
Dvx_uer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 * vx_modify_board_clock - tell the board that its clock has been modified
18 * @sync: DSP needs to resynchronize its FIFO
20 static int vx_modify_board_clock(struct vx_core *chip, int sync) in vx_modify_board_clock() argument
26 if (sync) in vx_modify_board_clock()
32 * vx_modify_board_inputs - resync audio inputs
44 * vx_read_one_cbit - read one bit from UER config
52 mutex_lock(&chip->lock); in vx_read_one_cbit()
53 if (chip->type >= VX_TYPE_VXPOCKET) { in vx_read_one_cbit()
54 vx_outb(chip, CSUER, 1); /* read */ in vx_read_one_cbit()
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/linux-6.8/drivers/gpu/drm/amd/include/ivsrcid/dcn/
Dirqsrcs_dcn_1_0.h54 #define DCN_1_0__SRCID__DC_I2C_DDC1_READ_REQUEST 1 // DC_I2C DDC1 read request DC_I2C_DDC1_READ_R…
57 #define DCN_1_0__SRCID__DC_I2C_DDC2_READ_REQUEST 1 // DC_I2C DDC2 read request DC_I2C_DDC2_READ_REQ…
60 #define DCN_1_0__SRCID__DC_I2C_DDC3_READ_REQUEST 1 // DC_I2C DDC3 read request DC_I2C_DDC3_READ_REQ…
63 #define DCN_1_0__SRCID__DC_I2C_DDC4_READ_REQUEST 1 // DC_I2C_DDC4 read request DC_I2C_DDC4_READ_REQ…
66 #define DCN_1_0__SRCID__DC_I2C_DDC5_READ_REQUEST 1 // DC_I2C_DDC5 read request DC_I2C_DDC5_READ_REQ…
69 #define DCN_1_0__SRCID__DC_I2C_DDC6_READ_REQUEST 1 // DC_I2C_DDC6 read request DC_I2C_DDC6_READ_REQ…
72 #define DCN_1_0__SRCID__DC_I2C_DDCVGA_READ_REQUEST 1 // DC_I2C_DDCVGA read request DC_I2C_VGA_READ_…
75 #define DCN_1_0__SRCID__GENERIC_I2C_DDC_READ_REQUEST 1 // GENERIC_I2C_DDC read request GENERIC_I2C_…
192 #define DCN_1_0__SRCID__DC_DAC_A_AUTO_DET 0xA // DAC A auto - detection DACA_AUTODETECT_GEN…
267 #define DCN_1_0__SRCID__DC_AUX1_GTC_SYNC_LOCK_DONE 0xD // AUX1 GTC sync lock complete AUX1_GTC…
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/linux-6.8/Documentation/devicetree/bindings/memory-controllers/
Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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