tty/serial/zs.h

1 /* SPDX-License-Identifier: GPL-2.0 */
38  * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
109 #define SYNC_L_INH	0x2	/* Sync Character Load Inhibit */
124 #define SYNC_ENAB	0	/* Sync Modes Enable */
130 #define MONSYNC		0	/* 8 Bit Sync character */
131 #define BISYNC		0x10	/* 16 bit sync character */
132 #define SDLC		0x20	/* SDLC Mode (01111110 Sync Flag) */
133 #define EXTSYNC		0x30	/* External Sync Mode */
144 #define SDLC_CRC	0x4	/* SDLC/CRC-16 */
154 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
156 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
173 #define BIT6		1	/* 6 bit/8bit sync */
222 #define SYNCIE		0x10	/* Sync/hunt IE */
228 /* Read Register 0 (Transmit/Receive Buffer Status and External Status) */
233 #define SYNC_HUNT	0x10	/* Sync/hunt */
238 /* Read Register 1 (Special Receive Condition Status) */
255 /* Read Register 2 (Interrupt Vector (WR2) -- channel A).  */
257 /* Read Register 2 (Modified Interrupt Vector -- channel B).  */
259 /* Read Register 3 (Interrupt Pending Bits -- channel A only).  */
267 /* Read Register 6 (SDLC FIFO Status and Byte Count LSB) */
269 /* Read Register 7 (SDLC FIFO Status and Byte Count MSB) */
271 /* Read Register 8 (Receive Data) */
273 /* Read Register 10 (Miscellaneous Status Bits) */
279 /* Read Register 12 (Lower Byte of Baud Rate Generator Constant (WR12)) */
281 /* Read Register 13 (Upper Byte of Baud Rate Generator Constant (WR13) */
283 /* Read Register 15 (External/Status Interrupt Control (WR15)) */