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/linux-6.15/arch/powerpc/boot/dts/fsl/ !
Dt104xrdb.dtsi4 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
47 bman_fbpr: bman-fbpr {
51 qman_fqd: qman-fqd {
55 qman_pfdr: qman-pfdr {
62 reg = <0xf 0xfe124000 0 0x2000>;
68 #address-cells = <1>;
[all …]
Dbsc9131si-post.dtsi4 * Copyright 2011-2012 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
36 #address-cells = <2>;
37 #size-cells = <1>;
43 #address-cells = <1>;
44 #size-cells = <1>;
46 compatible = "fsl,bsc9131-immr", "simple-bus";
47 bus-frequency = <0>; // Filled out by uboot.
49 ecm-law@0 {
50 compatible = "fsl,ecm-law";
[all …]
Dt104xd4rdb.dtsi14 * names of its contributors may be used to endorse or promote products
36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
41 bman_fbpr: bman-fbpr {
45 qman_fqd: qman-fqd {
49 qman_pfdr: qman-pfdr {
56 reg = <0xf 0xfe124000 0 0x2000>;
62 #address-cells = <1>;
63 #size-cells = <1>;
[all …]
Dp1020rdb-pd.dts2 * P1020 RDB-PD Device Tree Source (32-bit address map)
14 * names of its contributors may be used to endorse or promote products
35 /include/ "p1020si-pre.dtsi"
37 model = "fsl,P1020RDB-PD";
38 compatible = "fsl,P1020RDB-PD";
45 reg = <0x0 0xffe05000 0x0 0x1000>;
54 #address-cells = <1>;
55 #size-cells = <1>;
56 compatible = "cfi-flash";
57 reg = <0x0 0x0 0x4000000>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/pinctrl/ !
Dqcom,msm8974-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,msm8974-pinctrl
20 reg:
26 gpio-reserved-ranges:
30 gpio-line-names:
[all …]
Dqcom,sdm845-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdm845-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
17 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
21 const: qcom,sdm845-pinctrl
23 reg:
29 gpio-reserved-ranges:
[all …]
Dqcom,msm8994-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8994-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
19 - qcom,msm8992-pinctrl
20 - qcom,msm8994-pinctrl
22 reg:
28 gpio-reserved-ranges:
[all …]
Dqcom,msm8916-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8916-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,msm8916-pinctrl
20 reg:
26 gpio-reserved-ranges:
30 gpio-line-names:
[all …]
Dqcom,x1e80100-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,x1e80100-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rajendra Nayak <quic_rjendra@quicinc.com>
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,x1e80100-tlmm
22 reg:
28 gpio-reserved-ranges:
32 gpio-line-names:
[all …]
/linux-6.15/arch/arm64/boot/dts/renesas/ !
Dwhite-hawk-ard-audio-da7212.dtso1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for White Hawk (Single) board with ARD-AUDIO-DA7212 board
5 * You can find and buy "ARD-AUDIO-DA7212" at Digi-Key
7 * https://www.digikey.jp/en/products/detail/ARD-AUDIO-DA7212/1564-1021-ND/5456357
14 * White Hawk ARD-AUDIO-DA7212
15 * +----------------------------+
19 * | AUDIO_CLKIN_V pin1 |<--\ +---------------+
20 * |(*) GP1_25/SL_SW2_V pin2 |<--/ |J2 |
21 * | AUDIO_CLKOUT_V pin5 |<----->| pin7 MCLK |
22 * | SSI_SCK_V pin9 |<----->| pin1 BCLK |
[all …]
Dwhite-hawk-single.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 * Copyright (C) 2023-2024 Glider bv
8 #include "white-hawk-cpu-common.dtsi"
9 #include "white-hawk-common.dtsi"
13 compatible = "renesas,white-hawk-single";
17 uart-has-rtscts;
35 bias-disable;
40 drive-strength = <24>;
41 bias-disable;
46 drive-strength = <24>;
[all …]
/linux-6.15/arch/riscv/boot/dts/allwinner/ !
Dsun20i-d1s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
6 #include "sunxi-d1s-t113.dtsi"
10 timebase-frequency = <24000000>;
11 #address-cells = <1>;
12 #size-cells = <0>;
17 reg = <0>;
19 d-cache-block-size = <64>;
20 d-cache-sets = <256>;
21 d-cache-size = <32768>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/firmware/ !
Dfsl,scu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
26 const: fsl,imx-scu
28 clock-controller:
31 $ref: /schemas/clock/fsl,scu-clk.yaml
[all …]
/linux-6.15/Documentation/devicetree/bindings/net/dsa/ !
Dmarvell,mv88e6xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
22 - enum:
23 - marvell,mv88e6085
24 - marvell,mv88e6190
25 - marvell,mv88e6250
43 - items:
44 - const: marvell,turris-mox-mv88e6085
[all …]
/linux-6.15/arch/arm64/boot/dts/ti/ !
Dk3-am642-evm-nand.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "k3-pinctrl.h"
15 gpmc0_default_pins: gpmc0-default-pins {
16 bootph-all;
17 pinctrl-single,pins = <
53 gpmc0-hog {
[all …]
/linux-6.15/arch/arm/boot/dts/marvell/ !
Darmada-xp-gp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-MV784MP-GP)
6 * Copyright (C) 2013-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
22 /dts-v1/;
23 #include <dt-bindings/gpio/gpio.h>
24 #include "armada-xp-mv78460.dtsi"
27 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
[all …]
Darmada-370-seagate-nas-4bay.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Seagate NAS 4-Bay (Armada 370 SoC).
13 * Product name : Seagate NAS 4-Bay
14 * Code name (board/PCB) : Dart 4-Bay
19 /dts-v1/;
20 #include "armada-370-seagate-nas-xbay.dtsi"
21 #include <dt-bindings/leds/leds-ns2.h>
24 model = "Seagate NAS 4-Bay (Dart, SRPD40)";
25 compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
28 internal-regs {
[all …]
/linux-6.15/arch/arm64/boot/dts/hisilicon/ !
Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/linux-6.15/drivers/clk/sunxi/ !
Dclk-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013-2015 Emilio López
9 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
19 * sunxi_usb_reset... - reset bits in usb clk registers handling
23 void __iomem *reg; member
36 u32 reg; in sunxi_usb_reset_assert() local
38 clk_prepare_enable(data->clk); in sunxi_usb_reset_assert()
39 spin_lock_irqsave(data->lock, flags); in sunxi_usb_reset_assert()
41 reg = readl(data->reg); in sunxi_usb_reset_assert()
[all …]
/linux-6.15/drivers/macintosh/ !
Dwindfarm_smu_sensors.c1 // SPDX-License-Identifier: GPL-2.0-only
54 u32 reg; /* index in SMU */ member
82 return -EIO; in smu_read_adc()
95 rc = smu_read_adc(ads->reg, &val); in smu_cputemp_get()
103 scaled = (s64)(((u64)val) * (u64)cpudiode->m_value); in smu_cputemp_get()
105 scaled += ((s64)cpudiode->b_value) << 9; in smu_cputemp_get()
117 rc = smu_read_adc(ads->reg, &val); in smu_cpuamp_get()
125 scaled = (s32)(val * (u32)cpuvcp->curr_scale); in smu_cpuamp_get()
126 scaled += (s32)cpuvcp->curr_offset; in smu_cpuamp_get()
138 rc = smu_read_adc(ads->reg, &val); in smu_cpuvolt_get()
[all …]
/linux-6.15/arch/arm/boot/dts/samsung/ !
Dexynos5422-odroidxu3-lite.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3-Lite board device tree source
11 /dts-v1/;
12 #include "exynos5422-odroidxu3-common.dtsi"
13 #include "exynos5422-odroidxu3-audio.dtsi"
14 #include "exynos54xx-odroidxu-leds.dtsi"
18 compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
34 samsung,asv-bin = <2>;
38 * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies
43 /delete-node/opp-2000000000;
[all …]
/linux-6.15/drivers/clk/socfpga/ !
Dclk-gate-a10.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
27 if (socfpgaclk->fixed_div) in socfpga_gate_clk_recalc_rate()
28 div = socfpgaclk->fixed_div; in socfpga_gate_clk_recalc_rate()
29 else if (socfpgaclk->div_reg) { in socfpga_gate_clk_recalc_rate()
30 val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; in socfpga_gate_clk_recalc_rate()
31 val &= GENMASK(socfpgaclk->width - 1, 0); in socfpga_gate_clk_recalc_rate()
50 const char *clk_name = node->name; in __socfpga_gate_init()
59 rc = of_property_read_u32_array(node, "clk-gate", clk_gate, 2); in __socfpga_gate_init()
64 socfpga_clk->hw.reg = clk_mgr_a10_base_addr + clk_gate[0]; in __socfpga_gate_init()
[all …]
/linux-6.15/Documentation/devicetree/bindings/mfd/ !
Das3722.txt4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on
[all …]
/linux-6.15/arch/arm/boot/dts/microchip/ !
Dsama5d3_lcd.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * sama5d3_lcd.dtsi - Device Tree Include file for SAMA5D3 SoC with
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
16 compatible = "atmel,sama5d3-hlcdc";
17 reg = <0xf0030000 0x2000>;
20 clock-names = "periph_clk","sys_clk", "slow_clk";
23 hlcdc-display-controller {
24 compatible = "atmel,hlcdc-display-controller";
25 #address-cells = <1>;
[all …]
/linux-6.15/arch/arm64/boot/dts/mediatek/ !
Dmt8183-kukui-audio-da7219.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 pinctrl-names = "default";
11 pinctrl-0 = <&da7219_pins>;
13 reg = <0x1a>;
14 interrupts-extended = <&pio 165 IRQ_TYPE_LEVEL_LOW>;
16 dlg,micbias-lvl = <2600>;
17 dlg,mic-amp-in-sel = "diff";
18 VDD-supply = <&pp1800_alw>;
19 VDDMIC-supply = <&pp3300_alw>;
20 VDDIO-supply = <&pp1800_alw>;
[all …]

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