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/qemu/hw/timer/
H A Davr_timer16.c23 * Driver for 16 bit timers on 8 bit AVR devices.
H A Dpxa2xx_timer.c348 case OWER: /* XXX: Reset on OSMR3 match? */ in pxa2xx_timer_write()
/qemu/hw/arm/
H A Dxilinx_zynq.c236 /* 256K of on-chip memory */ in zynq_init()
H A Daspeed_ast10x0.c293 * On the AST1030 LPC subdevice IRQs are connected straight to the GIC. in aspeed_soc_ast1030_realize()
H A Dstrongarm.c6 * Largely based on StrongARM emulation:
10 * UART code based on QEMU 16550A UART emulation
H A Dstm32l4x5_soc.c444 /* Reason: Mapped at fixed location on the system bus */ in stm32l4x5_soc_class_init()
/qemu/target/ppc/
H A Dgdbstub.c316 * GDB identifies registers based on the order they are in gdb_gen_spr_feature()
/qemu/hw/net/
H A Dmsf2-emac.c317 * For our implementation, turning on modules is instantaneous, in emac_write()
/qemu/tests/tcg/multiarch/system/
H A Dmemory.c473 * or negative depending on what offset we are reading from.
/qemu/hw/audio/
H A Dvia-ac97.c436 * and the AmigaOS driver writes 1 only enabling IO bit which works on in via_ac97_realize()
/qemu/hw/scsi/
H A Dvirtio-scsi.c337 /* Execute a TMF on the requests in the current AioContext */
683 * If dataplane is configured but not yet started, do so now and return true on
H A Desp.c37 * On Sparc32, this is the ESP (NCR53C90) part of chip STP2000 (Master I/O),
43 * On Macintosh Quadra it is a NCR53C96.
/qemu/hw/input/
H A Dps2.c53 #define KBD_REPLY_POR 0xAA /* Power on reset */
528 /* FIXME: break code should be configured on a key by key basis */ in ps2_keyboard_event()
/qemu/hw/ppc/
H A De500.c894 static void ppce500_power_off(void *opaque, int line, int on) in ppce500_power_off() argument
896 if (on) { in ppce500_power_off()
/qemu/target/s390x/
H A Dcpu_features_def.h.inc99 …a_esop2", STFL, 131, "Side-effect-access facility and Enhanced-suppression-on-protection facility …
129 DEF_FEAT(ESOP, "esop", SCLP_CONF_CHAR, 46, "Enhanced-suppression-on-protection facility")
/qemu/target/i386/nvmm/
H A Dnvmm-all.c354 /* Exit on interrupt window. */ in nvmm_can_take_int()
908 /* Allow IPIs on the current thread. */ in nvmm_init_cpu_signals()
/qemu/target/s390x/tcg/
H A Dtranslate.c240 * of the 16 byte vector, on both, little and big endian systems. in vec_reg_offset()
796 /* Jump based on CC. We'll load up the real cond below; in disas_jcc()
1012 /* Instructions can place constraints on their operands, raising specification
1027 the PC (for whatever reason), so there's no need to do it again on
2830 /* LOAD * ON CONDITION */ in op_loc()
3691 /* MASK is the set of bits to be operated on from R2. in op_rosbg()
6000 #define FAC_LOC S390_FEAT_STFLE_45 /* load/store on condition 1 */
6001 #define FAC_LOC2 S390_FEAT_STFLE_53 /* load/store on condition 2 */
6124 /* Drop the EX data now, so that it's clear on exception paths. */ in extract_insn()
/qemu/target/ppc/translate/
H A Dvmx-impl.c.inc498 * 'carry' and perform shift on lower doubleword.
508 * Perform shift on higher doubleword element of vA and replace lowest
540 * 'carry' and perform shift on higher doubleword.
549 * Perform shift on lower doubleword element of vA and replace highest
1824 * behavior as software shouldn't rely on it.
/qemu/target/i386/tcg/
H A Dfpu_helper.c144 * "zeroed on reset" portion of the CPU state struct. in cpu_init_fp_statuses()
162 * section 4.8.3.5 "Operating on SNaNs and QNaNs" says that the in cpu_init_fp_statuses()
193 * section 10.2.3.3 on the FTZ bit of MXCSR says that we flush in cpu_init_fp_statuses()
914 * Polynomial coefficients for an approximation to (2^x - 1) / x, on
1421 * on the rounding mode. in helper_fpatan()
/qemu/include/
H A Delf.h309 put on the initial stack */
397 /* The remaining relocs are defined on Irix, although they are not
1533 /* These constants define the permissions on sections in the program
/qemu/target/sparc/
H A Dldst_helper.c275 /* Used entries are not replaced on first pass */ in replace_tlb_1bit_lru()
680 if (reg == 3) { /* Fault status cleared on read */ in helper_ld_asi()
1671 /* these ASIs have different functions on UltraSPARC-IIIi in helper_st_asi()
/qemu/tcg/sparc64/
H A Dtcg-target.c.inc764 swap the operands on GTU/LEU. There's no benefit to loading
1383 /* Select the correct result based on actual carry value. */
1861 /* Select the correct result based on actual borrow value. */
/qemu/tests/unit/
H A Dtest-smp-parse.c51 * Currently a 5-level topology hierarchy is supported on PC machines
67 * Currently a 4-level topology hierarchy is supported on ARM virt machines
81 * Currently a 5-level topology hierarchy is supported on s390 ccw machines
/qemu/hw/misc/
H A Dexynos4210_pmu.c359 * DATA bit high, set usually by bootloader, keeps system on.
/qemu/python/qemu/qmp/
H A Dqmp_shell.py13 Low-level QEMU shell on top of QMP.

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