16f7e9aecSbellard /*
267e999beSbellard * QEMU ESP/NCR53C9x emulation
36f7e9aecSbellard *
44e9aec74Spbrook * Copyright (c) 2005-2006 Fabrice Bellard
5fabaaf1dSHervé Poussineau * Copyright (c) 2012 Herve Poussineau
678d68f31SMark Cave-Ayland * Copyright (c) 2023 Mark Cave-Ayland
76f7e9aecSbellard *
86f7e9aecSbellard * Permission is hereby granted, free of charge, to any person obtaining a copy
96f7e9aecSbellard * of this software and associated documentation files (the "Software"), to deal
106f7e9aecSbellard * in the Software without restriction, including without limitation the rights
116f7e9aecSbellard * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
126f7e9aecSbellard * copies of the Software, and to permit persons to whom the Software is
136f7e9aecSbellard * furnished to do so, subject to the following conditions:
146f7e9aecSbellard *
156f7e9aecSbellard * The above copyright notice and this permission notice shall be included in
166f7e9aecSbellard * all copies or substantial portions of the Software.
176f7e9aecSbellard *
186f7e9aecSbellard * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
196f7e9aecSbellard * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
206f7e9aecSbellard * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
216f7e9aecSbellard * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
226f7e9aecSbellard * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
236f7e9aecSbellard * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
246f7e9aecSbellard * THE SOFTWARE.
256f7e9aecSbellard */
265d20fa6bSblueswir1
27a4ab4792SPeter Maydell #include "qemu/osdep.h"
2883c9f4caSPaolo Bonzini #include "hw/sysbus.h"
29d6454270SMarkus Armbruster #include "migration/vmstate.h"
3064552b6bSMarkus Armbruster #include "hw/irq.h"
310d09e41aSPaolo Bonzini #include "hw/scsi/esp.h"
32bf4b9889SBlue Swirl #include "trace.h"
331de7afc9SPaolo Bonzini #include "qemu/log.h"
340b8fa32fSMarkus Armbruster #include "qemu/module.h"
356f7e9aecSbellard
3667e999beSbellard /*
375ad6bb97Sblueswir1 * On Sparc32, this is the ESP (NCR53C90) part of chip STP2000 (Master I/O),
385ad6bb97Sblueswir1 * also produced as NCR89C100. See
3967e999beSbellard * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
4067e999beSbellard * and
4167e999beSbellard * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
4274d71ea1SLaurent Vivier *
4374d71ea1SLaurent Vivier * On Macintosh Quadra it is a NCR53C96.
4467e999beSbellard */
4567e999beSbellard
esp_raise_irq(ESPState * s)46c73f96fdSblueswir1 static void esp_raise_irq(ESPState *s)
47c73f96fdSblueswir1 {
48c73f96fdSblueswir1 if (!(s->rregs[ESP_RSTAT] & STAT_INT)) {
49c73f96fdSblueswir1 s->rregs[ESP_RSTAT] |= STAT_INT;
50c73f96fdSblueswir1 qemu_irq_raise(s->irq);
51bf4b9889SBlue Swirl trace_esp_raise_irq();
52c73f96fdSblueswir1 }
53c73f96fdSblueswir1 }
54c73f96fdSblueswir1
esp_lower_irq(ESPState * s)55c73f96fdSblueswir1 static void esp_lower_irq(ESPState *s)
56c73f96fdSblueswir1 {
57c73f96fdSblueswir1 if (s->rregs[ESP_RSTAT] & STAT_INT) {
58c73f96fdSblueswir1 s->rregs[ESP_RSTAT] &= ~STAT_INT;
59c73f96fdSblueswir1 qemu_irq_lower(s->irq);
60bf4b9889SBlue Swirl trace_esp_lower_irq();
61c73f96fdSblueswir1 }
62c73f96fdSblueswir1 }
63c73f96fdSblueswir1
esp_raise_drq(ESPState * s)6474d71ea1SLaurent Vivier static void esp_raise_drq(ESPState *s)
6574d71ea1SLaurent Vivier {
66442de89aSMark Cave-Ayland if (!(s->drq_state)) {
676dec7c0dSMark Cave-Ayland qemu_irq_raise(s->drq_irq);
68960ebfd9SMark Cave-Ayland trace_esp_raise_drq();
69442de89aSMark Cave-Ayland s->drq_state = true;
70442de89aSMark Cave-Ayland }
7174d71ea1SLaurent Vivier }
7274d71ea1SLaurent Vivier
esp_lower_drq(ESPState * s)7374d71ea1SLaurent Vivier static void esp_lower_drq(ESPState *s)
7474d71ea1SLaurent Vivier {
75442de89aSMark Cave-Ayland if (s->drq_state) {
766dec7c0dSMark Cave-Ayland qemu_irq_lower(s->drq_irq);
77960ebfd9SMark Cave-Ayland trace_esp_lower_drq();
78442de89aSMark Cave-Ayland s->drq_state = false;
79442de89aSMark Cave-Ayland }
8074d71ea1SLaurent Vivier }
8174d71ea1SLaurent Vivier
822c1017bfSMark Cave-Ayland static const char *esp_phase_names[8] = {
832c1017bfSMark Cave-Ayland "DATA OUT", "DATA IN", "COMMAND", "STATUS",
842c1017bfSMark Cave-Ayland "(reserved)", "(reserved)", "MESSAGE OUT", "MESSAGE IN"
852c1017bfSMark Cave-Ayland };
862c1017bfSMark Cave-Ayland
esp_set_phase(ESPState * s,uint8_t phase)872c1017bfSMark Cave-Ayland static void esp_set_phase(ESPState *s, uint8_t phase)
882c1017bfSMark Cave-Ayland {
892c1017bfSMark Cave-Ayland s->rregs[ESP_RSTAT] &= ~7;
902c1017bfSMark Cave-Ayland s->rregs[ESP_RSTAT] |= phase;
912c1017bfSMark Cave-Ayland
922c1017bfSMark Cave-Ayland trace_esp_set_phase(esp_phase_names[phase]);
932c1017bfSMark Cave-Ayland }
942c1017bfSMark Cave-Ayland
esp_get_phase(ESPState * s)952c1017bfSMark Cave-Ayland static uint8_t esp_get_phase(ESPState *s)
962c1017bfSMark Cave-Ayland {
972c1017bfSMark Cave-Ayland return s->rregs[ESP_RSTAT] & 7;
982c1017bfSMark Cave-Ayland }
992c1017bfSMark Cave-Ayland
esp_dma_enable(ESPState * s,int irq,int level)1009c7e23fcSHervé Poussineau void esp_dma_enable(ESPState *s, int irq, int level)
10173d74342SBlue Swirl {
10273d74342SBlue Swirl if (level) {
10373d74342SBlue Swirl s->dma_enabled = 1;
104bf4b9889SBlue Swirl trace_esp_dma_enable();
10573d74342SBlue Swirl if (s->dma_cb) {
10673d74342SBlue Swirl s->dma_cb(s);
10773d74342SBlue Swirl s->dma_cb = NULL;
10873d74342SBlue Swirl }
10973d74342SBlue Swirl } else {
110bf4b9889SBlue Swirl trace_esp_dma_disable();
11173d74342SBlue Swirl s->dma_enabled = 0;
11273d74342SBlue Swirl }
11373d74342SBlue Swirl }
11473d74342SBlue Swirl
esp_request_cancelled(SCSIRequest * req)1159c7e23fcSHervé Poussineau void esp_request_cancelled(SCSIRequest *req)
11694d3f98aSPaolo Bonzini {
117e6810db8SHervé Poussineau ESPState *s = req->hba_private;
11894d3f98aSPaolo Bonzini
11994d3f98aSPaolo Bonzini if (req == s->current_req) {
12094d3f98aSPaolo Bonzini scsi_req_unref(s->current_req);
12194d3f98aSPaolo Bonzini s->current_req = NULL;
12294d3f98aSPaolo Bonzini s->current_dev = NULL;
123324c8809SMark Cave-Ayland s->async_len = 0;
12494d3f98aSPaolo Bonzini }
12594d3f98aSPaolo Bonzini }
12694d3f98aSPaolo Bonzini
esp_update_drq(ESPState * s)127743d8736SMark Cave-Ayland static void esp_update_drq(ESPState *s)
128743d8736SMark Cave-Ayland {
129743d8736SMark Cave-Ayland bool to_device;
130743d8736SMark Cave-Ayland
131743d8736SMark Cave-Ayland switch (esp_get_phase(s)) {
132743d8736SMark Cave-Ayland case STAT_MO:
133743d8736SMark Cave-Ayland case STAT_CD:
134743d8736SMark Cave-Ayland case STAT_DO:
135743d8736SMark Cave-Ayland to_device = true;
136743d8736SMark Cave-Ayland break;
137743d8736SMark Cave-Ayland
138743d8736SMark Cave-Ayland case STAT_DI:
139743d8736SMark Cave-Ayland case STAT_ST:
140743d8736SMark Cave-Ayland case STAT_MI:
141743d8736SMark Cave-Ayland to_device = false;
142743d8736SMark Cave-Ayland break;
143743d8736SMark Cave-Ayland
144743d8736SMark Cave-Ayland default:
145743d8736SMark Cave-Ayland return;
146743d8736SMark Cave-Ayland }
147743d8736SMark Cave-Ayland
148743d8736SMark Cave-Ayland if (s->dma) {
149743d8736SMark Cave-Ayland /* DMA request so update DRQ according to transfer direction */
150743d8736SMark Cave-Ayland if (to_device) {
151743d8736SMark Cave-Ayland if (fifo8_num_free(&s->fifo) < 2) {
152743d8736SMark Cave-Ayland esp_lower_drq(s);
153743d8736SMark Cave-Ayland } else {
154743d8736SMark Cave-Ayland esp_raise_drq(s);
155743d8736SMark Cave-Ayland }
156743d8736SMark Cave-Ayland } else {
157743d8736SMark Cave-Ayland if (fifo8_num_used(&s->fifo) < 2) {
158743d8736SMark Cave-Ayland esp_lower_drq(s);
159743d8736SMark Cave-Ayland } else {
160743d8736SMark Cave-Ayland esp_raise_drq(s);
161743d8736SMark Cave-Ayland }
162743d8736SMark Cave-Ayland }
163743d8736SMark Cave-Ayland } else {
164743d8736SMark Cave-Ayland /* Not a DMA request */
165743d8736SMark Cave-Ayland esp_lower_drq(s);
166743d8736SMark Cave-Ayland }
167743d8736SMark Cave-Ayland }
168743d8736SMark Cave-Ayland
esp_fifo_push(ESPState * s,uint8_t val)1690e7dbe29SMark Cave-Ayland static void esp_fifo_push(ESPState *s, uint8_t val)
170042879fcSMark Cave-Ayland {
1710e7dbe29SMark Cave-Ayland if (fifo8_num_used(&s->fifo) == s->fifo.capacity) {
172042879fcSMark Cave-Ayland trace_esp_error_fifo_overrun();
173ffa3a5f2SMark Cave-Ayland } else {
174ffa3a5f2SMark Cave-Ayland fifo8_push(&s->fifo, val);
175042879fcSMark Cave-Ayland }
176042879fcSMark Cave-Ayland
177ffa3a5f2SMark Cave-Ayland esp_update_drq(s);
178042879fcSMark Cave-Ayland }
179c5fef911SMark Cave-Ayland
esp_fifo_push_buf(ESPState * s,uint8_t * buf,int len)180266170f9SMark Cave-Ayland static void esp_fifo_push_buf(ESPState *s, uint8_t *buf, int len)
181266170f9SMark Cave-Ayland {
182266170f9SMark Cave-Ayland fifo8_push_all(&s->fifo, buf, len);
183743d8736SMark Cave-Ayland esp_update_drq(s);
184266170f9SMark Cave-Ayland }
185266170f9SMark Cave-Ayland
esp_fifo_pop(ESPState * s)18661fa150dSMark Cave-Ayland static uint8_t esp_fifo_pop(ESPState *s)
187042879fcSMark Cave-Ayland {
188ffa3a5f2SMark Cave-Ayland uint8_t val;
189ffa3a5f2SMark Cave-Ayland
19061fa150dSMark Cave-Ayland if (fifo8_is_empty(&s->fifo)) {
191ffa3a5f2SMark Cave-Ayland val = 0;
192ffa3a5f2SMark Cave-Ayland } else {
193ffa3a5f2SMark Cave-Ayland val = fifo8_pop(&s->fifo);
194042879fcSMark Cave-Ayland }
195042879fcSMark Cave-Ayland
196ffa3a5f2SMark Cave-Ayland esp_update_drq(s);
197ffa3a5f2SMark Cave-Ayland return val;
198023666daSMark Cave-Ayland }
199023666daSMark Cave-Ayland
esp_fifo_pop_buf(ESPState * s,uint8_t * dest,int maxlen)200da838126SMark Cave-Ayland static uint32_t esp_fifo_pop_buf(ESPState *s, uint8_t *dest, int maxlen)
201d103d0dbSMark Cave-Ayland {
20223ad5711SPhilippe Mathieu-Daudé uint32_t len = fifo8_pop_buf(&s->fifo, dest, maxlen);
203743d8736SMark Cave-Ayland
204743d8736SMark Cave-Ayland esp_update_drq(s);
205743d8736SMark Cave-Ayland return len;
206d103d0dbSMark Cave-Ayland }
207d103d0dbSMark Cave-Ayland
esp_get_tc(ESPState * s)208c47b5835SMark Cave-Ayland static uint32_t esp_get_tc(ESPState *s)
209c47b5835SMark Cave-Ayland {
210c47b5835SMark Cave-Ayland uint32_t dmalen;
211c47b5835SMark Cave-Ayland
212c47b5835SMark Cave-Ayland dmalen = s->rregs[ESP_TCLO];
213c47b5835SMark Cave-Ayland dmalen |= s->rregs[ESP_TCMID] << 8;
214c47b5835SMark Cave-Ayland dmalen |= s->rregs[ESP_TCHI] << 16;
215c47b5835SMark Cave-Ayland
216c47b5835SMark Cave-Ayland return dmalen;
217c47b5835SMark Cave-Ayland }
218c47b5835SMark Cave-Ayland
esp_set_tc(ESPState * s,uint32_t dmalen)219c47b5835SMark Cave-Ayland static void esp_set_tc(ESPState *s, uint32_t dmalen)
220c47b5835SMark Cave-Ayland {
221c5d7df28SMark Cave-Ayland uint32_t old_tc = esp_get_tc(s);
222c5d7df28SMark Cave-Ayland
223c47b5835SMark Cave-Ayland s->rregs[ESP_TCLO] = dmalen;
224c47b5835SMark Cave-Ayland s->rregs[ESP_TCMID] = dmalen >> 8;
225c47b5835SMark Cave-Ayland s->rregs[ESP_TCHI] = dmalen >> 16;
226c5d7df28SMark Cave-Ayland
227c5d7df28SMark Cave-Ayland if (old_tc && dmalen == 0) {
228c5d7df28SMark Cave-Ayland s->rregs[ESP_RSTAT] |= STAT_TC;
229c5d7df28SMark Cave-Ayland }
230c47b5835SMark Cave-Ayland }
231c47b5835SMark Cave-Ayland
esp_get_stc(ESPState * s)232c04ed569SMark Cave-Ayland static uint32_t esp_get_stc(ESPState *s)
233c04ed569SMark Cave-Ayland {
234c04ed569SMark Cave-Ayland uint32_t dmalen;
235c04ed569SMark Cave-Ayland
236c04ed569SMark Cave-Ayland dmalen = s->wregs[ESP_TCLO];
237c04ed569SMark Cave-Ayland dmalen |= s->wregs[ESP_TCMID] << 8;
238c04ed569SMark Cave-Ayland dmalen |= s->wregs[ESP_TCHI] << 16;
239c04ed569SMark Cave-Ayland
240c04ed569SMark Cave-Ayland return dmalen;
241c04ed569SMark Cave-Ayland }
242c04ed569SMark Cave-Ayland
esp_pdma_read(ESPState * s)243761bef75SMark Cave-Ayland static uint8_t esp_pdma_read(ESPState *s)
244761bef75SMark Cave-Ayland {
245720a0e41SMarkus Armbruster return esp_fifo_pop(s);
246761bef75SMark Cave-Ayland }
247761bef75SMark Cave-Ayland
esp_pdma_write(ESPState * s,uint8_t val)248761bef75SMark Cave-Ayland static void esp_pdma_write(ESPState *s, uint8_t val)
249761bef75SMark Cave-Ayland {
2508da90e81SMark Cave-Ayland uint32_t dmalen = esp_get_tc(s);
2518da90e81SMark Cave-Ayland
2520e7dbe29SMark Cave-Ayland esp_fifo_push(s, val);
2538da90e81SMark Cave-Ayland
25460c57250SMark Cave-Ayland if (dmalen && s->drq_state) {
2558da90e81SMark Cave-Ayland dmalen--;
2568da90e81SMark Cave-Ayland esp_set_tc(s, dmalen);
257761bef75SMark Cave-Ayland }
25860c57250SMark Cave-Ayland }
259761bef75SMark Cave-Ayland
esp_select(ESPState * s)260c7bce09cSMark Cave-Ayland static int esp_select(ESPState *s)
2616130b188SLaurent Vivier {
2626130b188SLaurent Vivier int target;
2636130b188SLaurent Vivier
2646130b188SLaurent Vivier target = s->wregs[ESP_WBUSID] & BUSID_DID;
2656130b188SLaurent Vivier
2666130b188SLaurent Vivier s->ti_size = 0;
2679b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_0;
2686130b188SLaurent Vivier
269cf40a5e4SMark Cave-Ayland if (s->current_req) {
270cf40a5e4SMark Cave-Ayland /* Started a new command before the old one finished. Cancel it. */
271cf40a5e4SMark Cave-Ayland scsi_req_cancel(s->current_req);
272cf40a5e4SMark Cave-Ayland }
273cf40a5e4SMark Cave-Ayland
2746130b188SLaurent Vivier s->current_dev = scsi_device_find(&s->bus, 0, target, 0);
2756130b188SLaurent Vivier if (!s->current_dev) {
2766130b188SLaurent Vivier /* No such drive */
2776130b188SLaurent Vivier s->rregs[ESP_RSTAT] = 0;
278cf1a7a9bSMark Cave-Ayland s->rregs[ESP_RINTR] = INTR_DC;
2796130b188SLaurent Vivier esp_raise_irq(s);
2806130b188SLaurent Vivier return -1;
2816130b188SLaurent Vivier }
2824e78f3bfSMark Cave-Ayland
2834e78f3bfSMark Cave-Ayland /*
2844e78f3bfSMark Cave-Ayland * Note that we deliberately don't raise the IRQ here: this will be done
285c90b2792SMark Cave-Ayland * either in esp_transfer_data() or esp_command_complete()
2864e78f3bfSMark Cave-Ayland */
2876130b188SLaurent Vivier return 0;
2886130b188SLaurent Vivier }
2896130b188SLaurent Vivier
2903ee9a475SMark Cave-Ayland static void esp_do_dma(ESPState *s);
2913ee9a475SMark Cave-Ayland static void esp_do_nodma(ESPState *s);
2923ee9a475SMark Cave-Ayland
do_command_phase(ESPState * s)2934eb86065SPaolo Bonzini static void do_command_phase(ESPState *s)
2949f149aa9Spbrook {
2957b320a8eSMark Cave-Ayland uint32_t cmdlen;
2969f149aa9Spbrook int32_t datalen;
297f48a7a6eSPaolo Bonzini SCSIDevice *current_lun;
2987b320a8eSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ];
2999f149aa9Spbrook
3004eb86065SPaolo Bonzini trace_esp_do_command_phase(s->lun);
301023666daSMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo);
30299545751SMark Cave-Ayland if (!cmdlen || !s->current_dev) {
30399545751SMark Cave-Ayland return;
30499545751SMark Cave-Ayland }
30523ad5711SPhilippe Mathieu-Daudé fifo8_pop_buf(&s->cmdfifo, buf, cmdlen);
306023666daSMark Cave-Ayland
3074eb86065SPaolo Bonzini current_lun = scsi_device_find(&s->bus, 0, s->current_dev->id, s->lun);
308b22f83d8SAlexandra Diupina if (!current_lun) {
309b22f83d8SAlexandra Diupina /* No such drive */
310b22f83d8SAlexandra Diupina s->rregs[ESP_RSTAT] = 0;
311b22f83d8SAlexandra Diupina s->rregs[ESP_RINTR] = INTR_DC;
312b22f83d8SAlexandra Diupina s->rregs[ESP_RSEQ] = SEQ_0;
313b22f83d8SAlexandra Diupina esp_raise_irq(s);
314b22f83d8SAlexandra Diupina return;
315b22f83d8SAlexandra Diupina }
316b22f83d8SAlexandra Diupina
317fe9d8927SJohn Millikin s->current_req = scsi_req_new(current_lun, 0, s->lun, buf, cmdlen, s);
318c39ce112SPaolo Bonzini datalen = scsi_req_enqueue(s->current_req);
31967e999beSbellard s->ti_size = datalen;
320023666daSMark Cave-Ayland fifo8_reset(&s->cmdfifo);
321c90b2792SMark Cave-Ayland s->data_ready = false;
32267e999beSbellard if (datalen != 0) {
3234e78f3bfSMark Cave-Ayland /*
324c90b2792SMark Cave-Ayland * Switch to DATA phase but wait until initial data xfer is
3254e78f3bfSMark Cave-Ayland * complete before raising the command completion interrupt
3264e78f3bfSMark Cave-Ayland */
327c90b2792SMark Cave-Ayland if (datalen > 0) {
328abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_DI);
3294f6200f0Sbellard } else {
330abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_DO);
3312f275b8fSbellard }
3324e78f3bfSMark Cave-Ayland scsi_req_continue(s->current_req);
3334e78f3bfSMark Cave-Ayland return;
3344e78f3bfSMark Cave-Ayland }
3354e78f3bfSMark Cave-Ayland }
3362f275b8fSbellard
do_message_phase(ESPState * s)3374eb86065SPaolo Bonzini static void do_message_phase(ESPState *s)
338f2818f22SArtyom Tarasenko {
3394eb86065SPaolo Bonzini if (s->cmdfifo_cdb_offset) {
3401828000bSMark Cave-Ayland uint8_t message = fifo8_is_empty(&s->cmdfifo) ? 0 :
3411828000bSMark Cave-Ayland fifo8_pop(&s->cmdfifo);
342023666daSMark Cave-Ayland
3434eb86065SPaolo Bonzini trace_esp_do_identify(message);
3444eb86065SPaolo Bonzini s->lun = message & 7;
345023666daSMark Cave-Ayland s->cmdfifo_cdb_offset--;
3464eb86065SPaolo Bonzini }
347f2818f22SArtyom Tarasenko
348799d90d8SMark Cave-Ayland /* Ignore extended messages for now */
349023666daSMark Cave-Ayland if (s->cmdfifo_cdb_offset) {
3504eb86065SPaolo Bonzini int len = MIN(s->cmdfifo_cdb_offset, fifo8_num_used(&s->cmdfifo));
351e4e9db25SPhilippe Mathieu-Daudé fifo8_drop(&s->cmdfifo, len);
352023666daSMark Cave-Ayland s->cmdfifo_cdb_offset = 0;
353023666daSMark Cave-Ayland }
3544eb86065SPaolo Bonzini }
355023666daSMark Cave-Ayland
do_cmd(ESPState * s)3564eb86065SPaolo Bonzini static void do_cmd(ESPState *s)
3574eb86065SPaolo Bonzini {
3584eb86065SPaolo Bonzini do_message_phase(s);
3594eb86065SPaolo Bonzini assert(s->cmdfifo_cdb_offset == 0);
3604eb86065SPaolo Bonzini do_command_phase(s);
361f2818f22SArtyom Tarasenko }
362f2818f22SArtyom Tarasenko
handle_satn(ESPState * s)3639f149aa9Spbrook static void handle_satn(ESPState *s)
3649f149aa9Spbrook {
3651b26eaa1SHervé Poussineau if (s->dma && !s->dma_enabled) {
36673d74342SBlue Swirl s->dma_cb = handle_satn;
36773d74342SBlue Swirl return;
36873d74342SBlue Swirl }
369b46a43a2SMark Cave-Ayland
3701bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) {
3711bcaf71bSMark Cave-Ayland return;
3721bcaf71bSMark Cave-Ayland }
3733ee9a475SMark Cave-Ayland
3743ee9a475SMark Cave-Ayland esp_set_phase(s, STAT_MO);
3753ee9a475SMark Cave-Ayland
3763ee9a475SMark Cave-Ayland if (s->dma) {
3773ee9a475SMark Cave-Ayland esp_do_dma(s);
3783ee9a475SMark Cave-Ayland } else {
379d39592ffSMark Cave-Ayland esp_do_nodma(s);
3809f149aa9Spbrook }
38194d5c79dSMark Cave-Ayland }
3829f149aa9Spbrook
handle_s_without_atn(ESPState * s)383f2818f22SArtyom Tarasenko static void handle_s_without_atn(ESPState *s)
384f2818f22SArtyom Tarasenko {
3851b26eaa1SHervé Poussineau if (s->dma && !s->dma_enabled) {
38673d74342SBlue Swirl s->dma_cb = handle_s_without_atn;
38773d74342SBlue Swirl return;
38873d74342SBlue Swirl }
389b46a43a2SMark Cave-Ayland
3901bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) {
3911bcaf71bSMark Cave-Ayland return;
3921bcaf71bSMark Cave-Ayland }
3939ff0fd12SMark Cave-Ayland
394abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_CD);
3959ff0fd12SMark Cave-Ayland s->cmdfifo_cdb_offset = 0;
3969ff0fd12SMark Cave-Ayland
3979ff0fd12SMark Cave-Ayland if (s->dma) {
3989ff0fd12SMark Cave-Ayland esp_do_dma(s);
3999ff0fd12SMark Cave-Ayland } else {
400d39592ffSMark Cave-Ayland esp_do_nodma(s);
401f2818f22SArtyom Tarasenko }
402f2818f22SArtyom Tarasenko }
403f2818f22SArtyom Tarasenko
handle_satn_stop(ESPState * s)4049f149aa9Spbrook static void handle_satn_stop(ESPState *s)
4059f149aa9Spbrook {
4061b26eaa1SHervé Poussineau if (s->dma && !s->dma_enabled) {
40773d74342SBlue Swirl s->dma_cb = handle_satn_stop;
40873d74342SBlue Swirl return;
40973d74342SBlue Swirl }
410b46a43a2SMark Cave-Ayland
4111bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) {
4121bcaf71bSMark Cave-Ayland return;
4131bcaf71bSMark Cave-Ayland }
414db4d4150SMark Cave-Ayland
415abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_MO);
4165d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 0;
417db4d4150SMark Cave-Ayland
418db4d4150SMark Cave-Ayland if (s->dma) {
419db4d4150SMark Cave-Ayland esp_do_dma(s);
420db4d4150SMark Cave-Ayland } else {
421d39592ffSMark Cave-Ayland esp_do_nodma(s);
4229f149aa9Spbrook }
4239f149aa9Spbrook }
4249f149aa9Spbrook
handle_pad(ESPState * s)425a6cad7cdSMark Cave-Ayland static void handle_pad(ESPState *s)
426a6cad7cdSMark Cave-Ayland {
427a6cad7cdSMark Cave-Ayland if (s->dma) {
428a6cad7cdSMark Cave-Ayland esp_do_dma(s);
429a6cad7cdSMark Cave-Ayland } else {
430a6cad7cdSMark Cave-Ayland esp_do_nodma(s);
431a6cad7cdSMark Cave-Ayland }
432a6cad7cdSMark Cave-Ayland }
433a6cad7cdSMark Cave-Ayland
write_response(ESPState * s)4340fc5c15aSpbrook static void write_response(ESPState *s)
4352f275b8fSbellard {
436bf4b9889SBlue Swirl trace_esp_write_response(s->status);
437042879fcSMark Cave-Ayland
4388baa1472SMark Cave-Ayland if (s->dma) {
4398baa1472SMark Cave-Ayland esp_do_dma(s);
4408baa1472SMark Cave-Ayland } else {
44183428f7aSMark Cave-Ayland esp_do_nodma(s);
4422f275b8fSbellard }
4438baa1472SMark Cave-Ayland }
4444f6200f0Sbellard
esp_cdb_ready(ESPState * s)4455aa0df40SMark Cave-Ayland static bool esp_cdb_ready(ESPState *s)
4465d02add4SMark Cave-Ayland {
4475aa0df40SMark Cave-Ayland int len = fifo8_num_used(&s->cmdfifo) - s->cmdfifo_cdb_offset;
4485d02add4SMark Cave-Ayland const uint8_t *pbuf;
4493cc70889SMark Cave-Ayland uint32_t n;
4505aa0df40SMark Cave-Ayland int cdblen;
4515d02add4SMark Cave-Ayland
4525aa0df40SMark Cave-Ayland if (len <= 0) {
4535aa0df40SMark Cave-Ayland return false;
4545d02add4SMark Cave-Ayland }
4555d02add4SMark Cave-Ayland
45606a16e7bSPhilippe Mathieu-Daudé pbuf = fifo8_peek_bufptr(&s->cmdfifo, len, &n);
4573cc70889SMark Cave-Ayland if (n < len) {
4583cc70889SMark Cave-Ayland /*
4593cc70889SMark Cave-Ayland * In normal use the cmdfifo should never wrap, but include this check
4603cc70889SMark Cave-Ayland * to prevent a malicious guest from reading past the end of the
4613cc70889SMark Cave-Ayland * cmdfifo data buffer below
4623cc70889SMark Cave-Ayland */
4633cc70889SMark Cave-Ayland return false;
4643cc70889SMark Cave-Ayland }
4653cc70889SMark Cave-Ayland
4665aa0df40SMark Cave-Ayland cdblen = scsi_cdb_length((uint8_t *)&pbuf[s->cmdfifo_cdb_offset]);
4675d02add4SMark Cave-Ayland
4685aa0df40SMark Cave-Ayland return cdblen < 0 ? false : (len >= cdblen);
4695d02add4SMark Cave-Ayland }
4705d02add4SMark Cave-Ayland
esp_dma_ti_check(ESPState * s)471004826d0SMark Cave-Ayland static void esp_dma_ti_check(ESPState *s)
4724d611c9aSpbrook {
473af74b3c1SMark Cave-Ayland if (esp_get_tc(s) == 0 && fifo8_num_used(&s->fifo) < 2) {
474cf47a41eSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
475c73f96fdSblueswir1 esp_raise_irq(s);
476af74b3c1SMark Cave-Ayland }
4774d611c9aSpbrook }
478a917d384Spbrook
esp_do_dma(ESPState * s)479a917d384Spbrook static void esp_do_dma(ESPState *s)
480a917d384Spbrook {
481023666daSMark Cave-Ayland uint32_t len, cmdlen;
482023666daSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ];
483a917d384Spbrook
4846cc88d6bSMark Cave-Ayland len = esp_get_tc(s);
485ad2725afSMark Cave-Ayland
486ad2725afSMark Cave-Ayland switch (esp_get_phase(s)) {
487ad2725afSMark Cave-Ayland case STAT_MO:
48846b0c361SMark Cave-Ayland if (s->dma_memory_read) {
48946b0c361SMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->cmdfifo));
49046b0c361SMark Cave-Ayland s->dma_memory_read(s->dma_opaque, buf, len);
49146b0c361SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len);
49246b0c361SMark Cave-Ayland } else {
493da838126SMark Cave-Ayland len = esp_fifo_pop_buf(s, buf, fifo8_num_used(&s->fifo));
49467ea170eSMark Cave-Ayland len = MIN(fifo8_num_free(&s->cmdfifo), len);
49546b0c361SMark Cave-Ayland }
49646b0c361SMark Cave-Ayland
49767ea170eSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
49867ea170eSMark Cave-Ayland s->cmdfifo_cdb_offset += len;
49946b0c361SMark Cave-Ayland
5003ee9a475SMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
5013ee9a475SMark Cave-Ayland case CMD_SELATN | CMD_DMA:
5023ee9a475SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) {
5033ee9a475SMark Cave-Ayland /* First byte received, switch to command phase */
5043ee9a475SMark Cave-Ayland esp_set_phase(s, STAT_CD);
5059b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD;
5063ee9a475SMark Cave-Ayland s->cmdfifo_cdb_offset = 1;
5073ee9a475SMark Cave-Ayland
5083ee9a475SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) > 1) {
5093ee9a475SMark Cave-Ayland /* Process any additional command phase data */
5103ee9a475SMark Cave-Ayland esp_do_dma(s);
5113ee9a475SMark Cave-Ayland }
5123ee9a475SMark Cave-Ayland }
5133ee9a475SMark Cave-Ayland break;
5143ee9a475SMark Cave-Ayland
515db4d4150SMark Cave-Ayland case CMD_SELATNS | CMD_DMA:
516db4d4150SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) == 1) {
517db4d4150SMark Cave-Ayland /* First byte received, stop in message out phase */
5189b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO;
519db4d4150SMark Cave-Ayland s->cmdfifo_cdb_offset = 1;
520db4d4150SMark Cave-Ayland
521db4d4150SMark Cave-Ayland /* Raise command completion interrupt */
522db4d4150SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
523db4d4150SMark Cave-Ayland esp_raise_irq(s);
524db4d4150SMark Cave-Ayland }
525db4d4150SMark Cave-Ayland break;
526db4d4150SMark Cave-Ayland
5273fd325a2SMark Cave-Ayland case CMD_TI | CMD_DMA:
52846b0c361SMark Cave-Ayland /* ATN remains asserted until TC == 0 */
52946b0c361SMark Cave-Ayland if (esp_get_tc(s) == 0) {
53046b0c361SMark Cave-Ayland esp_set_phase(s, STAT_CD);
531cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0;
53246b0c361SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
53346b0c361SMark Cave-Ayland esp_raise_irq(s);
53446b0c361SMark Cave-Ayland }
53546b0c361SMark Cave-Ayland break;
5363fd325a2SMark Cave-Ayland }
5373fd325a2SMark Cave-Ayland break;
53846b0c361SMark Cave-Ayland
539ad2725afSMark Cave-Ayland case STAT_CD:
540023666daSMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo);
541023666daSMark Cave-Ayland trace_esp_do_dma(cmdlen, len);
54274d71ea1SLaurent Vivier if (s->dma_memory_read) {
5430ebb5fd8SMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->cmdfifo));
544023666daSMark Cave-Ayland s->dma_memory_read(s->dma_opaque, buf, len);
545023666daSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
546a0347651SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len);
54774d71ea1SLaurent Vivier } else {
548da838126SMark Cave-Ayland len = esp_fifo_pop_buf(s, buf, fifo8_num_used(&s->fifo));
549406e8a3eSMark Cave-Ayland len = MIN(fifo8_num_free(&s->cmdfifo), len);
550406e8a3eSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
5513c7f3c8bSMark Cave-Ayland }
552023666daSMark Cave-Ayland trace_esp_handle_ti_cmd(cmdlen);
55315407433SLaurent Vivier s->ti_size = 0;
55446b0c361SMark Cave-Ayland if (esp_get_tc(s) == 0) {
555799d90d8SMark Cave-Ayland /* Command has been received */
556c959f218SMark Cave-Ayland do_cmd(s);
557799d90d8SMark Cave-Ayland }
558ad2725afSMark Cave-Ayland break;
5591454dc76SMark Cave-Ayland
5601454dc76SMark Cave-Ayland case STAT_DO:
5610db89536SMark Cave-Ayland if (!s->current_req) {
5620db89536SMark Cave-Ayland return;
5630db89536SMark Cave-Ayland }
564dfaf55a1SMark Cave-Ayland if (s->async_len == 0 && esp_get_tc(s)) {
565a917d384Spbrook /* Defer until data is available. */
566a917d384Spbrook return;
567a917d384Spbrook }
568a917d384Spbrook if (len > s->async_len) {
569a917d384Spbrook len = s->async_len;
570a917d384Spbrook }
5710d17ce82SMark Cave-Ayland
572a6cad7cdSMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
573a6cad7cdSMark Cave-Ayland case CMD_TI | CMD_DMA:
57474d71ea1SLaurent Vivier if (s->dma_memory_read) {
5758b17de88Sblueswir1 s->dma_memory_read(s->dma_opaque, s->async_buf, len);
576f3666223SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len);
5770d17ce82SMark Cave-Ayland } else {
5780d17ce82SMark Cave-Ayland /* Copy FIFO data to device */
5790d17ce82SMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ);
5800d17ce82SMark Cave-Ayland len = MIN(len, fifo8_num_used(&s->fifo));
581da838126SMark Cave-Ayland len = esp_fifo_pop_buf(s, s->async_buf, len);
5820d17ce82SMark Cave-Ayland }
5830d17ce82SMark Cave-Ayland
584f3666223SMark Cave-Ayland s->async_buf += len;
585f3666223SMark Cave-Ayland s->async_len -= len;
586f3666223SMark Cave-Ayland s->ti_size += len;
587a6cad7cdSMark Cave-Ayland break;
588a6cad7cdSMark Cave-Ayland
589a6cad7cdSMark Cave-Ayland case CMD_PAD | CMD_DMA:
590a6cad7cdSMark Cave-Ayland /* Copy TC zero bytes into the incoming stream */
591a6cad7cdSMark Cave-Ayland if (!s->dma_memory_read) {
592a6cad7cdSMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ);
593a6cad7cdSMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->fifo));
594a6cad7cdSMark Cave-Ayland }
595a6cad7cdSMark Cave-Ayland
596a6cad7cdSMark Cave-Ayland memset(s->async_buf, 0, len);
597a6cad7cdSMark Cave-Ayland
598a6cad7cdSMark Cave-Ayland s->async_buf += len;
599a6cad7cdSMark Cave-Ayland s->async_len -= len;
600a6cad7cdSMark Cave-Ayland s->ti_size += len;
601a6cad7cdSMark Cave-Ayland break;
602a6cad7cdSMark Cave-Ayland }
603f3666223SMark Cave-Ayland
604e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) {
605e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */
606f3666223SMark Cave-Ayland scsi_req_continue(s->current_req);
607f3666223SMark Cave-Ayland return;
608f3666223SMark Cave-Ayland }
609f3666223SMark Cave-Ayland
610004826d0SMark Cave-Ayland esp_dma_ti_check(s);
6111454dc76SMark Cave-Ayland break;
6121454dc76SMark Cave-Ayland
6131454dc76SMark Cave-Ayland case STAT_DI:
6141454dc76SMark Cave-Ayland if (!s->current_req) {
6151454dc76SMark Cave-Ayland return;
6161454dc76SMark Cave-Ayland }
617dfaf55a1SMark Cave-Ayland if (s->async_len == 0 && esp_get_tc(s)) {
6181454dc76SMark Cave-Ayland /* Defer until data is available. */
6191454dc76SMark Cave-Ayland return;
6201454dc76SMark Cave-Ayland }
6211454dc76SMark Cave-Ayland if (len > s->async_len) {
6221454dc76SMark Cave-Ayland len = s->async_len;
6231454dc76SMark Cave-Ayland }
624c37cc88eSMark Cave-Ayland
625a6cad7cdSMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
626a6cad7cdSMark Cave-Ayland case CMD_TI | CMD_DMA:
62774d71ea1SLaurent Vivier if (s->dma_memory_write) {
6288b17de88Sblueswir1 s->dma_memory_write(s->dma_opaque, s->async_buf, len);
62974d71ea1SLaurent Vivier } else {
63082141c8bSMark Cave-Ayland /* Copy device data to FIFO */
631042879fcSMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->fifo));
632266170f9SMark Cave-Ayland esp_fifo_push_buf(s, s->async_buf, len);
633c37cc88eSMark Cave-Ayland }
634c37cc88eSMark Cave-Ayland
63582141c8bSMark Cave-Ayland s->async_buf += len;
63682141c8bSMark Cave-Ayland s->async_len -= len;
63782141c8bSMark Cave-Ayland s->ti_size -= len;
63882141c8bSMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len);
639a6cad7cdSMark Cave-Ayland break;
640a6cad7cdSMark Cave-Ayland
641a6cad7cdSMark Cave-Ayland case CMD_PAD | CMD_DMA:
642a6cad7cdSMark Cave-Ayland /* Drop TC bytes from the incoming stream */
643a6cad7cdSMark Cave-Ayland if (!s->dma_memory_write) {
644a6cad7cdSMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->fifo));
645a6cad7cdSMark Cave-Ayland }
646a6cad7cdSMark Cave-Ayland
647a6cad7cdSMark Cave-Ayland s->async_buf += len;
648a6cad7cdSMark Cave-Ayland s->async_len -= len;
649a6cad7cdSMark Cave-Ayland s->ti_size -= len;
650a6cad7cdSMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len);
651a6cad7cdSMark Cave-Ayland break;
652a6cad7cdSMark Cave-Ayland }
653e4e166c8SMark Cave-Ayland
65402a3ce56SMark Cave-Ayland if (s->async_len == 0 && s->ti_size == 0 && esp_get_tc(s)) {
65502a3ce56SMark Cave-Ayland /* If the guest underflows TC then terminate SCSI request */
65602a3ce56SMark Cave-Ayland scsi_req_continue(s->current_req);
65702a3ce56SMark Cave-Ayland return;
65802a3ce56SMark Cave-Ayland }
65902a3ce56SMark Cave-Ayland
660e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) {
661e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */
662e4e166c8SMark Cave-Ayland scsi_req_continue(s->current_req);
663e4e166c8SMark Cave-Ayland return;
664e4e166c8SMark Cave-Ayland }
665e4e166c8SMark Cave-Ayland
666004826d0SMark Cave-Ayland esp_dma_ti_check(s);
6671454dc76SMark Cave-Ayland break;
6688baa1472SMark Cave-Ayland
6698baa1472SMark Cave-Ayland case STAT_ST:
6708baa1472SMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
6718baa1472SMark Cave-Ayland case CMD_ICCS | CMD_DMA:
6728baa1472SMark Cave-Ayland len = MIN(len, 1);
6738baa1472SMark Cave-Ayland
6748baa1472SMark Cave-Ayland if (len) {
6758baa1472SMark Cave-Ayland buf[0] = s->status;
6768baa1472SMark Cave-Ayland
6778baa1472SMark Cave-Ayland if (s->dma_memory_write) {
6788baa1472SMark Cave-Ayland s->dma_memory_write(s->dma_opaque, buf, len);
6798baa1472SMark Cave-Ayland } else {
680266170f9SMark Cave-Ayland esp_fifo_push_buf(s, buf, len);
6818baa1472SMark Cave-Ayland }
6828baa1472SMark Cave-Ayland
683421d1ca5SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len);
6848baa1472SMark Cave-Ayland esp_set_phase(s, STAT_MI);
6858baa1472SMark Cave-Ayland
6868baa1472SMark Cave-Ayland if (esp_get_tc(s) > 0) {
6878baa1472SMark Cave-Ayland /* Process any message in phase data */
6888baa1472SMark Cave-Ayland esp_do_dma(s);
6898baa1472SMark Cave-Ayland }
6908baa1472SMark Cave-Ayland }
6918baa1472SMark Cave-Ayland break;
69202a3ce56SMark Cave-Ayland
69302a3ce56SMark Cave-Ayland default:
69402a3ce56SMark Cave-Ayland /* Consume remaining data if the guest underflows TC */
69502a3ce56SMark Cave-Ayland if (fifo8_num_used(&s->fifo) < 2) {
69602a3ce56SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
69702a3ce56SMark Cave-Ayland esp_raise_irq(s);
69802a3ce56SMark Cave-Ayland }
69902a3ce56SMark Cave-Ayland break;
7008baa1472SMark Cave-Ayland }
7018baa1472SMark Cave-Ayland break;
7028baa1472SMark Cave-Ayland
7038baa1472SMark Cave-Ayland case STAT_MI:
7048baa1472SMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
7058baa1472SMark Cave-Ayland case CMD_ICCS | CMD_DMA:
7068baa1472SMark Cave-Ayland len = MIN(len, 1);
7078baa1472SMark Cave-Ayland
7088baa1472SMark Cave-Ayland if (len) {
7098baa1472SMark Cave-Ayland buf[0] = 0;
7108baa1472SMark Cave-Ayland
7118baa1472SMark Cave-Ayland if (s->dma_memory_write) {
7128baa1472SMark Cave-Ayland s->dma_memory_write(s->dma_opaque, buf, len);
7138baa1472SMark Cave-Ayland } else {
714266170f9SMark Cave-Ayland esp_fifo_push_buf(s, buf, len);
7158baa1472SMark Cave-Ayland }
7168baa1472SMark Cave-Ayland
717421d1ca5SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len);
718421d1ca5SMark Cave-Ayland
7198baa1472SMark Cave-Ayland /* Raise end of command interrupt */
7200ee71db4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC;
7218baa1472SMark Cave-Ayland esp_raise_irq(s);
7228baa1472SMark Cave-Ayland }
7238baa1472SMark Cave-Ayland break;
7248baa1472SMark Cave-Ayland }
7258baa1472SMark Cave-Ayland break;
72674d71ea1SLaurent Vivier }
727a917d384Spbrook }
728a917d384Spbrook
esp_nodma_ti_dataout(ESPState * s)729a1b8d389SMark Cave-Ayland static void esp_nodma_ti_dataout(ESPState *s)
730a1b8d389SMark Cave-Ayland {
731a1b8d389SMark Cave-Ayland int len;
732a1b8d389SMark Cave-Ayland
733a1b8d389SMark Cave-Ayland if (!s->current_req) {
734a1b8d389SMark Cave-Ayland return;
735a1b8d389SMark Cave-Ayland }
736a1b8d389SMark Cave-Ayland if (s->async_len == 0) {
737a1b8d389SMark Cave-Ayland /* Defer until data is available. */
738a1b8d389SMark Cave-Ayland return;
739a1b8d389SMark Cave-Ayland }
740a1b8d389SMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ);
741a1b8d389SMark Cave-Ayland len = MIN(len, fifo8_num_used(&s->fifo));
742da838126SMark Cave-Ayland esp_fifo_pop_buf(s, s->async_buf, len);
743a1b8d389SMark Cave-Ayland s->async_buf += len;
744a1b8d389SMark Cave-Ayland s->async_len -= len;
745a1b8d389SMark Cave-Ayland s->ti_size += len;
746a1b8d389SMark Cave-Ayland
747a1b8d389SMark Cave-Ayland if (s->async_len == 0) {
748a1b8d389SMark Cave-Ayland scsi_req_continue(s->current_req);
749a1b8d389SMark Cave-Ayland return;
750a1b8d389SMark Cave-Ayland }
751a1b8d389SMark Cave-Ayland
752a1b8d389SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
753a1b8d389SMark Cave-Ayland esp_raise_irq(s);
754a1b8d389SMark Cave-Ayland }
755a1b8d389SMark Cave-Ayland
esp_do_nodma(ESPState * s)7561b9e48a5SMark Cave-Ayland static void esp_do_nodma(ESPState *s)
7571b9e48a5SMark Cave-Ayland {
7582572689bSMark Cave-Ayland uint8_t buf[ESP_FIFO_SZ];
7597b320a8eSMark Cave-Ayland uint32_t cmdlen;
7605a857339SMark Cave-Ayland int len;
7611b9e48a5SMark Cave-Ayland
76283e803deSMark Cave-Ayland switch (esp_get_phase(s)) {
76383e803deSMark Cave-Ayland case STAT_MO:
764215d2579SMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
765215d2579SMark Cave-Ayland case CMD_SELATN:
7662572689bSMark Cave-Ayland /* Copy FIFO into cmdfifo */
767da838126SMark Cave-Ayland len = esp_fifo_pop_buf(s, buf, fifo8_num_used(&s->fifo));
7685a857339SMark Cave-Ayland len = MIN(fifo8_num_free(&s->cmdfifo), len);
7695a857339SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
7702572689bSMark Cave-Ayland
7715d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) {
7725d02add4SMark Cave-Ayland /* First byte received, switch to command phase */
7735d02add4SMark Cave-Ayland esp_set_phase(s, STAT_CD);
7749b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD;
7755d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 1;
7765d02add4SMark Cave-Ayland
7775d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) > 1) {
7785d02add4SMark Cave-Ayland /* Process any additional command phase data */
7795d02add4SMark Cave-Ayland esp_do_nodma(s);
7805d02add4SMark Cave-Ayland }
7815d02add4SMark Cave-Ayland }
7825d02add4SMark Cave-Ayland break;
7835d02add4SMark Cave-Ayland
7845d02add4SMark Cave-Ayland case CMD_SELATNS:
785215d2579SMark Cave-Ayland /* Copy one byte from FIFO into cmdfifo */
7865a50644eSMark Cave-Ayland len = esp_fifo_pop_buf(s, buf,
7875a50644eSMark Cave-Ayland MIN(fifo8_num_used(&s->fifo), 1));
7885a857339SMark Cave-Ayland len = MIN(fifo8_num_free(&s->cmdfifo), len);
7895a857339SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
790215d2579SMark Cave-Ayland
791d39592ffSMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) {
7925d02add4SMark Cave-Ayland /* First byte received, stop in message out phase */
7939b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO;
7945d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 1;
7955d02add4SMark Cave-Ayland
7965d02add4SMark Cave-Ayland /* Raise command completion interrupt */
7975d02add4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
7985d02add4SMark Cave-Ayland esp_raise_irq(s);
7995d02add4SMark Cave-Ayland }
8005d02add4SMark Cave-Ayland break;
8015d02add4SMark Cave-Ayland
8025d02add4SMark Cave-Ayland case CMD_TI:
803215d2579SMark Cave-Ayland /* Copy FIFO into cmdfifo */
804da838126SMark Cave-Ayland len = esp_fifo_pop_buf(s, buf, fifo8_num_used(&s->fifo));
8055a857339SMark Cave-Ayland len = MIN(fifo8_num_free(&s->cmdfifo), len);
8065a857339SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
807215d2579SMark Cave-Ayland
8085d02add4SMark Cave-Ayland /* ATN remains asserted until FIFO empty */
8091b9e48a5SMark Cave-Ayland s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo);
810abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_CD);
811cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0;
8121b9e48a5SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
8131b9e48a5SMark Cave-Ayland esp_raise_irq(s);
81479a6c7c6SMark Cave-Ayland break;
8155d02add4SMark Cave-Ayland }
8165d02add4SMark Cave-Ayland break;
81779a6c7c6SMark Cave-Ayland
81879a6c7c6SMark Cave-Ayland case STAT_CD:
819acdee66dSMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
820acdee66dSMark Cave-Ayland case CMD_TI:
82179a6c7c6SMark Cave-Ayland /* Copy FIFO into cmdfifo */
822da838126SMark Cave-Ayland len = esp_fifo_pop_buf(s, buf, fifo8_num_used(&s->fifo));
8235a857339SMark Cave-Ayland len = MIN(fifo8_num_free(&s->cmdfifo), len);
8245a857339SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
82579a6c7c6SMark Cave-Ayland
82679a6c7c6SMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo);
82779a6c7c6SMark Cave-Ayland trace_esp_handle_ti_cmd(cmdlen);
82879a6c7c6SMark Cave-Ayland
8295d02add4SMark Cave-Ayland /* CDB may be transferred in one or more TI commands */
8305aa0df40SMark Cave-Ayland if (esp_cdb_ready(s)) {
83179a6c7c6SMark Cave-Ayland /* Command has been received */
83279a6c7c6SMark Cave-Ayland do_cmd(s);
8335d02add4SMark Cave-Ayland } else {
8345d02add4SMark Cave-Ayland /*
8355d02add4SMark Cave-Ayland * If data was transferred from the FIFO then raise bus
8365d02add4SMark Cave-Ayland * service interrupt to indicate transfer complete. Otherwise
8375d02add4SMark Cave-Ayland * defer until the next FIFO write.
8385d02add4SMark Cave-Ayland */
8395a857339SMark Cave-Ayland if (len) {
8405d02add4SMark Cave-Ayland /* Raise interrupt to indicate transfer complete */
8415d02add4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
8425d02add4SMark Cave-Ayland esp_raise_irq(s);
8435d02add4SMark Cave-Ayland }
8445d02add4SMark Cave-Ayland }
8455d02add4SMark Cave-Ayland break;
8465d02add4SMark Cave-Ayland
8478ba32048SMark Cave-Ayland case CMD_SEL | CMD_DMA:
8488ba32048SMark Cave-Ayland case CMD_SELATN | CMD_DMA:
849acdee66dSMark Cave-Ayland /* Copy FIFO into cmdfifo */
850da838126SMark Cave-Ayland len = esp_fifo_pop_buf(s, buf, fifo8_num_used(&s->fifo));
8515a857339SMark Cave-Ayland len = MIN(fifo8_num_free(&s->cmdfifo), len);
8525a857339SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
853acdee66dSMark Cave-Ayland
8548ba32048SMark Cave-Ayland /* Handle when DMA transfer is terminated by non-DMA FIFO write */
8555aa0df40SMark Cave-Ayland if (esp_cdb_ready(s)) {
8568ba32048SMark Cave-Ayland /* Command has been received */
8578ba32048SMark Cave-Ayland do_cmd(s);
8588ba32048SMark Cave-Ayland }
8598ba32048SMark Cave-Ayland break;
8608ba32048SMark Cave-Ayland
8615d02add4SMark Cave-Ayland case CMD_SEL:
8625d02add4SMark Cave-Ayland case CMD_SELATN:
863acdee66dSMark Cave-Ayland /* FIFO already contain entire CDB: copy to cmdfifo and execute */
864da838126SMark Cave-Ayland len = esp_fifo_pop_buf(s, buf, fifo8_num_used(&s->fifo));
8655a857339SMark Cave-Ayland len = MIN(fifo8_num_free(&s->cmdfifo), len);
8665a857339SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len);
867acdee66dSMark Cave-Ayland
8685d02add4SMark Cave-Ayland do_cmd(s);
8695d02add4SMark Cave-Ayland break;
8705d02add4SMark Cave-Ayland }
87183e803deSMark Cave-Ayland break;
8721b9e48a5SMark Cave-Ayland
8739d1aa52bSMark Cave-Ayland case STAT_DO:
8745d02add4SMark Cave-Ayland /* Accumulate data in FIFO until non-DMA TI is executed */
8759d1aa52bSMark Cave-Ayland break;
8769d1aa52bSMark Cave-Ayland
8779d1aa52bSMark Cave-Ayland case STAT_DI:
8789d1aa52bSMark Cave-Ayland if (!s->current_req) {
8799d1aa52bSMark Cave-Ayland return;
8809d1aa52bSMark Cave-Ayland }
8819d1aa52bSMark Cave-Ayland if (s->async_len == 0) {
8829d1aa52bSMark Cave-Ayland /* Defer until data is available. */
8839d1aa52bSMark Cave-Ayland return;
8849d1aa52bSMark Cave-Ayland }
8856ef2cabcSMark Cave-Ayland if (fifo8_is_empty(&s->fifo)) {
8861f46d1c3SMark Cave-Ayland esp_fifo_push(s, s->async_buf[0]);
8876ef2cabcSMark Cave-Ayland s->async_buf++;
8886ef2cabcSMark Cave-Ayland s->async_len--;
8896ef2cabcSMark Cave-Ayland s->ti_size--;
8906ef2cabcSMark Cave-Ayland }
8911b9e48a5SMark Cave-Ayland
8921b9e48a5SMark Cave-Ayland if (s->async_len == 0) {
8931b9e48a5SMark Cave-Ayland scsi_req_continue(s->current_req);
8941b9e48a5SMark Cave-Ayland return;
8951b9e48a5SMark Cave-Ayland }
8961b9e48a5SMark Cave-Ayland
8979655f72cSMark Cave-Ayland /* If preloading the FIFO, defer until TI command issued */
8989655f72cSMark Cave-Ayland if (s->rregs[ESP_CMD] != CMD_TI) {
8999655f72cSMark Cave-Ayland return;
9009655f72cSMark Cave-Ayland }
9019655f72cSMark Cave-Ayland
9021b9e48a5SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
9031b9e48a5SMark Cave-Ayland esp_raise_irq(s);
9049d1aa52bSMark Cave-Ayland break;
90583428f7aSMark Cave-Ayland
90683428f7aSMark Cave-Ayland case STAT_ST:
90783428f7aSMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
90883428f7aSMark Cave-Ayland case CMD_ICCS:
9091f46d1c3SMark Cave-Ayland esp_fifo_push(s, s->status);
91083428f7aSMark Cave-Ayland esp_set_phase(s, STAT_MI);
91183428f7aSMark Cave-Ayland
91283428f7aSMark Cave-Ayland /* Process any message in phase data */
91383428f7aSMark Cave-Ayland esp_do_nodma(s);
91483428f7aSMark Cave-Ayland break;
91583428f7aSMark Cave-Ayland }
91683428f7aSMark Cave-Ayland break;
91783428f7aSMark Cave-Ayland
91883428f7aSMark Cave-Ayland case STAT_MI:
91983428f7aSMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
92083428f7aSMark Cave-Ayland case CMD_ICCS:
9211f46d1c3SMark Cave-Ayland esp_fifo_push(s, 0);
92283428f7aSMark Cave-Ayland
9230ee71db4SMark Cave-Ayland /* Raise end of command interrupt */
9240ee71db4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC;
92583428f7aSMark Cave-Ayland esp_raise_irq(s);
92683428f7aSMark Cave-Ayland break;
92783428f7aSMark Cave-Ayland }
92883428f7aSMark Cave-Ayland break;
9299d1aa52bSMark Cave-Ayland }
9301b9e48a5SMark Cave-Ayland }
9311b9e48a5SMark Cave-Ayland
esp_command_complete(SCSIRequest * req,size_t resid)9324aaa6ac3SMark Cave-Ayland void esp_command_complete(SCSIRequest *req, size_t resid)
933a917d384Spbrook {
9344aaa6ac3SMark Cave-Ayland ESPState *s = req->hba_private;
9355a83e83eSMark Cave-Ayland int to_device = (esp_get_phase(s) == STAT_DO);
9364aaa6ac3SMark Cave-Ayland
937bf4b9889SBlue Swirl trace_esp_command_complete();
9386ef2cabcSMark Cave-Ayland
9396ef2cabcSMark Cave-Ayland /*
9406ef2cabcSMark Cave-Ayland * Non-DMA transfers from the target will leave the last byte in
9416ef2cabcSMark Cave-Ayland * the FIFO so don't reset ti_size in this case
9426ef2cabcSMark Cave-Ayland */
9436ef2cabcSMark Cave-Ayland if (s->dma || to_device) {
944c6df7102SPaolo Bonzini if (s->ti_size != 0) {
945bf4b9889SBlue Swirl trace_esp_command_complete_unexpected();
946c6df7102SPaolo Bonzini }
9476ef2cabcSMark Cave-Ayland }
9486ef2cabcSMark Cave-Ayland
949a917d384Spbrook s->async_len = 0;
9504aaa6ac3SMark Cave-Ayland if (req->status) {
951bf4b9889SBlue Swirl trace_esp_command_complete_fail();
952c6df7102SPaolo Bonzini }
9534aaa6ac3SMark Cave-Ayland s->status = req->status;
9546ef2cabcSMark Cave-Ayland
9556ef2cabcSMark Cave-Ayland /*
956cb988199SMark Cave-Ayland * Switch to status phase. For non-DMA transfers from the target the last
957cb988199SMark Cave-Ayland * byte is still in the FIFO
9586ef2cabcSMark Cave-Ayland */
9598bb22495SMark Cave-Ayland s->ti_size = 0;
9608bb22495SMark Cave-Ayland
9618bb22495SMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
9628bb22495SMark Cave-Ayland case CMD_SEL | CMD_DMA:
9638bb22495SMark Cave-Ayland case CMD_SEL:
9648bb22495SMark Cave-Ayland case CMD_SELATN | CMD_DMA:
9658bb22495SMark Cave-Ayland case CMD_SELATN:
966cb988199SMark Cave-Ayland /*
9678bb22495SMark Cave-Ayland * No data phase for sequencer command so raise deferred bus service
968c90b2792SMark Cave-Ayland * and function complete interrupt
969cb988199SMark Cave-Ayland */
970c90b2792SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
9719b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD;
9728bb22495SMark Cave-Ayland break;
973cb22ce50SMark Cave-Ayland
974cb22ce50SMark Cave-Ayland case CMD_TI | CMD_DMA:
975cb22ce50SMark Cave-Ayland case CMD_TI:
976cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0;
977cb22ce50SMark Cave-Ayland break;
9786ef2cabcSMark Cave-Ayland }
9796ef2cabcSMark Cave-Ayland
9808bb22495SMark Cave-Ayland /* Raise bus service interrupt to indicate change to STATUS phase */
9818bb22495SMark Cave-Ayland esp_set_phase(s, STAT_ST);
9828bb22495SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
9838bb22495SMark Cave-Ayland esp_raise_irq(s);
98402a3ce56SMark Cave-Ayland
9855c6c0e51SHannes Reinecke if (s->current_req) {
9865c6c0e51SHannes Reinecke scsi_req_unref(s->current_req);
9875c6c0e51SHannes Reinecke s->current_req = NULL;
988a917d384Spbrook s->current_dev = NULL;
9895c6c0e51SHannes Reinecke }
990c6df7102SPaolo Bonzini }
991c6df7102SPaolo Bonzini
esp_transfer_data(SCSIRequest * req,uint32_t len)9929c7e23fcSHervé Poussineau void esp_transfer_data(SCSIRequest *req, uint32_t len)
993c6df7102SPaolo Bonzini {
994e6810db8SHervé Poussineau ESPState *s = req->hba_private;
9956cc88d6bSMark Cave-Ayland uint32_t dmalen = esp_get_tc(s);
996c6df7102SPaolo Bonzini
9976cc88d6bSMark Cave-Ayland trace_esp_transfer_data(dmalen, s->ti_size);
998aba1f023SPaolo Bonzini s->async_len = len;
9990c34459bSPaolo Bonzini s->async_buf = scsi_req_get_buf(req);
10004e78f3bfSMark Cave-Ayland
1001c90b2792SMark Cave-Ayland if (!s->data_ready) {
1002a4608fa0SMark Cave-Ayland s->data_ready = true;
1003a4608fa0SMark Cave-Ayland
1004a4608fa0SMark Cave-Ayland switch (s->rregs[ESP_CMD]) {
1005a4608fa0SMark Cave-Ayland case CMD_SEL | CMD_DMA:
1006a4608fa0SMark Cave-Ayland case CMD_SEL:
1007a4608fa0SMark Cave-Ayland case CMD_SELATN | CMD_DMA:
1008a4608fa0SMark Cave-Ayland case CMD_SELATN:
1009c90b2792SMark Cave-Ayland /*
1010c90b2792SMark Cave-Ayland * Initial incoming data xfer is complete for sequencer command
1011c90b2792SMark Cave-Ayland * so raise deferred bus service and function complete interrupt
1012c90b2792SMark Cave-Ayland */
1013c90b2792SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
10149b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD;
1015c90b2792SMark Cave-Ayland break;
1016c90b2792SMark Cave-Ayland
1017a4608fa0SMark Cave-Ayland case CMD_SELATNS | CMD_DMA:
1018a4608fa0SMark Cave-Ayland case CMD_SELATNS:
10194e78f3bfSMark Cave-Ayland /*
10204e78f3bfSMark Cave-Ayland * Initial incoming data xfer is complete so raise command
10214e78f3bfSMark Cave-Ayland * completion interrupt
10224e78f3bfSMark Cave-Ayland */
10234e78f3bfSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
10249b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO;
1025a4608fa0SMark Cave-Ayland break;
1026a4608fa0SMark Cave-Ayland
1027a4608fa0SMark Cave-Ayland case CMD_TI | CMD_DMA:
1028a4608fa0SMark Cave-Ayland case CMD_TI:
1029a4608fa0SMark Cave-Ayland /*
1030a4608fa0SMark Cave-Ayland * Bus service interrupt raised because of initial change to
1031a4608fa0SMark Cave-Ayland * DATA phase
1032a4608fa0SMark Cave-Ayland */
1033cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0;
1034a4608fa0SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS;
1035a4608fa0SMark Cave-Ayland break;
1036a4608fa0SMark Cave-Ayland }
1037c90b2792SMark Cave-Ayland
1038c90b2792SMark Cave-Ayland esp_raise_irq(s);
10394e78f3bfSMark Cave-Ayland }
10404e78f3bfSMark Cave-Ayland
10411b9e48a5SMark Cave-Ayland /*
10421b9e48a5SMark Cave-Ayland * Always perform the initial transfer upon reception of the next TI
10431b9e48a5SMark Cave-Ayland * command to ensure the DMA/non-DMA status of the command is correct.
10441b9e48a5SMark Cave-Ayland * It is not possible to use s->dma directly in the section below as
10451b9e48a5SMark Cave-Ayland * some OSs send non-DMA NOP commands after a DMA transfer. Hence if the
10461b9e48a5SMark Cave-Ayland * async data transfer is delayed then s->dma is set incorrectly.
10471b9e48a5SMark Cave-Ayland */
10481b9e48a5SMark Cave-Ayland
104982003450SMark Cave-Ayland if (s->rregs[ESP_CMD] == (CMD_TI | CMD_DMA)) {
1050a79e767aSMark Cave-Ayland /* When the SCSI layer returns more data, raise deferred INTR_BS */
1051004826d0SMark Cave-Ayland esp_dma_ti_check(s);
1052a79e767aSMark Cave-Ayland
1053a79e767aSMark Cave-Ayland esp_do_dma(s);
105482003450SMark Cave-Ayland } else if (s->rregs[ESP_CMD] == CMD_TI) {
10551b9e48a5SMark Cave-Ayland esp_do_nodma(s);
10561b9e48a5SMark Cave-Ayland }
1057a917d384Spbrook }
10582e5d83bbSpbrook
handle_ti(ESPState * s)10592f275b8fSbellard static void handle_ti(ESPState *s)
10602f275b8fSbellard {
10611b9e48a5SMark Cave-Ayland uint32_t dmalen;
10622f275b8fSbellard
10637246e160SHervé Poussineau if (s->dma && !s->dma_enabled) {
10647246e160SHervé Poussineau s->dma_cb = handle_ti;
10657246e160SHervé Poussineau return;
10667246e160SHervé Poussineau }
10677246e160SHervé Poussineau
10684f6200f0Sbellard if (s->dma) {
10691b9e48a5SMark Cave-Ayland dmalen = esp_get_tc(s);
1070b76624deSMark Cave-Ayland trace_esp_handle_ti(dmalen);
10714d611c9aSpbrook esp_do_dma(s);
1072799d90d8SMark Cave-Ayland } else {
10731b9e48a5SMark Cave-Ayland trace_esp_handle_ti(s->ti_size);
10741b9e48a5SMark Cave-Ayland esp_do_nodma(s);
10755d02add4SMark Cave-Ayland
10765d02add4SMark Cave-Ayland if (esp_get_phase(s) == STAT_DO) {
10775d02add4SMark Cave-Ayland esp_nodma_ti_dataout(s);
10785d02add4SMark Cave-Ayland }
10794f6200f0Sbellard }
10802f275b8fSbellard }
10812f275b8fSbellard
esp_hard_reset(ESPState * s)10829c7e23fcSHervé Poussineau void esp_hard_reset(ESPState *s)
10836f7e9aecSbellard {
10845aca8c3bSblueswir1 memset(s->rregs, 0, ESP_REGS);
10855aca8c3bSblueswir1 memset(s->wregs, 0, ESP_REGS);
1086c9cf45c1SHannes Reinecke s->tchi_written = 0;
10874e9aec74Spbrook s->ti_size = 0;
10883f26c975SMark Cave-Ayland s->async_len = 0;
1089042879fcSMark Cave-Ayland fifo8_reset(&s->fifo);
1090023666daSMark Cave-Ayland fifo8_reset(&s->cmdfifo);
10914e9aec74Spbrook s->dma = 0;
109273d74342SBlue Swirl s->dma_cb = NULL;
10938dea1dd4Sblueswir1
10948dea1dd4Sblueswir1 s->rregs[ESP_CFG1] = 7;
10956f7e9aecSbellard }
10966f7e9aecSbellard
esp_soft_reset(ESPState * s)1097a391fdbcSHervé Poussineau static void esp_soft_reset(ESPState *s)
109885948643SBlue Swirl {
109985948643SBlue Swirl qemu_irq_lower(s->irq);
11006dec7c0dSMark Cave-Ayland qemu_irq_lower(s->drq_irq);
1101a391fdbcSHervé Poussineau esp_hard_reset(s);
110285948643SBlue Swirl }
110385948643SBlue Swirl
esp_bus_reset(ESPState * s)1104c6e51f1bSJohn Millikin static void esp_bus_reset(ESPState *s)
1105c6e51f1bSJohn Millikin {
11064a5fc890SPeter Maydell bus_cold_reset(BUS(&s->bus));
1107c6e51f1bSJohn Millikin }
1108c6e51f1bSJohn Millikin
parent_esp_reset(ESPState * s,int irq,int level)1109a391fdbcSHervé Poussineau static void parent_esp_reset(ESPState *s, int irq, int level)
11102d069babSblueswir1 {
111185948643SBlue Swirl if (level) {
1112a391fdbcSHervé Poussineau esp_soft_reset(s);
111385948643SBlue Swirl }
11142d069babSblueswir1 }
11152d069babSblueswir1
esp_run_cmd(ESPState * s)1116f21fe39dSMark Cave-Ayland static void esp_run_cmd(ESPState *s)
1117f21fe39dSMark Cave-Ayland {
1118f21fe39dSMark Cave-Ayland uint8_t cmd = s->rregs[ESP_CMD];
1119f21fe39dSMark Cave-Ayland
1120f21fe39dSMark Cave-Ayland if (cmd & CMD_DMA) {
1121f21fe39dSMark Cave-Ayland s->dma = 1;
1122f21fe39dSMark Cave-Ayland /* Reload DMA counter. */
1123f21fe39dSMark Cave-Ayland if (esp_get_stc(s) == 0) {
1124f21fe39dSMark Cave-Ayland esp_set_tc(s, 0x10000);
1125f21fe39dSMark Cave-Ayland } else {
1126f21fe39dSMark Cave-Ayland esp_set_tc(s, esp_get_stc(s));
1127f21fe39dSMark Cave-Ayland }
1128f21fe39dSMark Cave-Ayland } else {
1129f21fe39dSMark Cave-Ayland s->dma = 0;
1130f21fe39dSMark Cave-Ayland }
1131f21fe39dSMark Cave-Ayland switch (cmd & CMD_CMD) {
1132f21fe39dSMark Cave-Ayland case CMD_NOP:
1133f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_nop(cmd);
1134f21fe39dSMark Cave-Ayland break;
1135f21fe39dSMark Cave-Ayland case CMD_FLUSH:
1136f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_flush(cmd);
1137f21fe39dSMark Cave-Ayland fifo8_reset(&s->fifo);
1138f21fe39dSMark Cave-Ayland break;
1139f21fe39dSMark Cave-Ayland case CMD_RESET:
1140f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_reset(cmd);
1141f21fe39dSMark Cave-Ayland esp_soft_reset(s);
1142f21fe39dSMark Cave-Ayland break;
1143f21fe39dSMark Cave-Ayland case CMD_BUSRESET:
1144f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_bus_reset(cmd);
1145f21fe39dSMark Cave-Ayland esp_bus_reset(s);
1146f21fe39dSMark Cave-Ayland if (!(s->wregs[ESP_CFG1] & CFG1_RESREPT)) {
1147f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_RST;
1148f21fe39dSMark Cave-Ayland esp_raise_irq(s);
1149f21fe39dSMark Cave-Ayland }
1150f21fe39dSMark Cave-Ayland break;
1151f21fe39dSMark Cave-Ayland case CMD_TI:
1152f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_ti(cmd);
1153f21fe39dSMark Cave-Ayland handle_ti(s);
1154f21fe39dSMark Cave-Ayland break;
1155f21fe39dSMark Cave-Ayland case CMD_ICCS:
1156f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_iccs(cmd);
1157f21fe39dSMark Cave-Ayland write_response(s);
1158f21fe39dSMark Cave-Ayland break;
1159f21fe39dSMark Cave-Ayland case CMD_MSGACC:
1160f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_msgacc(cmd);
1161f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_DC;
1162f21fe39dSMark Cave-Ayland s->rregs[ESP_RSEQ] = 0;
1163f21fe39dSMark Cave-Ayland s->rregs[ESP_RFLAGS] = 0;
1164f21fe39dSMark Cave-Ayland esp_raise_irq(s);
1165f21fe39dSMark Cave-Ayland break;
1166f21fe39dSMark Cave-Ayland case CMD_PAD:
1167f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_pad(cmd);
1168a6cad7cdSMark Cave-Ayland handle_pad(s);
1169f21fe39dSMark Cave-Ayland break;
1170f21fe39dSMark Cave-Ayland case CMD_SATN:
1171f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_satn(cmd);
1172f21fe39dSMark Cave-Ayland break;
1173f21fe39dSMark Cave-Ayland case CMD_RSTATN:
1174f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_rstatn(cmd);
1175f21fe39dSMark Cave-Ayland break;
1176f21fe39dSMark Cave-Ayland case CMD_SEL:
1177f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_sel(cmd);
1178f21fe39dSMark Cave-Ayland handle_s_without_atn(s);
1179f21fe39dSMark Cave-Ayland break;
1180f21fe39dSMark Cave-Ayland case CMD_SELATN:
1181f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_selatn(cmd);
1182f21fe39dSMark Cave-Ayland handle_satn(s);
1183f21fe39dSMark Cave-Ayland break;
1184f21fe39dSMark Cave-Ayland case CMD_SELATNS:
1185f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_selatns(cmd);
1186f21fe39dSMark Cave-Ayland handle_satn_stop(s);
1187f21fe39dSMark Cave-Ayland break;
1188f21fe39dSMark Cave-Ayland case CMD_ENSEL:
1189f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_ensel(cmd);
1190f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] = 0;
1191f21fe39dSMark Cave-Ayland break;
1192f21fe39dSMark Cave-Ayland case CMD_DISSEL:
1193f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_dissel(cmd);
1194f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] = 0;
1195f21fe39dSMark Cave-Ayland esp_raise_irq(s);
1196f21fe39dSMark Cave-Ayland break;
1197f21fe39dSMark Cave-Ayland default:
1198f21fe39dSMark Cave-Ayland trace_esp_error_unhandled_command(cmd);
1199f21fe39dSMark Cave-Ayland break;
1200f21fe39dSMark Cave-Ayland }
1201f21fe39dSMark Cave-Ayland }
1202f21fe39dSMark Cave-Ayland
esp_reg_read(ESPState * s,uint32_t saddr)12039c7e23fcSHervé Poussineau uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
120473d74342SBlue Swirl {
1205b630c075SMark Cave-Ayland uint32_t val;
120673d74342SBlue Swirl
12076f7e9aecSbellard switch (saddr) {
12085ad6bb97Sblueswir1 case ESP_FIFO:
120961fa150dSMark Cave-Ayland s->rregs[ESP_FIFO] = esp_fifo_pop(s);
1210b630c075SMark Cave-Ayland val = s->rregs[ESP_FIFO];
12114f6200f0Sbellard break;
12125ad6bb97Sblueswir1 case ESP_RINTR:
121394d5c79dSMark Cave-Ayland /*
121494d5c79dSMark Cave-Ayland * Clear sequence step, interrupt register and all status bits
121594d5c79dSMark Cave-Ayland * except TC
121694d5c79dSMark Cave-Ayland */
1217b630c075SMark Cave-Ayland val = s->rregs[ESP_RINTR];
12182814df28SBlue Swirl s->rregs[ESP_RINTR] = 0;
1219d294b77aSMark Cave-Ayland esp_lower_irq(s);
1220d68212cdSMark Cave-Ayland s->rregs[ESP_RSTAT] &= STAT_TC | 7;
1221af947a3dSMark Cave-Ayland /*
1222af947a3dSMark Cave-Ayland * According to the datasheet ESP_RSEQ should be cleared, but as the
1223af947a3dSMark Cave-Ayland * emulation currently defers information transfers to the next TI
1224af947a3dSMark Cave-Ayland * command leave it for now so that pedantic guests such as the old
1225af947a3dSMark Cave-Ayland * Linux 2.6 driver see the correct flags before the next SCSI phase
1226af947a3dSMark Cave-Ayland * transition.
1227af947a3dSMark Cave-Ayland *
1228af947a3dSMark Cave-Ayland * s->rregs[ESP_RSEQ] = SEQ_0;
1229af947a3dSMark Cave-Ayland */
1230b630c075SMark Cave-Ayland break;
1231c9cf45c1SHannes Reinecke case ESP_TCHI:
1232c9cf45c1SHannes Reinecke /* Return the unique id if the value has never been written */
1233c9cf45c1SHannes Reinecke if (!s->tchi_written) {
1234b630c075SMark Cave-Ayland val = s->chip_id;
1235b630c075SMark Cave-Ayland } else {
1236b630c075SMark Cave-Ayland val = s->rregs[saddr];
1237c9cf45c1SHannes Reinecke }
1238b630c075SMark Cave-Ayland break;
1239238ec4d7SMark Cave-Ayland case ESP_RFLAGS:
1240238ec4d7SMark Cave-Ayland /* Bottom 5 bits indicate number of bytes in FIFO */
1241238ec4d7SMark Cave-Ayland val = fifo8_num_used(&s->fifo);
1242238ec4d7SMark Cave-Ayland break;
12436f7e9aecSbellard default:
1244b630c075SMark Cave-Ayland val = s->rregs[saddr];
12456f7e9aecSbellard break;
12466f7e9aecSbellard }
1247b630c075SMark Cave-Ayland
1248b630c075SMark Cave-Ayland trace_esp_mem_readb(saddr, val);
1249b630c075SMark Cave-Ayland return val;
12506f7e9aecSbellard }
12516f7e9aecSbellard
esp_reg_write(ESPState * s,uint32_t saddr,uint64_t val)12529c7e23fcSHervé Poussineau void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
12536f7e9aecSbellard {
1254bf4b9889SBlue Swirl trace_esp_mem_writeb(saddr, s->wregs[saddr], val);
12556f7e9aecSbellard switch (saddr) {
1256c9cf45c1SHannes Reinecke case ESP_TCHI:
1257c9cf45c1SHannes Reinecke s->tchi_written = true;
1258c9cf45c1SHannes Reinecke /* fall through */
12595ad6bb97Sblueswir1 case ESP_TCLO:
12605ad6bb97Sblueswir1 case ESP_TCMID:
12615ad6bb97Sblueswir1 s->rregs[ESP_RSTAT] &= ~STAT_TC;
12624f6200f0Sbellard break;
12635ad6bb97Sblueswir1 case ESP_FIFO:
12642572689bSMark Cave-Ayland if (!fifo8_is_full(&s->fifo)) {
12650e7dbe29SMark Cave-Ayland esp_fifo_push(s, val);
12662572689bSMark Cave-Ayland }
12675d02add4SMark Cave-Ayland esp_do_nodma(s);
12684f6200f0Sbellard break;
12695ad6bb97Sblueswir1 case ESP_CMD:
12704f6200f0Sbellard s->rregs[saddr] = val;
1271f21fe39dSMark Cave-Ayland esp_run_cmd(s);
12726f7e9aecSbellard break;
12735ad6bb97Sblueswir1 case ESP_WBUSID ... ESP_WSYNO:
12744f6200f0Sbellard break;
12755ad6bb97Sblueswir1 case ESP_CFG1:
12769ea73f8bSPaolo Bonzini case ESP_CFG2: case ESP_CFG3:
12779ea73f8bSPaolo Bonzini case ESP_RES3: case ESP_RES4:
12784f6200f0Sbellard s->rregs[saddr] = val;
12794f6200f0Sbellard break;
12805ad6bb97Sblueswir1 case ESP_WCCF ... ESP_WTEST:
12814f6200f0Sbellard break;
12826f7e9aecSbellard default:
12833af4e9aaSHervé Poussineau trace_esp_error_invalid_write(val, saddr);
12848dea1dd4Sblueswir1 return;
12856f7e9aecSbellard }
12862f275b8fSbellard s->wregs[saddr] = val;
12876f7e9aecSbellard }
12886f7e9aecSbellard
esp_mem_accepts(void * opaque,hwaddr addr,unsigned size,bool is_write,MemTxAttrs attrs)1289a8170e5eSAvi Kivity static bool esp_mem_accepts(void *opaque, hwaddr addr,
12908372d383SPeter Maydell unsigned size, bool is_write,
12918372d383SPeter Maydell MemTxAttrs attrs)
129267bb5314SAvi Kivity {
129367bb5314SAvi Kivity return (size == 1) || (is_write && size == 4);
129467bb5314SAvi Kivity }
12956f7e9aecSbellard
esp_is_before_version_5(void * opaque,int version_id)12966cc88d6bSMark Cave-Ayland static bool esp_is_before_version_5(void *opaque, int version_id)
12976cc88d6bSMark Cave-Ayland {
12986cc88d6bSMark Cave-Ayland ESPState *s = ESP(opaque);
12996cc88d6bSMark Cave-Ayland
13006cc88d6bSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id);
13016cc88d6bSMark Cave-Ayland return version_id < 5;
13026cc88d6bSMark Cave-Ayland }
13036cc88d6bSMark Cave-Ayland
esp_is_version_5(void * opaque,int version_id)13044e78f3bfSMark Cave-Ayland static bool esp_is_version_5(void *opaque, int version_id)
13054e78f3bfSMark Cave-Ayland {
13064e78f3bfSMark Cave-Ayland ESPState *s = ESP(opaque);
13074e78f3bfSMark Cave-Ayland
13084e78f3bfSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id);
13090bcd5a18SMark Cave-Ayland return version_id >= 5;
13104e78f3bfSMark Cave-Ayland }
13114e78f3bfSMark Cave-Ayland
esp_is_version_6(void * opaque,int version_id)13124eb86065SPaolo Bonzini static bool esp_is_version_6(void *opaque, int version_id)
13134eb86065SPaolo Bonzini {
13144eb86065SPaolo Bonzini ESPState *s = ESP(opaque);
13154eb86065SPaolo Bonzini
13164eb86065SPaolo Bonzini version_id = MIN(version_id, s->mig_version_id);
13174eb86065SPaolo Bonzini return version_id >= 6;
13184eb86065SPaolo Bonzini }
13194eb86065SPaolo Bonzini
esp_is_between_version_5_and_6(void * opaque,int version_id)132082003450SMark Cave-Ayland static bool esp_is_between_version_5_and_6(void *opaque, int version_id)
132182003450SMark Cave-Ayland {
132282003450SMark Cave-Ayland ESPState *s = ESP(opaque);
132382003450SMark Cave-Ayland
132482003450SMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id);
132582003450SMark Cave-Ayland return version_id >= 5 && version_id <= 6;
132682003450SMark Cave-Ayland }
132782003450SMark Cave-Ayland
esp_pre_save(void * opaque)1328ff4a1dabSMark Cave-Ayland int esp_pre_save(void *opaque)
13290bd005beSMark Cave-Ayland {
1330ff4a1dabSMark Cave-Ayland ESPState *s = ESP(object_resolve_path_component(
1331ff4a1dabSMark Cave-Ayland OBJECT(opaque), "esp"));
13320bd005beSMark Cave-Ayland
13330bd005beSMark Cave-Ayland s->mig_version_id = vmstate_esp.version_id;
13340bd005beSMark Cave-Ayland return 0;
13350bd005beSMark Cave-Ayland }
13360bd005beSMark Cave-Ayland
esp_post_load(void * opaque,int version_id)13370bd005beSMark Cave-Ayland static int esp_post_load(void *opaque, int version_id)
13380bd005beSMark Cave-Ayland {
13390bd005beSMark Cave-Ayland ESPState *s = ESP(opaque);
1340042879fcSMark Cave-Ayland int len, i;
13410bd005beSMark Cave-Ayland
13426cc88d6bSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id);
13436cc88d6bSMark Cave-Ayland
13446cc88d6bSMark Cave-Ayland if (version_id < 5) {
13456cc88d6bSMark Cave-Ayland esp_set_tc(s, s->mig_dma_left);
1346042879fcSMark Cave-Ayland
1347042879fcSMark Cave-Ayland /* Migrate ti_buf to fifo */
1348042879fcSMark Cave-Ayland len = s->mig_ti_wptr - s->mig_ti_rptr;
1349042879fcSMark Cave-Ayland for (i = 0; i < len; i++) {
1350042879fcSMark Cave-Ayland fifo8_push(&s->fifo, s->mig_ti_buf[i]);
1351042879fcSMark Cave-Ayland }
1352023666daSMark Cave-Ayland
1353023666daSMark Cave-Ayland /* Migrate cmdbuf to cmdfifo */
1354023666daSMark Cave-Ayland for (i = 0; i < s->mig_cmdlen; i++) {
1355023666daSMark Cave-Ayland fifo8_push(&s->cmdfifo, s->mig_cmdbuf[i]);
1356023666daSMark Cave-Ayland }
13576cc88d6bSMark Cave-Ayland }
13586cc88d6bSMark Cave-Ayland
13590bd005beSMark Cave-Ayland s->mig_version_id = vmstate_esp.version_id;
13600bd005beSMark Cave-Ayland return 0;
13610bd005beSMark Cave-Ayland }
13620bd005beSMark Cave-Ayland
13639c7e23fcSHervé Poussineau const VMStateDescription vmstate_esp = {
1364cc9952f3SBlue Swirl .name = "esp",
136582003450SMark Cave-Ayland .version_id = 7,
1366cc9952f3SBlue Swirl .minimum_version_id = 3,
13670bd005beSMark Cave-Ayland .post_load = esp_post_load,
13682d7b39a6SRichard Henderson .fields = (const VMStateField[]) {
1369cc9952f3SBlue Swirl VMSTATE_BUFFER(rregs, ESPState),
1370cc9952f3SBlue Swirl VMSTATE_BUFFER(wregs, ESPState),
1371cc9952f3SBlue Swirl VMSTATE_INT32(ti_size, ESPState),
1372042879fcSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_ti_rptr, ESPState, esp_is_before_version_5),
1373042879fcSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_ti_wptr, ESPState, esp_is_before_version_5),
1374042879fcSMark Cave-Ayland VMSTATE_BUFFER_TEST(mig_ti_buf, ESPState, esp_is_before_version_5),
13753944966dSPaolo Bonzini VMSTATE_UINT32(status, ESPState),
13764aaa6ac3SMark Cave-Ayland VMSTATE_UINT32_TEST(mig_deferred_status, ESPState,
13774aaa6ac3SMark Cave-Ayland esp_is_before_version_5),
13784aaa6ac3SMark Cave-Ayland VMSTATE_BOOL_TEST(mig_deferred_complete, ESPState,
13794aaa6ac3SMark Cave-Ayland esp_is_before_version_5),
1380cc9952f3SBlue Swirl VMSTATE_UINT32(dma, ESPState),
1381023666daSMark Cave-Ayland VMSTATE_STATIC_BUFFER(mig_cmdbuf, ESPState, 0,
1382023666daSMark Cave-Ayland esp_is_before_version_5, 0, 16),
1383023666daSMark Cave-Ayland VMSTATE_STATIC_BUFFER(mig_cmdbuf, ESPState, 4,
1384023666daSMark Cave-Ayland esp_is_before_version_5, 16,
1385023666daSMark Cave-Ayland sizeof(typeof_field(ESPState, mig_cmdbuf))),
1386023666daSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_cmdlen, ESPState, esp_is_before_version_5),
1387cc9952f3SBlue Swirl VMSTATE_UINT32(do_cmd, ESPState),
13886cc88d6bSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_dma_left, ESPState, esp_is_before_version_5),
13898dded6deSMark Cave-Ayland VMSTATE_BOOL_TEST(data_ready, ESPState, esp_is_version_5),
1390023666daSMark Cave-Ayland VMSTATE_UINT8_TEST(cmdfifo_cdb_offset, ESPState, esp_is_version_5),
1391042879fcSMark Cave-Ayland VMSTATE_FIFO8_TEST(fifo, ESPState, esp_is_version_5),
1392023666daSMark Cave-Ayland VMSTATE_FIFO8_TEST(cmdfifo, ESPState, esp_is_version_5),
139382003450SMark Cave-Ayland VMSTATE_UINT8_TEST(mig_ti_cmd, ESPState,
139482003450SMark Cave-Ayland esp_is_between_version_5_and_6),
13954eb86065SPaolo Bonzini VMSTATE_UINT8_TEST(lun, ESPState, esp_is_version_6),
1396442de89aSMark Cave-Ayland VMSTATE_BOOL(drq_state, ESPState),
1397cc9952f3SBlue Swirl VMSTATE_END_OF_LIST()
139874d71ea1SLaurent Vivier },
1399cc9952f3SBlue Swirl };
14006f7e9aecSbellard
sysbus_esp_mem_write(void * opaque,hwaddr addr,uint64_t val,unsigned int size)1401a8170e5eSAvi Kivity static void sysbus_esp_mem_write(void *opaque, hwaddr addr,
1402a391fdbcSHervé Poussineau uint64_t val, unsigned int size)
1403a391fdbcSHervé Poussineau {
1404a391fdbcSHervé Poussineau SysBusESPState *sysbus = opaque;
1405eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp);
1406a391fdbcSHervé Poussineau uint32_t saddr;
1407a391fdbcSHervé Poussineau
1408a391fdbcSHervé Poussineau saddr = addr >> sysbus->it_shift;
1409eb169c76SMark Cave-Ayland esp_reg_write(s, saddr, val);
1410a391fdbcSHervé Poussineau }
1411a391fdbcSHervé Poussineau
sysbus_esp_mem_read(void * opaque,hwaddr addr,unsigned int size)1412a8170e5eSAvi Kivity static uint64_t sysbus_esp_mem_read(void *opaque, hwaddr addr,
1413a391fdbcSHervé Poussineau unsigned int size)
1414a391fdbcSHervé Poussineau {
1415a391fdbcSHervé Poussineau SysBusESPState *sysbus = opaque;
1416eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp);
1417a391fdbcSHervé Poussineau uint32_t saddr;
1418a391fdbcSHervé Poussineau
1419a391fdbcSHervé Poussineau saddr = addr >> sysbus->it_shift;
1420eb169c76SMark Cave-Ayland return esp_reg_read(s, saddr);
1421a391fdbcSHervé Poussineau }
1422a391fdbcSHervé Poussineau
1423a391fdbcSHervé Poussineau static const MemoryRegionOps sysbus_esp_mem_ops = {
1424a391fdbcSHervé Poussineau .read = sysbus_esp_mem_read,
1425a391fdbcSHervé Poussineau .write = sysbus_esp_mem_write,
1426a391fdbcSHervé Poussineau .endianness = DEVICE_NATIVE_ENDIAN,
1427a391fdbcSHervé Poussineau .valid.accepts = esp_mem_accepts,
1428a391fdbcSHervé Poussineau };
1429a391fdbcSHervé Poussineau
sysbus_esp_pdma_write(void * opaque,hwaddr addr,uint64_t val,unsigned int size)143074d71ea1SLaurent Vivier static void sysbus_esp_pdma_write(void *opaque, hwaddr addr,
143174d71ea1SLaurent Vivier uint64_t val, unsigned int size)
143274d71ea1SLaurent Vivier {
143374d71ea1SLaurent Vivier SysBusESPState *sysbus = opaque;
1434eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp);
143574d71ea1SLaurent Vivier
1436960ebfd9SMark Cave-Ayland trace_esp_pdma_write(size);
1437960ebfd9SMark Cave-Ayland
143874d71ea1SLaurent Vivier switch (size) {
143974d71ea1SLaurent Vivier case 1:
1440761bef75SMark Cave-Ayland esp_pdma_write(s, val);
144174d71ea1SLaurent Vivier break;
144274d71ea1SLaurent Vivier case 2:
1443761bef75SMark Cave-Ayland esp_pdma_write(s, val >> 8);
1444761bef75SMark Cave-Ayland esp_pdma_write(s, val);
144574d71ea1SLaurent Vivier break;
144674d71ea1SLaurent Vivier }
1447b46a43a2SMark Cave-Ayland esp_do_dma(s);
144874d71ea1SLaurent Vivier }
144974d71ea1SLaurent Vivier
sysbus_esp_pdma_read(void * opaque,hwaddr addr,unsigned int size)145074d71ea1SLaurent Vivier static uint64_t sysbus_esp_pdma_read(void *opaque, hwaddr addr,
145174d71ea1SLaurent Vivier unsigned int size)
145274d71ea1SLaurent Vivier {
145374d71ea1SLaurent Vivier SysBusESPState *sysbus = opaque;
1454eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp);
145574d71ea1SLaurent Vivier uint64_t val = 0;
145674d71ea1SLaurent Vivier
1457960ebfd9SMark Cave-Ayland trace_esp_pdma_read(size);
1458960ebfd9SMark Cave-Ayland
145974d71ea1SLaurent Vivier switch (size) {
146074d71ea1SLaurent Vivier case 1:
1461761bef75SMark Cave-Ayland val = esp_pdma_read(s);
146274d71ea1SLaurent Vivier break;
146374d71ea1SLaurent Vivier case 2:
1464761bef75SMark Cave-Ayland val = esp_pdma_read(s);
1465761bef75SMark Cave-Ayland val = (val << 8) | esp_pdma_read(s);
146674d71ea1SLaurent Vivier break;
146774d71ea1SLaurent Vivier }
1468b46a43a2SMark Cave-Ayland esp_do_dma(s);
146974d71ea1SLaurent Vivier return val;
147074d71ea1SLaurent Vivier }
147174d71ea1SLaurent Vivier
esp_load_request(QEMUFile * f,SCSIRequest * req)1472a7a22088SMark Cave-Ayland static void *esp_load_request(QEMUFile *f, SCSIRequest *req)
1473a7a22088SMark Cave-Ayland {
1474a7a22088SMark Cave-Ayland ESPState *s = container_of(req->bus, ESPState, bus);
1475a7a22088SMark Cave-Ayland
1476a7a22088SMark Cave-Ayland scsi_req_ref(req);
1477a7a22088SMark Cave-Ayland s->current_req = req;
1478a7a22088SMark Cave-Ayland return s;
1479a7a22088SMark Cave-Ayland }
1480a7a22088SMark Cave-Ayland
148174d71ea1SLaurent Vivier static const MemoryRegionOps sysbus_esp_pdma_ops = {
148274d71ea1SLaurent Vivier .read = sysbus_esp_pdma_read,
148374d71ea1SLaurent Vivier .write = sysbus_esp_pdma_write,
148474d71ea1SLaurent Vivier .endianness = DEVICE_NATIVE_ENDIAN,
148574d71ea1SLaurent Vivier .valid.min_access_size = 1,
1486cf1b8286SMark Cave-Ayland .valid.max_access_size = 4,
1487cf1b8286SMark Cave-Ayland .impl.min_access_size = 1,
1488cf1b8286SMark Cave-Ayland .impl.max_access_size = 2,
148974d71ea1SLaurent Vivier };
149074d71ea1SLaurent Vivier
1491afd4030cSPaolo Bonzini static const struct SCSIBusInfo esp_scsi_info = {
1492afd4030cSPaolo Bonzini .tcq = false,
14937e0380b9SPaolo Bonzini .max_target = ESP_MAX_DEVS,
14947e0380b9SPaolo Bonzini .max_lun = 7,
1495afd4030cSPaolo Bonzini
1496a7a22088SMark Cave-Ayland .load_request = esp_load_request,
1497c6df7102SPaolo Bonzini .transfer_data = esp_transfer_data,
149894d3f98aSPaolo Bonzini .complete = esp_command_complete,
149994d3f98aSPaolo Bonzini .cancel = esp_request_cancelled
1500cfdc1bb0SPaolo Bonzini };
1501cfdc1bb0SPaolo Bonzini
sysbus_esp_gpio_demux(void * opaque,int irq,int level)1502a391fdbcSHervé Poussineau static void sysbus_esp_gpio_demux(void *opaque, int irq, int level)
1503cfb9de9cSPaul Brook {
150484fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(opaque);
1505eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp);
1506a391fdbcSHervé Poussineau
1507a391fdbcSHervé Poussineau switch (irq) {
1508a391fdbcSHervé Poussineau case 0:
1509a391fdbcSHervé Poussineau parent_esp_reset(s, irq, level);
1510a391fdbcSHervé Poussineau break;
1511a391fdbcSHervé Poussineau case 1:
1512b86dc5cbSMark Cave-Ayland esp_dma_enable(s, irq, level);
1513a391fdbcSHervé Poussineau break;
1514a391fdbcSHervé Poussineau }
1515a391fdbcSHervé Poussineau }
1516a391fdbcSHervé Poussineau
sysbus_esp_realize(DeviceState * dev,Error ** errp)1517b09318caSHu Tao static void sysbus_esp_realize(DeviceState *dev, Error **errp)
1518a391fdbcSHervé Poussineau {
1519b09318caSHu Tao SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
152084fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(dev);
1521eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp);
1522eb169c76SMark Cave-Ayland
1523eb169c76SMark Cave-Ayland if (!qdev_realize(DEVICE(s), NULL, errp)) {
1524eb169c76SMark Cave-Ayland return;
1525eb169c76SMark Cave-Ayland }
15266f7e9aecSbellard
1527b09318caSHu Tao sysbus_init_irq(sbd, &s->irq);
15286dec7c0dSMark Cave-Ayland sysbus_init_irq(sbd, &s->drq_irq);
1529a391fdbcSHervé Poussineau assert(sysbus->it_shift != -1);
15306f7e9aecSbellard
1531d32e4b3dSHervé Poussineau s->chip_id = TCHI_FAS100A;
153229776739SPaolo Bonzini memory_region_init_io(&sysbus->iomem, OBJECT(sysbus), &sysbus_esp_mem_ops,
153374d71ea1SLaurent Vivier sysbus, "esp-regs", ESP_REGS << sysbus->it_shift);
1534b09318caSHu Tao sysbus_init_mmio(sbd, &sysbus->iomem);
153574d71ea1SLaurent Vivier memory_region_init_io(&sysbus->pdma, OBJECT(sysbus), &sysbus_esp_pdma_ops,
1536cf1b8286SMark Cave-Ayland sysbus, "esp-pdma", 4);
153774d71ea1SLaurent Vivier sysbus_init_mmio(sbd, &sysbus->pdma);
15386f7e9aecSbellard
1539b09318caSHu Tao qdev_init_gpio_in(dev, sysbus_esp_gpio_demux, 2);
15402d069babSblueswir1
1541739e95f5SPeter Maydell scsi_bus_init(&s->bus, sizeof(s->bus), dev, &esp_scsi_info);
154267e999beSbellard }
1543cfb9de9cSPaul Brook
sysbus_esp_hard_reset(DeviceState * dev)1544a391fdbcSHervé Poussineau static void sysbus_esp_hard_reset(DeviceState *dev)
1545a391fdbcSHervé Poussineau {
154684fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(dev);
1547eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp);
1548eb169c76SMark Cave-Ayland
1549eb169c76SMark Cave-Ayland esp_hard_reset(s);
1550eb169c76SMark Cave-Ayland }
1551eb169c76SMark Cave-Ayland
sysbus_esp_init(Object * obj)1552eb169c76SMark Cave-Ayland static void sysbus_esp_init(Object *obj)
1553eb169c76SMark Cave-Ayland {
1554eb169c76SMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(obj);
1555eb169c76SMark Cave-Ayland
1556eb169c76SMark Cave-Ayland object_initialize_child(obj, "esp", &sysbus->esp, TYPE_ESP);
1557a391fdbcSHervé Poussineau }
1558a391fdbcSHervé Poussineau
1559a391fdbcSHervé Poussineau static const VMStateDescription vmstate_sysbus_esp_scsi = {
1560a391fdbcSHervé Poussineau .name = "sysbusespscsi",
15610bd005beSMark Cave-Ayland .version_id = 2,
1562ea84a442SGuenter Roeck .minimum_version_id = 1,
1563ff4a1dabSMark Cave-Ayland .pre_save = esp_pre_save,
15642d7b39a6SRichard Henderson .fields = (const VMStateField[]) {
15650bd005beSMark Cave-Ayland VMSTATE_UINT8_V(esp.mig_version_id, SysBusESPState, 2),
1566a391fdbcSHervé Poussineau VMSTATE_STRUCT(esp, SysBusESPState, 0, vmstate_esp, ESPState),
1567a391fdbcSHervé Poussineau VMSTATE_END_OF_LIST()
1568a391fdbcSHervé Poussineau }
1569999e12bbSAnthony Liguori };
1570999e12bbSAnthony Liguori
sysbus_esp_class_init(ObjectClass * klass,const void * data)1571*12d1a768SPhilippe Mathieu-Daudé static void sysbus_esp_class_init(ObjectClass *klass, const void *data)
1572999e12bbSAnthony Liguori {
157339bffca2SAnthony Liguori DeviceClass *dc = DEVICE_CLASS(klass);
1574999e12bbSAnthony Liguori
1575b09318caSHu Tao dc->realize = sysbus_esp_realize;
1576e3d08143SPeter Maydell device_class_set_legacy_reset(dc, sysbus_esp_hard_reset);
1577a391fdbcSHervé Poussineau dc->vmsd = &vmstate_sysbus_esp_scsi;
1578125ee0edSMarcel Apfelbaum set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
157963235df8SBlue Swirl }
1580999e12bbSAnthony Liguori
esp_finalize(Object * obj)1581042879fcSMark Cave-Ayland static void esp_finalize(Object *obj)
1582042879fcSMark Cave-Ayland {
1583042879fcSMark Cave-Ayland ESPState *s = ESP(obj);
1584042879fcSMark Cave-Ayland
1585042879fcSMark Cave-Ayland fifo8_destroy(&s->fifo);
1586023666daSMark Cave-Ayland fifo8_destroy(&s->cmdfifo);
1587042879fcSMark Cave-Ayland }
1588042879fcSMark Cave-Ayland
esp_init(Object * obj)1589042879fcSMark Cave-Ayland static void esp_init(Object *obj)
1590042879fcSMark Cave-Ayland {
1591042879fcSMark Cave-Ayland ESPState *s = ESP(obj);
1592042879fcSMark Cave-Ayland
1593042879fcSMark Cave-Ayland fifo8_create(&s->fifo, ESP_FIFO_SZ);
1594023666daSMark Cave-Ayland fifo8_create(&s->cmdfifo, ESP_CMDFIFO_SZ);
1595042879fcSMark Cave-Ayland }
1596042879fcSMark Cave-Ayland
esp_class_init(ObjectClass * klass,const void * data)1597*12d1a768SPhilippe Mathieu-Daudé static void esp_class_init(ObjectClass *klass, const void *data)
1598eb169c76SMark Cave-Ayland {
1599eb169c76SMark Cave-Ayland DeviceClass *dc = DEVICE_CLASS(klass);
1600eb169c76SMark Cave-Ayland
1601eb169c76SMark Cave-Ayland /* internal device for sysbusesp/pciespscsi, not user-creatable */
1602eb169c76SMark Cave-Ayland dc->user_creatable = false;
1603eb169c76SMark Cave-Ayland set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
1604eb169c76SMark Cave-Ayland }
1605eb169c76SMark Cave-Ayland
1606499f4089SMark Cave-Ayland static const TypeInfo esp_info_types[] = {
1607499f4089SMark Cave-Ayland {
1608499f4089SMark Cave-Ayland .name = TYPE_SYSBUS_ESP,
1609499f4089SMark Cave-Ayland .parent = TYPE_SYS_BUS_DEVICE,
1610499f4089SMark Cave-Ayland .instance_init = sysbus_esp_init,
1611499f4089SMark Cave-Ayland .instance_size = sizeof(SysBusESPState),
1612499f4089SMark Cave-Ayland .class_init = sysbus_esp_class_init,
1613499f4089SMark Cave-Ayland },
1614499f4089SMark Cave-Ayland {
1615eb169c76SMark Cave-Ayland .name = TYPE_ESP,
1616eb169c76SMark Cave-Ayland .parent = TYPE_DEVICE,
1617042879fcSMark Cave-Ayland .instance_init = esp_init,
1618042879fcSMark Cave-Ayland .instance_finalize = esp_finalize,
1619eb169c76SMark Cave-Ayland .instance_size = sizeof(ESPState),
1620eb169c76SMark Cave-Ayland .class_init = esp_class_init,
1621499f4089SMark Cave-Ayland },
1622eb169c76SMark Cave-Ayland };
1623eb169c76SMark Cave-Ayland
1624499f4089SMark Cave-Ayland DEFINE_TYPES(esp_info_types)
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