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/linux-3.3/drivers/mtd/nand/gpmi-nand/
Dgpmi-lib.c4 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc.
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #include <linux/mtd/gpmi-nand.h>
26 #include "gpmi-nand.h"
27 #include "gpmi-regs.h"
28 #include "bch-regs.h"
59 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()
78 * You will see a DMA timeout in this case. The bug has been fixed
103 while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout) in gpmi_reset_block()
123 return -ETIMEDOUT; in gpmi_reset_block()
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/linux-3.3/drivers/macintosh/
Dtherm_pm72.h10 u8 signature; /* 0x00 - EEPROM sig. */
11 u8 bytes_used; /* 0x01 - Bytes used in eeprom (160 ?) */
12 u8 size; /* 0x02 - EEPROM size (256 ?) */
13 u8 version; /* 0x03 - EEPROM version */
14 u32 data_revision; /* 0x04 - Dataset revision */
15 u8 processor_bin_code[3]; /* 0x08 - Processor BIN code */
16 u8 bin_code_expansion; /* 0x0b - ??? (padding ?) */
17 u8 processor_num; /* 0x0c - Number of CPUs on this MPU */
18 u8 input_mul_bus_div; /* 0x0d - Clock input multiplier/bus divider */
19 u8 reserved1[2]; /* 0x0e - */
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/linux-3.3/drivers/gpu/drm/i915/
Dintel_lvds.c2 * Copyright © 2006-2007 Intel Corporation
73 struct drm_device *dev = intel_lvds->base.base.dev; in intel_lvds_enable()
74 struct drm_i915_private *dev_priv = dev->dev_private; in intel_lvds_enable()
89 if (intel_lvds->pfit_dirty) { in intel_lvds_enable()
91 * Enable automatic panel scaling so that non-native modes in intel_lvds_enable()
96 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", in intel_lvds_enable()
97 intel_lvds->pfit_control, in intel_lvds_enable()
98 intel_lvds->pfit_pgm_ratios); in intel_lvds_enable()
100 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); in intel_lvds_enable()
101 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); in intel_lvds_enable()
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Di915_reg.h18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
28 #define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a)))
32 * fb aperture size and the amount of pre-reserved memory.
33 * This is all handled in the intel-gtt.ko module. i915.ko only
179 * - Always issue a MI_NOOP _before_ the MI_LOAD_REGISTER_IMM - otherwise hw
181 * - One can actually load arbitrary many arbitrary registers: Simply issue x
184 #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*x-1)
245 #define GFX_OP_PIPE_CONTROL(len) ((0x3<<29)|(0x3<<27)|(0x2<<24)|(len-2))
279 #define I830_FENCE_SIZE_BITS(size) ((ffs((size) >> 19) - 1) << 8)
287 #define I915_FENCE_SIZE_BITS(size) ((ffs((size) >> 20) - 1) << 8)
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/linux-3.3/arch/parisc/kernel/
Dfirmware.c2 * arch/parisc/kernel/firmware.c - safe PDC access routines
6 * See http://www.parisc-linux.org/documentation/index.html
12 * Copyright 2003 Grant Grundler <grundler parisc-linux org>
13 * Copyright 2003,2004 Ryan Bradetich <rbrad@parisc-linux.org>
14 * Copyright 2004,2006 Thibaut VARENE <varenet@parisc-linux.org>
26 * - the name of the pdc wrapper should match one of the macros
28 * - don't use caps for random parts of the name
29 * - use the static PDC result buffers and "copyout" to structs
31 * - hold pdc_lock while in PDC or using static result buffers
32 * - use __pa() to convert virtual (kernel) pointers to physical
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/linux-3.3/drivers/media/video/
Dsaa7191.h2 * saa7191.h - Philips SAA7191 video decoder driver
4 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
27 #define SAA7191_REG_CKTQ 0x08 /* bits 3-7 */
28 #define SAA7191_REG_CKTS 0x09 /* bits 3-7 */
52 * 0=CVBS (chrominance trap active), 1=S-Video (trap bypassed) */
54 /* pre-filter (only when chrominance trap is active) */
57 * (bits 4-5) */
64 /* coring range for high frequency components according to 8-bit luminance
65 * (bits 2-3)
66 * 0=coring off, n= (+-)n LSB */
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Dw9966.c33 *Add support for other ccd-control chips than the saa7111
62 #include <media/v4l2-common.h>
63 #include <media/v4l2-ioctl.h>
64 #include <media/v4l2-device.h>
90 #define W9966_WND_MAX_W (W9966_WND_MAX_X - W9966_WND_MIN_X)
91 #define W9966_WND_MAX_H (W9966_WND_MAX_Y - W9966_WND_MIN_Y)
138 "\teach camera. 'aggressive' means brute-force search.\n"
146 static int video_nr = -1;
159 cam->dev_state = (cam->dev_state & ~mask) ^ val; in w9966_set_state()
165 return ((cam->dev_state & mask) == val); in w9966_get_state()
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/linux-3.3/arch/powerpc/kernel/vdso32/
Dgettimeofday.S16 #include <asm/asm-offsets.h>
19 /* Offset for the low 32-bit part of a field of long type */
74 /* Check for supported clock IDs */
88 bne cr1,80f /* not monotonic -> all done */
105 * on that value and re-check the counter
112 bne- 50b
126 addi r3,r3,-1
156 /* Check for supported clock IDs */
200 bne- 1b
213 bne- 2b
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/linux-3.3/drivers/net/ethernet/freescale/
Dgianfar_ptp.c2 * PTP 1588 clock using the eTSEC
60 u32 tmr_fiper1; /* Timer fixed period interval */
61 u32 tmr_fiper2; /* Timer fixed period interval */
62 u32 tmr_fiper3; /* Timer fixed period interval */
76 #define TCLK_PERIOD_SHIFT (16) /* 1588 timer reference clock period. */
84 #define COPH (1<<7) /* Generated clock output phase. */
85 #define CIPH (1<<6) /* External oscillator input clock phase */
87 #define BYP (1<<3) /* Bypass drift compensated clock */
89 #define CKSEL_SHIFT (0) /* 1588 Timer reference clock source */
124 #define PRSC_OCK_SHIFT (0) /* Output clock division/prescale factor. */
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/linux-3.3/drivers/net/ethernet/myricom/myri10ge/
Dmyri10ge_mcp.h108 #define MXGEFW_ETH_SEND_OFFSET(n) (MXGEFW_ETH_SEND(n) - MXGEFW_ETH_SEND_4)
191 * command return data = repetitions (MSH), 0.5-ms ticks (LSH)
204 * or is equal to FF-FF-FF-FF-FF-FF
233 * the NIC to be able to receive maximum-sized packets.
238 /* data0 = number of slices n (0, 1, ..., n-1) to enable
241 * 1=use one MSI-X per queue.
285 * For IPv4 TSO, the maximum size of the headers is fixed, and the NIC
286 * always has enough header buffer to store maximum-sized headers.
304 * obtained data is cached inside the xaui-xfi chip :
309 * bit 23:16 is the i2c bus number (for multi-port NICs)
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/linux-3.3/Documentation/fb/
Dapi.txt2 ---------------------------
8 ---------------
11 with frame buffer devices. In-kernel APIs between device drivers and the frame
21 ---------------
23 Device and driver capabilities are reported in the fixed screen information
35 - FB_CAP_FOURCC
43 --------------------
45 Pixels are stored in memory in hardware-dependent formats. Applications need
57 - FB_TYPE_PACKED_PIXELS
63 Padding at end of lines may be present and is then reported through the fixed
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/linux-3.3/drivers/gpu/drm/nouveau/
Dnouveau_bios.h2 * Copyright 2007-2008 Nouveau Project
42 struct drm_nouveau_private *dev_priv = (d)->dev_private; \
43 ROM16(x) ? &dev_priv->vbios.data[ROM16(x)] : NULL; \
87 OUTPUT_EOL = 14, /* DCB 4.0+, appears to be end-of-list */
89 OUTPUT_ANY = -1
191 * calc to use 7 causes the generated clock to be out by a factor of 2.
192 * however, max_log2p cannot be fixed-up during parsing as the
Dnv04_dfp.c5 * Copyright 2007-2009 Stuart Bennett
55 * this does not give a correct answer for off-chip dvi, but there's no in nv04_dfp_get_bound_head()
58 int ramdac = (dcbent->or & OUTPUT_C) >> 2; in nv04_dfp_get_bound_head()
69 * Luckily we do know the values ;-) in nv04_dfp_bind_head()
75 int ramdac = (dcbent->or & OUTPUT_C) >> 2; in nv04_dfp_bind_head()
81 if (dcbent->type == OUTPUT_LVDS) in nv04_dfp_bind_head()
84 nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04); in nv04_dfp_bind_head()
87 nv_write_tmds(dev, dcbent->or, 1, 0x04, tmds04 ^ 0x08); in nv04_dfp_bind_head()
92 struct drm_nouveau_private *dev_priv = dev->dev_private; in nv04_dfp_disable()
93 struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg; in nv04_dfp_disable()
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/linux-3.3/Documentation/scsi/
DChangeLog.sym53c8xx1 Sat May 12 12:00 2001 Gerard Roudier (groudier@club-internet.fr)
2 * version sym53c8xx-1.7.3c
3 - Ensure LEDC bit in GPCNTL is cleared when reading the NVRAM.
4 Fix sent by Stig Telfer <stig@api-networks.com>.
5 - Backport from SYM-2 the work-around that allows to support
7 - Check that we received at least 8 bytes of INQUIRY response
9 - Define scsi_set_pci_device() as nil for kernel < 2.4.4.
10 - + A couple of minor changes.
12 Sat Apr 7 19:30 2001 Gerard Roudier (groudier@club-internet.fr)
13 * version sym53c8xx-1.7.3b
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/linux-3.3/arch/powerpc/kernel/
Dtime.c7 * Converted for 64-bit by Mike Corrigan (mikejc@us.ibm.com)
10 * to make clock more stable (2.4.0-test5). The only thing
19 * - improve precision and reproducibility of timebase frequency
21 * against the Titan chip's clock.)
22 * - for astronomical applications: add a new function to get
26 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
53 #include <linux/posix-timers.h>
162 * These are all stored as 0.64 fixed-point binary fractions.
214 u64 i = local_paca->dtl_ridx; in scan_dispatch_log()
215 struct dtl_entry *dtl = local_paca->dtl_curr; in scan_dispatch_log()
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/linux-3.3/drivers/gpu/drm/
Ddrm_modes.c2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
4 * Copyright © 2007-2008 Intel Corporation
6 * Copyright 2005-2006 Luc Verhaegen
41 * drm_mode_debug_printmodeline - debug print a mode
54 mode->base.id, mode->name, mode->vrefresh, mode->clock, in drm_mode_debug_printmodeline()
55 mode->hdisplay, mode->hsync_start, in drm_mode_debug_printmodeline()
56 mode->hsync_end, mode->htotal, in drm_mode_debug_printmodeline()
57 mode->vdisplay, mode->vsync_start, in drm_mode_debug_printmodeline()
58 mode->vsync_end, mode->vtotal, mode->type, mode->flags); in drm_mode_debug_printmodeline()
63 * drm_cvt_mode -create a modeline based on CVT algorithm
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/linux-3.3/arch/arm/plat-spear/
Dclock.c2 * arch/arm/plat-spear/clock.c
4 * Clock framework for SPEAr platform
22 #include <plat/clock.h>
39 if (!clk->en_reg) in generic_clk_enable()
40 return -EFAULT; in generic_clk_enable()
42 val = readl(clk->en_reg); in generic_clk_enable()
43 if (unlikely(clk->flags & RESET_TO_ENABLE)) in generic_clk_enable()
44 val &= ~(1 << clk->en_reg_bit); in generic_clk_enable()
46 val |= 1 << clk->en_reg_bit; in generic_clk_enable()
48 writel(val, clk->en_reg); in generic_clk_enable()
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/linux-3.3/drivers/media/dvb/frontends/
Ddib7000m.c2 * Linux-DVB Driver for DiBcom's DiB7000M and
3 * first generation DiB7000P-demodulator-family.
5 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
76 if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) { in dib7000m_read_word()
81 state->i2c_write_buffer[0] = (reg >> 8) | 0x80; in dib7000m_read_word()
82 state->i2c_write_buffer[1] = reg & 0xff; in dib7000m_read_word()
84 memset(state->msg, 0, 2 * sizeof(struct i2c_msg)); in dib7000m_read_word()
85 state->msg[0].addr = state->i2c_addr >> 1; in dib7000m_read_word()
86 state->msg[0].flags = 0; in dib7000m_read_word()
87 state->msg[0].buf = state->i2c_write_buffer; in dib7000m_read_word()
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/linux-3.3/drivers/scsi/sym53c8xx_2/
Dsym_hipd.h3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
8 * Copyright (C) 1998-2000 Gerard Roudier
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
15 * Stefan Esser <se@mi.Uni-Koeln.de>
23 *-----------------------------------------------------------------------------
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
88 #define sym_verbose (np->verbose)
144 * Asynchronous pre-scaler (ns). Shall be 40 for
166 #define SYM_MEM_CLUSTER_MASK (SYM_MEM_CLUSTER_SIZE-1)
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Dsym_hipd.c3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
9 * Copyright (C) 1998-2000 Gerard Roudier
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
16 * Stefan Esser <se@mi.Uni-Koeln.de>
24 *-----------------------------------------------------------------------------
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
68 while (n-- > 0) in sym_printl_hex()
75 sym_print_addr(cp->cmd, "%s: ", label); in sym_print_msg()
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/linux-3.3/drivers/video/aty/
Dmach64_ct.c47 * ATI Mach64 CT clock synthesis description.
52 * CLK = ----------------------
55 * XTALIN is a fixed speed clock. Common speeds are 14.31 MHz and 29.50 MHz.
57 * FB_DIV can be set by the user for each clock individually, it should be set
58 * between 128 and 255, the chip will generate a bad clock signal for too low
60 * x depends on the type of clock; usually it is 2, but for the MCLK it can also
62 * POST_DIV can be set by the user for each clock individually, Possible values
64 * CLK is of course the clock speed that is generated.
68 * MCLK The clock rate of the chip
69 * XCLK The clock rate of the on-chip memory
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/linux-3.3/kernel/time/
Dntp.c19 #include "tick-internal.h"
41 * phase-lock loop variables
45 * clock synchronization status
47 * (TIME_ERROR prevents overwriting the CMOS clock)
51 /* clock status bits: */
77 /* constant (boot-param configurable) NTP tick adjustment (upscaled) */
83 * The following variables are used when a pulse-per-second (PPS) signal
84 * is available. They establish the engineering parameters of the clock
115 * Otherwise, reduce the offset by a fixed factor times the time constant.
134 * pps_clear - Clears the PPS state variables
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Dtimekeeping.c27 struct clocksource *clock; member
31 /* Number of clock cycles in one NTP interval. */
33 /* Number of clock shifted nano seconds in one NTP interval. */
40 /* Clock shifted nano seconds remainder not stored in xtime.tv_nsec. */
45 /* Shift conversion between clock shifted nano seconds and
48 /* NTP adjusted clock multiplier */
55 * timekeeper_setup_internals - Set up internals to use clocksource clock.
57 * @clock: Pointer to clocksource.
59 * Calculates a fixed cycle/nsec interval for a given clocksource/adjustment
64 static void timekeeper_setup_internals(struct clocksource *clock) in timekeeper_setup_internals() argument
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/linux-3.3/drivers/media/video/omap3isp/
Dispresizer.c4 * TI OMAP3 ISP - Resizer module
24 * 02110-1301 USA
55 * "TRM ES3.1, table 12-46"
72 * 7-tap mode is for scale factors 0.25x to 0.5x.
73 * 4-tap mode is for scale factors 0.5x to 4.0x.
77 /* For 8-phase 4-tap horizontal filter: */
88 /* For 8-phase 4-tap vertical filter: */
99 /* For 4-phase 7-tap horizontal filter: */
107 /* For 4-phase 7-tap vertical filter: */
115 * The dummy padding is required in 7-tap mode because of how the
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/linux-3.3/drivers/atm/
Diphase.h29 Complete the ABR logic of the driver, and added the ABR work-
32 Add the flow control logic to the driver to allow rate-limit VC.
128 #define ATM_DESC(skb) (skb->protocol)
129 #define IA_SKB_STATE(skb) (skb->protocol)
178 #define NRMCODE 5 /* 0 - 7 */
179 #define TRMCODE 3 /* 0 - 7 */
181 #define ATDFCODE 2 /* 0 - 15 */
183 /*---------------------- Packet/Cell Memory ------------------------*/
184 #define TX_PACKET_RAM 0x00000 /* start of Trasnmit Packet memory - 0 */
187 - descriptor 0 unused */
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